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Pentium FDIV bug
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Pentium FDIV bug
The Pentium FDIV bug is a hardware bug affecting the floating-point unit (FPU) of the early Intel Pentium processors. Because of the bug, the processor would return incorrect binary floating point results when dividing certain pairs of high-precision numbers. The bug was discovered in 1994 by Thomas R. Nicely, a professor of mathematics at Lynchburg College. Missing values in a lookup table used by the FPU's floating-point division algorithm led to calculations acquiring small errors. In certain circumstances the errors can occur frequently and lead to significant deviations.
The severity of the FDIV bug is debated. Though rarely encountered by most users (Byte magazine estimated that 1 in 9 billion floating point divides with random parameters would produce inaccurate results), both the flaw and Intel's initial handling of the matter were heavily criticized by the tech community.
In December 1994, Intel recalled the defective processors in what was the first full recall of a computer chip. In its 1994 annual report, Intel said it incurred "a $475 million pre-tax charge ... to recover replacement and write-off of these microprocessors."
In order to improve the speed of floating-point division calculations on the Pentium chip over the 486DX, Intel opted to replace the shift-and-subtract division algorithm with the Sweeney, Robertson, and Tocher (SRT) algorithm. The SRT algorithm can generate two bits of the division result per clock cycle, whereas the 486's algorithm could only generate one. The lookup table implemented using a programmable logic array (PLA) with 2,048 cells, of which 1,066 cells should have been populated with one of five values: −2, −1, 0, +1, +2. When the Pentium's original array was compiled into the mask pattern used for fabrication, five values of +2 were not received by the lithography equipment. As a result, five array cells in the actual chips' etched PLAs that were supposed to contain +2 actually contained zero.
As a result, calculations that rely on these five cells introduce errors, which can accumulate due to the SRT algorithm's recursive nature. In worst-case scenarios, the error can rise as high as the fifth significant digit of the result, though this is rare and the errors usually appear at the ninth or tenth significant digit.
Only certain combinations of numerator and denominator trigger the bug, with one commonly-reported example being dividing 4,195,835 by 3,145,727. Performing this calculation in any software that used the floating-point coprocessor, such as Windows Calculator, would allow users to discover whether their Pentium chip was affected.
The correct value of the calculation is:
When converted to the hexadecimal value used by the processor, 4,195,835 = 0x4005FB and 3,145,727 = 0x2FFFFF. The "5" in 0x4005FB triggers the access to the "empty" array cells. As a result, the value returned by a flawed Pentium processor is incorrect at or beyond four digits:
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Pentium FDIV bug
The Pentium FDIV bug is a hardware bug affecting the floating-point unit (FPU) of the early Intel Pentium processors. Because of the bug, the processor would return incorrect binary floating point results when dividing certain pairs of high-precision numbers. The bug was discovered in 1994 by Thomas R. Nicely, a professor of mathematics at Lynchburg College. Missing values in a lookup table used by the FPU's floating-point division algorithm led to calculations acquiring small errors. In certain circumstances the errors can occur frequently and lead to significant deviations.
The severity of the FDIV bug is debated. Though rarely encountered by most users (Byte magazine estimated that 1 in 9 billion floating point divides with random parameters would produce inaccurate results), both the flaw and Intel's initial handling of the matter were heavily criticized by the tech community.
In December 1994, Intel recalled the defective processors in what was the first full recall of a computer chip. In its 1994 annual report, Intel said it incurred "a $475 million pre-tax charge ... to recover replacement and write-off of these microprocessors."
In order to improve the speed of floating-point division calculations on the Pentium chip over the 486DX, Intel opted to replace the shift-and-subtract division algorithm with the Sweeney, Robertson, and Tocher (SRT) algorithm. The SRT algorithm can generate two bits of the division result per clock cycle, whereas the 486's algorithm could only generate one. The lookup table implemented using a programmable logic array (PLA) with 2,048 cells, of which 1,066 cells should have been populated with one of five values: −2, −1, 0, +1, +2. When the Pentium's original array was compiled into the mask pattern used for fabrication, five values of +2 were not received by the lithography equipment. As a result, five array cells in the actual chips' etched PLAs that were supposed to contain +2 actually contained zero.
As a result, calculations that rely on these five cells introduce errors, which can accumulate due to the SRT algorithm's recursive nature. In worst-case scenarios, the error can rise as high as the fifth significant digit of the result, though this is rare and the errors usually appear at the ninth or tenth significant digit.
Only certain combinations of numerator and denominator trigger the bug, with one commonly-reported example being dividing 4,195,835 by 3,145,727. Performing this calculation in any software that used the floating-point coprocessor, such as Windows Calculator, would allow users to discover whether their Pentium chip was affected.
The correct value of the calculation is:
When converted to the hexadecimal value used by the processor, 4,195,835 = 0x4005FB and 3,145,727 = 0x2FFFFF. The "5" in 0x4005FB triggers the access to the "empty" array cells. As a result, the value returned by a flawed Pentium processor is incorrect at or beyond four digits:
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