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A physical unclonable function (PUF) is a hardware security primitive embodied in a physical system that maps a given input, known as a challenge, to a specific output, called a response, in a way that is easy to evaluate using the device but computationally infeasible to predict or replicate without it, due to inherent random manufacturing variations.^[1] These variations arise from unavoidable imperfections in fabrication processes, such as silicon wafer doping inconsistencies or circuit delay differences, ensuring that each PUF instance produces unique challenge-response pairs (CRPs) that serve as device-specific fingerprints.^[2] PUFs are designed to be unclonable, meaning even the manufacturer cannot produce identical copies with high fidelity, providing a tamper-evident alternative to traditional cryptographic keys stored in memory.^[3] The concept of PUFs was first formalized in 2002 by Pappu et al.^[4] for optical implementations and concurrently by Gassend et al. for silicon-based systems, building on earlier ideas of physical one-way functions to address limitations in software-based security, such as vulnerability to key extraction attacks.^[1] Key properties of PUFs include uniqueness (distinct responses across devices), reproducibility (consistent responses under stable conditions for the same device), randomness (unpredictable responses), and unclonability (resistance to duplication), though real-world PUFs often require error-correction mechanisms like fuzzy extractors to mitigate noise from environmental factors such as temperature or aging.^[2] These properties make PUFs particularly valuable in resource-constrained environments, where they enable hardware-rooted security without relying on non-volatile memory that could be compromised.^[5] PUFs are classified into weak and strong variants, with weak PUFs offering limited CRPs for key generation and strong PUFs supporting exponentially many CRPs for authentication protocols.^[2] Common types include the SRAM PUF, which exploits startup state variations in static random-access memory cells; the ring oscillator (RO) PUF, based on frequency differences in oscillating circuits; the arbiter PUF, utilizing path delay asymmetries in multiplexed paths; and optical PUFs, which rely on light scattering in particle-embedded materials.^[5] Applications span Internet of Things (IoT) device authentication, secure key derivation for encryption, intellectual property protection in integrated circuits, and anti-counterfeiting in supply chains, with growing adoption in edge computing amid over 20 billion connected devices as of 2025.^[6] Despite their promise, challenges persist, including susceptibility to modeling attacks that infer responses from observed CRPs and the need for robust protocols to counter side-channel vulnerabilities.^[7]

Fundamentals

Concept and Principles

A physical unclonable function (PUF) is a hardware-based security primitive that maps a set of challenges to corresponding responses by exploiting inherent randomness in the physical structure of a device, producing unique and unclonable outputs for each instance.^[8] This randomness arises from uncontrollable manufacturing variations at the nanoscale, such as doping fluctuations, oxide thickness inconsistencies, or interconnect irregularities during integrated circuit fabrication, which serve as entropy sources to ensure that no two devices generate identical responses to the same challenge.^[9] The core idea is that these physical disorders create a complex, device-specific "fingerprint" that is easy to evaluate but computationally infeasible to replicate or predict without physical access to the exact instance. The fundamental mechanism of a PUF operates through challenge-response pairs (CRPs), where a challenge

C

is an input stimulus—such as an electrical signal, voltage configuration, or optical pattern—that elicits a measurable response

R

from the physical system. These CRPs capture the device's unique behavior: for a given PUF instance, the same challenge always yields the same response (reproducibility), while responses across different devices are statistically random and unpredictable (randomness).^[9] Mathematically, a PUF can be modeled as a function

R = f(C, P)

, where

C

is the challenge,

P

represents the unique physical instance of the device (embodying its random variations), and

f

is the evaluating function derived from the hardware's physical properties. This model highlights the instance-dependent nature of the output, ensuring that even identical designs produce distinct functions due to fabrication imperfections. Unclonability stems from the principle that exact replication of a PUF is practically infeasible, as it would require reproducing the chaotic, nanoscale physical disorder with perfect fidelity—a task beyond current manufacturing precision, akin to an informal theorem of physical chaos where small variations amplify into irreproducible outcomes.^[9] Ideal PUFs exhibit high entropy in their responses, with inter-device variability approaching 50% (random bit flip probability), while maintaining low intra-device error rates for reliability. In cryptographic applications, PUFs enable device authentication and secret key generation without non-volatile storage of sensitive data; instead, keys are derived on-the-fly from CRPs, providing a tamper-resistant alternative to traditional methods like EEPROM-stored secrets.^[8] This approach leverages the PUF's inherent uniqueness for tasks such as secure fingerprinting, where a verifier can authenticate a device by querying known CRPs and verifying the responses.

Historical Development

The concept of physical unclonable functions (PUFs) traces its origins to 2001, when Ravikanth Pappu and colleagues at MIT introduced "physical one-way functions" (POWFs) in his PhD thesis, leveraging optical scattering patterns from transparent resin tokens containing embedded silica particles for anti-counterfeiting applications.^[10] These structures were designed to produce unique, unpredictable responses to light challenges, exploiting random physical variations that are computationally infeasible to clone or replicate exactly.^[11] The work laid the groundwork for hardware-based security primitives by demonstrating how physical disorder could serve as a tamper-evident identifier, initially focused on optical implementations for supply chain security. In 2002, the focus shifted from optical to silicon-based PUFs with the seminal paper by Blaise Gassend, Srinivas Devadas, and collaborators at MIT, who coined the term "physical unclonable function" and proposed the first integrated circuit realizations using ring oscillator delays to generate challenge-response pairs from manufacturing variations.^[3] This innovation enabled PUFs to be embedded directly in standard CMOS processes without additional fabrication steps, distinguishing strong PUFs capable of supporting numerous challenge-response pairs from weaker variants with limited inputs.^[12] Early developments in the mid-2000s built on this by exploring delay-based architectures, such as arbiter PUFs, which amplified path mismatches in circuit wires for authentication in resource-constrained devices. By 2007, Guajardo et al. extended the paradigm to weak PUFs by proposing SRAM-based implementations, utilizing the random power-up states of SRAM cells in FPGAs as intrinsic fingerprints for IP protection and key generation. The 2010s marked the maturation of PUF technology, with widespread adoption in Internet of Things (IoT) security for low-overhead device authentication and key derivation, driven by the need for silicon-rooted trust in distributed systems. Commercial prototypes emerged prominently through Intrinsic ID, a 2008 spin-off from Philips Research, which licensed SRAM PUF technology and released its first integrated solutions around 2010 to generate stable cryptographic roots from noisy startup values without dedicated hardware.^[13] Concurrent research addressed reliability challenges, revealing typical intra-device bit error rates of 1-5% due to environmental factors like temperature and voltage, prompting advancements in error correction via fuzzy extractors and BCH codes to achieve near-100% key stability.^[14] Standardization efforts gained momentum in the late 2010s to establish consistent evaluation metrics for PUF quality, including uniqueness, reliability, and randomness, with the International Organization for Standardization initiating work on ISO/IEC 20897 in 2019, which was published in 2020 as the core model for PUF-based security techniques. Part 2 of the standard, specifying test and evaluation methods, followed in 2022.^[15] Around 2020, initial explorations integrated PUFs into quantum-resistant cryptographic protocols, leveraging their hardware entropy to bolster authentication against future quantum threats in hybrid schemes combining symmetric keys with post-quantum algorithms. Subsequent developments from 2021 to 2025 have advanced quantum physical unclonable functions (QPUFs) and their applications in secure quantum systems.^[16]^[17]

Classification

Strong versus Weak PUFs

Weak physical unclonable functions (PUFs) are defined by their support for a limited number of challenge-response pairs (CRPs), typically fewer than

2^{20}

, where responses are inherently difficult to access externally without invasive physical intervention.^[18] This restricted CRP space minimizes the potential attack surface, making weak PUFs particularly suitable for applications like cryptographic key generation, where stability and secrecy are paramount.^[19] Strong PUFs, on the other hand, exhibit an exponentially large CRP space, often exceeding

2^{64}

pairs, with interfaces designed for public accessibility to enable querying of diverse challenges.^[20] This vast entropy supports advanced security protocols, such as device authentication, by allowing verification through the submission of a challenge and comparison of the resulting response against a stored reference.^[21] In comparison, weak PUFs tend to demonstrate higher reliability and lower noise in responses due to their simpler architectures, but they remain vulnerable to physical attacks—such as invasive readout—if an adversary gains direct hardware access to extract the limited CRPs.^[19] Strong PUFs, while offering greater diversity and unpredictability for handling numerous unique challenges, face risks from modeling attacks, in which attackers collect a subset of CRPs to construct mathematical models that predict responses to unseen challenges.^[22] Evaluation of both categories often relies on metrics like CRP density, defined as the number of unique CRPs per unit area, which is generally higher in strong PUFs owing to their exponential scaling with hardware size; and uniqueness, quantified by the average inter-device Hamming distance between responses to the same challenge across multiple devices, ideally approaching 50% to mimic ideal random bit strings.^[18] Weak PUFs find typical use in internal key storage for secure hardware elements, leveraging their obfuscated responses for device-specific secrets, whereas strong PUFs enable public-key-analogous operations, such as challenge-response authentication in distributed systems like the Internet of Things.^[22]

Implicit versus Explicit PUFs

Physical unclonable functions (PUFs) are classified as implicit or explicit based on the source of randomness used to generate challenge-response pairs (CRPs). Explicit PUFs derive responses from deliberately engineered physical structures designed to amplify manufacturing variations, such as etched patterns, conductive loops, or dispersed particles in a medium that create unique scattering or interference effects.^[23] In contrast, implicit PUFs generate responses from inherent randomness in existing device behaviors, such as path delay differences in logic gates or power-up states in memory cells, without requiring additional hardware structures.^[24] Examples of explicit PUFs include coating PUFs, where responses arise from capacitance variations in a particle-filled resin layer, and plasmonic PUFs using nanoparticle distributions to modulate light responses.^[23] Implicit PUFs, on the other hand, encompass designs like ring oscillator PUFs, which measure frequency differences due to transistor threshold variations, or SRAM PUFs that exploit metastable startup values from cross-coupled inverters.^[24] The distinction leads to key trade-offs in design and performance. Explicit PUFs provide greater control over randomness, enabling higher entropy per unit area through optimized structures, but they increase fabrication area, cost, and complexity due to the need for specialized processing steps.^[23] Implicit PUFs are cost-effective and area-efficient, leveraging existing circuitry for "free" randomness, yet they often exhibit higher noise sensitivity and lower tunability, resulting in reduced entropy extraction efficiency.^[24] Evaluation of these PUFs focuses on entropy extraction efficiency, which measures usable unique bits per response, and reliability metrics such as bit error rate (BER) under environmental variations like temperature or voltage fluctuations. For instance, implicit PUFs may achieve BERs around 1-5% in stable conditions but degrade more under stress due to their reliance on subtle process variations, while explicit PUFs can maintain lower BERs (e.g., <1%) through amplified features, though at the expense of evaluation overhead.^[23] Historically, early optical PUFs, introduced by Pappu et al. in 2002, exemplify explicit designs by using laser challenges on translucent tokens embedded with light-scattering particles to produce unique speckle patterns as responses.

Intrinsic versus Extrinsic PUFs

Physical unclonable functions (PUFs) are classified as intrinsic or extrinsic based on their integration within the device manufacturing lifecycle and the source of their uniqueness. Intrinsic PUFs exploit the random manufacturing variations inherent to standard integrated circuit (IC) fabrication processes, such as fluctuations in transistor threshold voltages or interconnect delays, without necessitating any alterations to the circuit design or extra processing steps. This approach embeds the PUF functionality directly into existing hardware components, enabling seamless incorporation during normal production.^[23] Extrinsic PUFs, on the other hand, require intentional modifications or supplementary fabrication procedures to generate their unique physical characteristics, such as laser etching patterns on silicon surfaces or the deposition of specialized coatings and external tokens. These added steps create deliberate disorder that forms the basis of the PUF's response, often allowing for external verification mechanisms.^[21] A key advantage of intrinsic PUFs is their negligible overhead in area, power consumption, and production yield, as they repurpose existing process variations, promoting high scalability and compatibility with system-on-chip (SoC) integration for broad deployment in embedded systems. However, this reliance on uncontrolled variations can result in lower predictability and quality control, potentially leading to higher error rates that demand robust post-processing. In contrast, extrinsic PUFs provide enhanced control over uniqueness and entropy through engineered features, yielding more reliable responses for applications like modular security tokens, but at the expense of increased manufacturing complexity, cost, and potential yield reductions due to the additional steps.^[23]^[21] Evaluation of both categories typically involves metrics assessing overhead and performance, such as area utilization (intrinsic PUFs often add less than 1% to chip area), power draw (minimal for intrinsic due to no extra circuitry), and yield impact (negligible for intrinsic versus measurable reductions for extrinsic). Uniqueness and randomness are quantified using NIST statistical test suites, where responses from intrinsic PUFs demonstrate high min-entropy (e.g., approaching 1 bit per cell in mature processes) to confirm suitability for key generation, while extrinsic designs may excel in inter-device hamming distance (>45% typical) but require careful calibration to mitigate environmental sensitivities. Intrinsic PUFs are particularly well-suited for SoC environments, whereas extrinsic variants facilitate modular security solutions, such as attachable authentication devices.^[23]^[21]^[25]

Types

Electrical and Magnetic PUFs

Electrical and magnetic physical unclonable functions (PUFs) leverage inherent manufacturing variations in electrical and magnetic properties of integrated circuits to produce unique, device-specific responses to challenges. These PUFs are particularly suited for silicon-based implementations due to their compatibility with complementary metal-oxide-semiconductor (CMOS) processes, enabling seamless integration into standard chip fabrication without requiring specialized materials or post-processing steps.^[26] Common variants include those based on memory cells, delay elements, and magnetic tunnel junctions, each exploiting distinct physical phenomena for response generation. The static random access memory (SRAM) PUF is one of the earliest and most widely adopted electrical PUFs, relying on the random initial values that SRAM cells assume upon power-up. These values arise from process-induced variations in transistor threshold voltages, which cause slight mismatches in the cross-coupled inverters within each cell, leading to a stable but unpredictable state (either '0' or '1'). As a weak PUF, the SRAM design typically accesses a fixed array of cells—often the entire on-chip SRAM—to generate a limited set of challenge-response pairs (CRPs), usually on the order of thousands, making it suitable for key generation rather than exhaustive authentication protocols. It exhibits high reliability, with bit error rates below 1% under nominal conditions, achieving stability around 99% across temperature and voltage variations, though environmental factors can introduce noise requiring selective bit stabilization.^[27] Ring oscillator (RO) PUFs represent a delay-based electrical PUF that measures frequency differences among multiple identical ring oscillators formed by inverting delay stages. Manufacturing variations in gate lengths, doping, and interconnects cause each oscillator to operate at slightly different frequencies; challenges select pairs of oscillators via multiplexers (MUXes), and the response bit is determined by comparing their cycle counts over a fixed period using a comparator.^[8] Classified as a strong PUF due to its potential for generating up to 2^n CRPs from n stages, the RO PUF is highly configurable and scalable, with implementations supporting millions of bits. However, it suffers from bit error rates (BER) typically ranging from 1% to 5%, influenced by noise from supply voltage fluctuations and temperature changes, often necessitating error correction techniques like BCH codes to achieve reliable key extraction.^[28] The arbiter PUF is another prominent delay-based electrical variant, employing parallel paths of switchable delay elements (e.g., two-wire pairs routed through multiplexers) to quantify path-length differences caused by process variations. A challenge bit string determines the routing configuration for each stage, routing signals through upper or lower paths; the signals arrive at a final arbiter (e.g., a D-flip-flop or latch), and the response bit is the sign of the total delay difference:

\text{sign}(\Delta t_1 - \Delta t_2)

, where

\Delta t_1

and

\Delta t_2

are the cumulative delays of the two paths. As a strong PUF, it supports a large CRP space but is vulnerable to modeling attacks, where machine learning algorithms can predict responses from a subset of observed CRPs by approximating the linear delay model.^[29] Like the RO PUF, its BER (around 1-3%) requires error mitigation for practical deployment. Magnetic PUFs exploit random variations in magnetic domains or tunneling resistances within non-volatile memory elements, offering persistence without power consumption. In magnetoresistive random access memory (MRAM)-based designs, such as spin-transfer torque (STT)-MRAM, the PUF response derives from stochastic differences in magnetic tunnel junction (MTJ) resistances or switching times, influenced by nanoscale variations in oxide barriers and ferromagnetic layers during fabrication. These PUFs are emerging for applications requiring non-volatility, with responses generated by reading resistance states under applied currents or fields; reliability exceeds 95% in controlled settings, though sensitivity to magnetic interference demands shielding.^[30] Electrical PUFs dominate implementations owing to their native integration with CMOS processes, enabling low-cost, high-volume production in standard logic chips, whereas magnetic PUFs, particularly MRAM variants, excel in tamper-resistant scenarios due to their non-destructive readout and resilience to physical probing.^[30] Both categories benefit from error correction to handle noise in RO and arbiter designs, and while arbiter PUFs face risks from electromagnetic analysis side-channels, their overall utility in secure key derivation remains significant.

Optical PUFs

Optical PUFs exploit the unique light-scattering properties of disordered materials to generate unclonable responses, serving as a foundational type of physical unclonable function first proposed in 2002.^[4] The basic mechanism involves illuminating a diffusive medium, such as a transparent epoxy disk embedded with randomly distributed microscopic refractive particles like glass spheres, with a coherent laser beam. This causes multiple scattering within the 3D volume of the material, producing a distinctive speckle pattern of interference fringes that is captured as the PUF response, often via a CCD camera or photodiodes.^[4] The randomness arises from the fixed positions of scatterers, which are determined during fabrication by processes akin to frozen Brownian motion, ensuring each device yields a non-reproducible pattern even under identical challenges.^[31] Optical PUFs are classified into non-coherent and coherent variants, with the former typically using token-based setups where photodiodes detect intensity at fixed points without full imaging, and the latter employing holographic or full-speckle capture for richer responses.^[23] These designs enable exceptionally high challenge-response pair (CRP) counts, potentially exceeding 2^{1000} due to the vast degrees of freedom in 3D volume scattering, far surpassing many electronic PUFs in entropy.^[31] As extrinsic strong PUFs, they require a separate physical token and support numerous independent CRPs, making them suitable for robust authentication.^[32] Key advantages include tamper-evidence, as any physical alteration disrupts the delicate scattering structure and alters the speckle pattern irreversibly, and high entropy derived from the unpredictable particle distributions.^[4] In stable environmental conditions, such as controlled temperature and alignment, bit error rates (BER) remain below 1%, ensuring reliable response reproduction without extensive correction.^[33] The mathematical foundation lies in the speckle field's intensity correlations, where the observed pattern

I(\mathbf{r})

at position

\mathbf{r}

results from the coherent superposition of scattered waves, governed by:

I(\mathbf{r}) = \left| \sum_j a_j e^{i \phi_j(\mathbf{r})} \right|^2

I(r)=

j∑ajeiϕj(r)

2 with $a_j$ and $\phi_j$ denoting the amplitude and phase from each scatterer $j$ . Uniqueness stems from the 3D Fourier transform of the scatterer density function $\rho(\mathbf{x})$ , where the far-field speckle approximates the magnitude squared of this transform, $|\mathcal{F}\{\rho(\mathbf{x})\}|^2$ , rendering inversion computationally infeasible due to phase retrieval ambiguities in disordered media.^[4]^[31] Primarily applied in anti-counterfeiting labels and secure tags, optical PUFs provide non-electronic, photonic security solutions for product authentication, leveraging their historical precedence as the inaugural PUF implementation.^[4]

Emerging Types

Recent advancements in physical unclonable functions (PUFs) have introduced innovative variants that address scalability, integration, and security challenges in emerging computing paradigms, particularly since 2023. These developments leverage novel materials and architectures to enhance randomness generation, reduce hardware overhead, and ensure compatibility with post-quantum threats, building on foundational optical and electrical principles while mitigating vulnerabilities in traditional setups.^[34]^[35] Nanoseed-based PUFs, introduced in 2025, utilize self-assembled nanoparticle structures to generate optical and electrical randomness for on-demand cryptographic key production. These PUFs overcome limitations in conventional designs, such as fixed response generation and scalability issues, by enabling dynamic encryption through nanoseed-induced variations that achieve near-ideal uniqueness and randomness metrics in Hamming distance tests. The approach integrates nanoparticle assemblies into compact devices, facilitating high-entropy responses without extensive post-processing.^[34]^[36] Virtual PUFs, developed between 2024 and 2025, emulate physical PUF behavior through software models derived from hardware seeds, such as encoder-decoder neural networks trained via split learning. This enables secure remote authentication for IoT devices without exposing physical hardware to attacks, as the virtual model reconstructs challenge-response pairs (CRPs) on demand while preserving the uniqueness of the originating physical seed. The framework reduces deployment costs by distributing computation between client and server, enhancing privacy in distributed systems.^[37]^[38] 3D-integrated PUFs, emerging in 2024, stack random number generators (RNGs) and PUF elements in vertical architectures to create compact security chips suitable for resource-constrained IoT applications. These designs minimize area overhead by embedding PUFs within 3D NAND or similar vertical structures, generating stable CRPs alongside true random bits for key derivation with low power consumption. The integration enhances tamper resistance and supports scalable manufacturing for edge devices.^[39]^[40] Post-quantum intrinsic PUFs, advanced since 2023, incorporate lattice-based cryptographic variations to produce quantum-resistant CRPs, countering side-channel and quantum attacks on traditional PUF-derived keys. By entangling PUF responses with lattice problems like the short integer solution (SIS), these PUFs generate authentication protocols that maintain security against Grover's and Shor's algorithms, with implementations achieving lightweight overhead for constrained environments. This hybrid approach ensures long-term robustness in cryptographic primitives.^[41]^[42] In-memory computing PUFs, proposed in 2025, embed PUF functionality directly into resistive RAM (ReRAM) arrays to enable simultaneous encryption and neural network computation, protecting model weights, inputs, and architectures from extraction attacks. Frameworks like RePACK use memristive variability for in-situ key generation and obfuscation, allowing secure inference with minimal latency penalties while safeguarding AI data throughout processing. This integration supports efficient, hardware-accelerated privacy in machine learning deployments.^[35]

Technical Aspects

Error Correction Techniques

Physical unclonable functions (PUFs) exhibit noise in their responses due to environmental factors such as temperature and supply voltage fluctuations, as well as temporal variations like aging and measurement uncertainties, leading to bit error rates (BER) typically ranging from 1% to 15% in raw outputs. To mitigate this instability and enable reliable key generation, fuzzy extractors are employed, which process noisy PUF responses to produce uniform cryptographic keys while ensuring reproducibility from sufficiently similar inputs; these mechanisms integrate information reconciliation via error-correcting codes (ECC) and privacy amplification through strong extractors.^[43] Common ECCs in fuzzy extractors for PUFs include BCH codes and Reed-Solomon codes, which correct errors by storing helper data that reveals partial information about the original response without compromising secrecy.^[44] The protocol operates in two phases: during enrollment, a stable PUF response R is generated, encoded with an ECC to compute a syndrome (helper data), and the key is derived via hashing; in reconstruction, a noisy response R' is obtained, and decoding using the syndrome recovers R (or an approximation), from which the key is regenerated as key = hash(decode(R', syndrome)).^[43]^[44] Advanced techniques enhance efficiency and robustness; for instance, soft-decision decoding leverages reliability estimates from ring oscillator (RO) PUFs to improve error correction beyond hard-decision methods, while cryptographic hashing (e.g., SHA-256) ensures output uniformity during privacy amplification.^[43] These approaches incur overhead, with entropy loss due to helper data storage and correction requirements, though optimized bounds and concatenated codes can minimize this for higher key lengths.^[44] Post-correction metrics demonstrate effectiveness, achieving failure rates below 1 part per million (ppm) across wide temperature (-55°C to 125°C) and voltage (1.0V ±10%) ranges, while maintaining min-entropy exceeding 128 bits for security strength.^[43]

Vulnerabilities and Security Analysis

Physical unclonable functions (PUFs) are susceptible to modeling attacks, where an adversary queries the PUF with chosen challenges to obtain challenge-response pairs (CRPs) and constructs a mathematical model to predict responses for unseen challenges. In such attacks, the adversary treats the PUF as a black-box oracle and uses machine learning techniques to approximate its behavior. For instance, the Arbiter PUF, a common electrical PUF design, can be effectively modeled using logistic regression, achieving over 99% prediction accuracy with approximately 18,000 CRPs for a 64-stage implementation.^[45] These attacks exploit the linear delay differences in Arbiter PUFs, allowing the model to interpolate responses with high fidelity after sufficient training data. Machine learning attacks extend modeling threats by employing advanced algorithms like covariance matrix adaptation evolution strategy (CMA-ES) or neural networks, providing provable bounds on the number of CRPs needed to break strong PUFs. These methods are particularly effective against complex variants, such as XOR Arbiter PUFs, by optimizing non-linear mappings. Recent analyses demonstrate the vulnerability of strong PUFs to such attacks, highlighting the need for designs with robust obfuscation.^[46] Such attacks underscore the need for evaluating PUFs under worst-case CRP budgets, as prediction errors drop below 5% once the model converges. Side-channel attacks target implementation-specific leakages, such as power consumption or electromagnetic emissions, to extract PUF responses without direct CRP access. For transient effect ring oscillator (TERO) PUFs, electromagnetic analysis (EMA) on power traces enables recovery of up to 25% of response bits with error rates under 18%.^[47] Fault injection techniques, including pulsed electromagnetic interference, further disrupt RO PUF operations, altering response stability to reveal underlying randomness sources or force erroneous outputs that aid model reconstruction. These non-invasive methods are practical on FPGA implementations, emphasizing hardware-level protections like shielding. Additional vulnerabilities arise from helper data in fuzzy extractor protocols, which can leak information about the PUF's internal state despite being designed for secure key generation. Public helper data enables adversaries to reconstruct partial PUF models, reducing entropy and facilitating machine learning attacks by correlating noisy responses.^[48] Extrinsic PUFs, which depend on external sensors for randomness, are particularly prone to physical tampering, where attackers replace or manipulate sensors to spoof responses without altering the core PUF. Noise from manufacturing variations, while requiring correction for reliability, can also amplify these risks in susceptible designs like optical PUFs, potentially enabling cloning via precise replication. As of 2025, ongoing research shows continued evolution in threats, including deep neural network-based modeling and fault-injection attacks that further challenge PUF security.^[49] Countermeasures against these threats include CRP obfuscation techniques, such as non-linear transformations of challenges before PUF evaluation, which increase the effective CRP space and degrade modeling accuracy. Protocol designs incorporating XOR arbiter structures enhance resistance by combining multiple PUF instances, requiring substantially more CRPs for successful attacks. Security is quantified via metrics like prediction error rate, targeting values above 50% to ensure unclonability, alongside hybrid approaches that limit oracle access during authentication.^[45]

Applications and Deployment

Security Use Cases

Physical unclonable functions (PUFs) enable secure device authentication in Internet of Things (IoT) environments through challenge-response pair (CRP) protocols, which verify device identity without storing sensitive secrets on the device itself. In these protocols, a verifier sends a challenge to the PUF, which generates a unique response based on the device's inherent physical variations, allowing authentication while minimizing vulnerability to secret extraction attacks. For resource-constrained IoT devices, protocols like HB+ have been adapted to leverage PUFs, such as in the PUF-HB scheme, which provides tamper-resilient authentication by combining the lightweight HB+ mechanism with PUF responses to resist side-channel and modeling attacks. This approach supports mutual authentication in pairwise settings, ensuring efficient verification for distributed IoT networks.^[50] PUFs also facilitate secure key generation and storage, serving as a root of trust for protocols like Transport Layer Security (TLS) and secure boot processes. By deriving cryptographic keys from PUF responses, devices can eliminate the need for non-volatile memory such as EEPROM, which is susceptible to physical attacks like probing or fault injection. Fuzzy extractors post-process noisy PUF outputs to produce stable keys, enabling reproducible key generation for TLS handshakes or firmware integrity checks during secure boot, where the PUF acts as an immutable hardware anchor to verify boot components. This replacement enhances resilience against key compromise in embedded systems.^[51] In anti-counterfeiting applications, optical PUFs provide robust identification for supply chain tracking, exploiting random scattering patterns in materials illuminated by lasers to generate unique, unclonable signatures. These signatures can be embedded in RFID tags using weak PUFs, allowing low-cost verification of product authenticity without additional hardware overhead. For instance, optical PUFs based on speckle interference patterns enable non-contact authentication of components, deterring counterfeiting in high-value goods by making exact replication computationally infeasible. RFID-integrated weak PUFs further support scalable tagging in logistics, where responses to simple challenges confirm genuineness at checkpoints.^[52] Emerging use cases extend PUFs to post-quantum security and AI model protection. In post-quantum key exchange, PUFs integrate with lattice-based schemes like Kyber to generate device-specific keys resistant to quantum attacks, enabling authenticated key distribution in 2024 protocols that combine PUF-derived seeds with post-quantum primitives for cross-domain vehicular networks. For in-memory neural network protection, schemes like RePACK employ PUFs to encrypt model weights and inputs during inference, using PUF-generated keys for layer-wise obfuscation in compute-in-memory architectures, thereby safeguarding proprietary AI models from extraction or tampering while maintaining computational efficiency. These applications demonstrate PUFs' adaptability to quantum threats and machine learning security. PUFs integrate with blockchain for decentralized identity management, where PUF responses serve as tamper-proof identifiers in permissioned ledgers, supporting scalable authentication without central authorities. In blockchain-assisted IoT systems, PUF-based CRPs enable lightweight mutual authentication and key agreement, with enrollment phases storing hashed responses on-chain for verification. This integration achieves authentication times under 1 ms and supports thousands of devices, enhancing scalability for decentralized IDs in industrial settings by leveraging PUFs' unclonability for immutable provenance tracking.^[53]^[54]^[55]

Commercial Availability and Standards

Commercial availability of physical unclonable functions (PUFs) has expanded significantly since the early 2010s, driven by demand for hardware-rooted security in embedded systems. Leading companies include Intrinsic ID, which has commercialized SRAM-based PUFs since 2010 through licensing of IP cores for key generation and device authentication. Other key players are eMemory Technology and its subsidiary PUFsecurity, offering anti-counterfeiting solutions; ICTK Holdings for mobile secure elements; and Invia Inc. for logic-based PUFs. ID Quantique provides optical PUFs integrated with quantum random number generators for high-security applications. Intel stands out as a major innovator, holding numerous patents on PUF techniques for semiconductor integration. Verayo, an early pioneer in silicon PUFs, has incorporated its technology into products available as of 2025. PUF products are primarily available as intellectual property (IP) cores for integration into application-specific integrated circuits (ASICs) and field-programmable gate arrays (FPGAs), such as ring oscillator (RO)-PUF modules from various vendors. NXP Semiconductors incorporates PUFs into its secure elements, like the A71CH and SE050 chips, used in IoT and automotive applications for root-of-trust establishment. Qualcomm has explored PUF integrations in Snapdragon processors for enhanced device binding, while ARM offers PUF-compatible designs in its TrustZone architecture for system-on-chip (SoC) implementations. The PUF market is experiencing growth alongside the broader hardware security sector, particularly for IoT and 5G deployments, where PUFs enable scalable device authentication without secure storage. Projections indicate the global IoT security market, including PUF technologies, will reach approximately $59 billion by 2028, fueled by increasing connected devices exceeding 21 billion globally as of 2025.^[56] A notable trend from 2023 to 2025 is the rise in virtual PUF licensing models for cloud security, allowing software emulation of hardware PUFs in virtualized environments without physical hardware. Standardization efforts aim to ensure reliability and comparability of PUFs. The ISO/IEC 20897-1:2020 and ISO/IEC 20897-2:2022 standards specify security requirements and test methods for PUFs, respectively, focusing on metrics like uniqueness, reliability, and randomness.^[57]^[15] NIST provides guidelines in publications on evaluating PUFs for cryptographic applications. IEEE standards related to hardware security indirectly support PUF metrics like stochasticity and inter-device uniqueness, though a dedicated PUF standard remains under development as of 2025. Despite progress, commercialization faces challenges including certification hurdles under frameworks like Common Criteria and FIPS 140, which require rigorous validation of PUF stability across environmental variations. Interoperability issues arise from diverse PUF types, complicating integration across multi-vendor ecosystems and hindering widespread adoption.

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Media Pages

Timelines

Articles

Notes collections

Notes

Notes

Days in Chronicle

Physical unclonable function

Physical unclonable function

Fundamentals

Concept and Principles

Historical Development

Classification

Strong versus Weak PUFs

Implicit versus Explicit PUFs

Intrinsic versus Extrinsic PUFs

Types

Electrical and Magnetic PUFs

Optical PUFs

References

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