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PowerPC 970
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PowerPC 970
The PowerPC 970, PowerPC 970FX, and PowerPC 970MP are 64-bit PowerPC CPUs from IBM introduced in 2002. Apple branded the 970 as PowerPC G5 for its Power Mac G5.
Having created the PowerPC architecture in the early 1990s via the AIM alliance, the 970 family was created through a further collaboration between IBM and Apple. The project was codenamed GP-UL or Giga Processor Ultra Light, where Giga Processor is the codename for the POWER4 from which the core was derived. When Apple introduced the Power Mac G5, it stated that this was a five-year collaborative effort, with multi-generation roadmap. This forecast however was short-lived when Apple later had to retract its promise to deliver a 3 GHz processor only one year after its introduction. IBM was also unable to reduce power consumption to levels necessary for laptop computers. Ultimately, Apple only used three variants of the processor.
IBM's JS20/JS21 blade modules and some low-end workstations and System p servers are based on the PowerPC 970. It is also used in some high end embedded systems like Mercury's Momentum XSA-200. IBM is also licensing the PowerPC 970 core for use in custom applications.
The PowerPC 970 is a single core derivative of the POWER4 and can process both 32-bit and 64-bit PowerPC instructions natively. It has a hardware prefetch unit and a three way branch prediction unit.
Like the POWER4, the front-end is nine stages long. The PowerPC 970 can fetch and decode up to eight instructions, dispatch up to five to reserve stations, issue up to eight to the execution units and retire up to five per cycle. The execution pipelines were lengthened compared to the POWER4 to achieve higher IPC. It has eight execution units: two arithmetic logic units (ALUs), two double-precision floating-point units, two load/store units and two AltiVec units.
One of the AltiVec units executes integer and floating-point instructions, and the other only permute instructions. The latter has three subunits for simple integer, complex integer and floating-point instructions. These units have pipelines of varying lengths: 10 stages for simple integer and permute instructions, 13 stages for complex integer instructions and 16 stage for floating-point instructions.
The processor has two unidirectional 32-bit double data rate (DDR) buses (one for reads, the other for writes) to the system controller chip (northbridge) running at one quarter of the processor core speed. The buses also carry addresses and control signals in addition to data so only a percentage of the peak bandwidth can be realized (6.4 GB/s at 450 MHz). As the buses are unidirectional, each direction can realize only half the aggregate bandwidth, or 3.2 GB/s.
All generations of 970 processors were manufactured in IBM's East Fishkill plant in New York on a white ceramic substrate that was typical for IBM's high end processors of the era.
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PowerPC 970
The PowerPC 970, PowerPC 970FX, and PowerPC 970MP are 64-bit PowerPC CPUs from IBM introduced in 2002. Apple branded the 970 as PowerPC G5 for its Power Mac G5.
Having created the PowerPC architecture in the early 1990s via the AIM alliance, the 970 family was created through a further collaboration between IBM and Apple. The project was codenamed GP-UL or Giga Processor Ultra Light, where Giga Processor is the codename for the POWER4 from which the core was derived. When Apple introduced the Power Mac G5, it stated that this was a five-year collaborative effort, with multi-generation roadmap. This forecast however was short-lived when Apple later had to retract its promise to deliver a 3 GHz processor only one year after its introduction. IBM was also unable to reduce power consumption to levels necessary for laptop computers. Ultimately, Apple only used three variants of the processor.
IBM's JS20/JS21 blade modules and some low-end workstations and System p servers are based on the PowerPC 970. It is also used in some high end embedded systems like Mercury's Momentum XSA-200. IBM is also licensing the PowerPC 970 core for use in custom applications.
The PowerPC 970 is a single core derivative of the POWER4 and can process both 32-bit and 64-bit PowerPC instructions natively. It has a hardware prefetch unit and a three way branch prediction unit.
Like the POWER4, the front-end is nine stages long. The PowerPC 970 can fetch and decode up to eight instructions, dispatch up to five to reserve stations, issue up to eight to the execution units and retire up to five per cycle. The execution pipelines were lengthened compared to the POWER4 to achieve higher IPC. It has eight execution units: two arithmetic logic units (ALUs), two double-precision floating-point units, two load/store units and two AltiVec units.
One of the AltiVec units executes integer and floating-point instructions, and the other only permute instructions. The latter has three subunits for simple integer, complex integer and floating-point instructions. These units have pipelines of varying lengths: 10 stages for simple integer and permute instructions, 13 stages for complex integer instructions and 16 stage for floating-point instructions.
The processor has two unidirectional 32-bit double data rate (DDR) buses (one for reads, the other for writes) to the system controller chip (northbridge) running at one quarter of the processor core speed. The buses also carry addresses and control signals in addition to data so only a percentage of the peak bandwidth can be realized (6.4 GB/s at 450 MHz). As the buses are unidirectional, each direction can realize only half the aggregate bandwidth, or 3.2 GB/s.
All generations of 970 processors were manufactured in IBM's East Fishkill plant in New York on a white ceramic substrate that was typical for IBM's high end processors of the era.
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