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SDS 9 Series
The SDS 9 Series computers are a backward compatible line of transistorized computers produced by Scientific Data Systems in the 1960s and 1970s. This line includes the SDS 910, SDS 920, SDS 925, SDS 930, SDS 940, and the SDS 945. The SDS 9300 is an extension of the 9xx architecture. The 1965 SDS 92 is an incompatible 12-bit system built using monolithic integrated circuits.
The 910 and 920 were first shipped in August, 1962. The 9300 was announced in June, 1963. The 925 and 930 were announced in 1964. The 940 was announced in 1965, and the 945 in 1968.
The 9 series was replaced by the SDS Sigma series.
All systems are 24-bit single address machines. Programmer-accessible registers are A (accumulator), B (extension), X (index), and P (program counter—14 bits), plus an overflow indicator. The 9300 has three index registers X1 through X3 which can be used as base registers to allow access to memory above 16K words. The W and Y registers are used for input/output.
Maximum address space is 214 or 16,384 words (16 KW—64 K char) on the 910 and 920. The 9300 and 930 support up to 32K (128 K char), and the 940 and 945 support up to 64K (256 K char), although the method for accessing the memory above 16K differs.
Fixed-point data is 24-bit, two's complement, big-endian.
Floating-point is implemented in software using "programmed operators", except on the SDS 9300 which has hardware floating-point. All floating-point numbers are stored as 48-bit double words. Single precision has a 24-bit signed fraction and a 9-bit signed exponent, double precision has a 39-bit fraction and a 9-bit exponent. Both the exponent and the fraction are stored in big-endian twos-complement format. The binary point is assumed to be immediately left of the high-order bit of the fraction. The value of the number is F*2E, where F is the fraction and E is the exponent.
The floating-point formats are:
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SDS 9 Series AI simulator
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SDS 9 Series
The SDS 9 Series computers are a backward compatible line of transistorized computers produced by Scientific Data Systems in the 1960s and 1970s. This line includes the SDS 910, SDS 920, SDS 925, SDS 930, SDS 940, and the SDS 945. The SDS 9300 is an extension of the 9xx architecture. The 1965 SDS 92 is an incompatible 12-bit system built using monolithic integrated circuits.
The 910 and 920 were first shipped in August, 1962. The 9300 was announced in June, 1963. The 925 and 930 were announced in 1964. The 940 was announced in 1965, and the 945 in 1968.
The 9 series was replaced by the SDS Sigma series.
All systems are 24-bit single address machines. Programmer-accessible registers are A (accumulator), B (extension), X (index), and P (program counter—14 bits), plus an overflow indicator. The 9300 has three index registers X1 through X3 which can be used as base registers to allow access to memory above 16K words. The W and Y registers are used for input/output.
Maximum address space is 214 or 16,384 words (16 KW—64 K char) on the 910 and 920. The 9300 and 930 support up to 32K (128 K char), and the 940 and 945 support up to 64K (256 K char), although the method for accessing the memory above 16K differs.
Fixed-point data is 24-bit, two's complement, big-endian.
Floating-point is implemented in software using "programmed operators", except on the SDS 9300 which has hardware floating-point. All floating-point numbers are stored as 48-bit double words. Single precision has a 24-bit signed fraction and a 9-bit signed exponent, double precision has a 39-bit fraction and a 9-bit exponent. Both the exponent and the fraction are stored in big-endian twos-complement format. The binary point is assumed to be immediately left of the high-order bit of the fraction. The value of the number is F*2E, where F is the fraction and E is the exponent.
The floating-point formats are: