Threshold voltage

The threshold voltage, commonly abbreviated as V_th or V_GS(th), of a field-effect transistor (FET) is the minimum gate-to-source voltage (V_GS) that is needed to create a conducting path between the source and drain terminals. It is an important scaling factor to maintain power efficiency.

When referring to a junction field-effect transistor (JFET), the threshold voltage is often called pinch-off voltage instead. This is somewhat confusing since pinch off applied to insulated-gate field-effect transistor (IGFET) refers to the channel pinching that leads to current saturation behavior under high source–drain bias, even though the current is never off. Unlike pinch off, the term threshold voltage is unambiguous and refers to the same concept in any field-effect transistor.

In n-channel enhancement-mode devices, a conductive channel does not exist naturally within the transistor. With no V_GS, dopant ions added to the body of the FET form a region with no mobile carriers called a depletion region. A positive V_GS attracts free-floating electrons within the body towards the gate. But enough electrons must be attracted near the gate to counter the dopant ions and form a conductive channel. This process is called inversion. The conductive channel connects from source to drain at the FET's threshold voltage. Even more electrons attract towards the gate at higher V_GS, which widens the channel.

The reverse is true for the p-channel "enhancement-mode" MOS transistor. When V_GS = 0 the device is “OFF” and the channel is open / non-conducting. The application of a negative gate voltage to the p-type "enhancement-mode" MOSFET enhances the channels conductivity turning it “ON”.

In contrast, n-channel depletion-mode devices have a conductive channel naturally existing within the transistor. Accordingly, the term threshold voltage does not readily apply to turning such devices on, but is used instead to denote the voltage level at which the channel is wide enough to allow electrons to flow easily.^{[citation needed]} This ease-of-flow threshold also applies to p-channel depletion-mode devices, in which a negative voltage from gate to body/source creates a depletion layer by forcing the positively charged holes away from the gate-insulator/semiconductor interface, leaving exposed a carrier-free region of immobile, negatively charged acceptor ions.

For the n-channel depletion MOS transistor, a sufficient negative V_GS will deplete (hence its name) the conductive channel of its free electrons switching the transistor “OFF”. Likewise for a p-channel "depletion-mode" MOS transistor a sufficient positive gate-source voltage will deplete the channel of its free holes, turning it “OFF”.

In wide planar transistors the threshold voltage is essentially independent of the drain–source voltage (V_DS) and is therefore a well defined characteristic, however it is less clear in modern nanometer-sized MOSFETs due to drain-induced barrier lowering.

In the figures, the source (left side) and drain (right side) are labeled n+ to indicate heavily doped (blue) n-regions. The depletion layer dopant is labeled N_A⁻ to indicate that the ions in the (pink) depletion layer are negatively charged and there are very few holes. In the (red) bulk the number of holes p = N_A making the bulk charge neutral.