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Tri-level sync
Tri-level sync
Tri-level sync
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An oscilloscope trace of a tri-level sync pulse

Tri-level sync is an analogue video synchronization pulse primarily used for the locking of high-definition video signals (genlock).

It is preferred in HD environments over black and burst, as timing jitter is reduced due to the nature of its higher frequency. It also benefits from having no DC content, as the pulses are in both polarities.[1]

Synchronization

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Modern real-time multi-source HD facilities have many pieces of equipment that all output HD-SDI video. If this baseband video is to be mixed, switched or luma keyed with any other sources, then they will need to be synchronous, i.e. the first pixel of the first line must be transmitted at the same time (within a few microseconds). This then allows the switcher to cut, mix or key these sources together with a minimal amount of delay (~1 HD video line 1/(1125×25) seconds for 50i video). This synchronization is done by supplying each piece of equipment with either a tri-level sync, or black-and-burst input. There are video switchers that do not require synchronous sources, but these operate with a much bigger delay.

Waveform

[edit]

The main pulse definition is as follows: a negative-going pulse of 300 mV lasting 40 sample clocks followed by a positive-going pulse of 300 mV lasting 40 sample clocks. The allowed rise/fall time for each of the transitions is 4 sample clocks. This is with a clock rate of 74.25 MHz.[2]

References

[edit]
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Tri-level sync

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from Grokipedia
Tri-level sync is an analog video signal primarily used for genlocking equipment, featuring three voltage levels—positive, zero, and negative—to deliver precise timing pulses that ensure frame alignment and minimize in professional production environments. Introduced with early HDTV standards such as SMPTE 240M, tri-level sync serves as the "heartbeat" for HD systems, synchronizing cameras, switchers, and media servers by marking the start of each video frame and conveying the . Unlike bi-level sync (also known as black burst), which relies on two voltage levels and is suited for standard-definition formats, tri-level sync eliminates the DC component through zero-crossing detection, providing sharper rise times and greater resilience to noise and multigenerational signal degradation. Technically, the sync pulse transitions from 0 V to -300 mV, then to +300 mV, and back to 0 V, with a total width of approximately 88 samples (each half at 44 samples) and a of 4 samples ±1.5, optimized for the higher bandwidth of HD signals. SMPTE standards, including 274M for formats, recommend tri-level sync for (such as , , and ) to maintain compliance and avoid excessive that could violate specifications like SMPTE 292M. It is generated by dedicated sync generators and distributed via cables, supporting specific frame rates (e.g., 59.94 Hz or 50 Hz) without accommodating multiple standards simultaneously on a single signal. In modern workflows, tri-level sync extends to 4K and ultra-high-definition systems, offering superior stability over composite or bi-level alternatives, and is essential for applications like live broadcasting, film post-production, and effects-heavy shoots requiring exact temporal alignment.

Background

Definition and Purpose

Tri-level sync is an analog signal used primarily for locking high-definition (HD) video signals via , characterized by a that transitions between three distinct voltage levels: positive, zero (ground or blanking), and negative. This design replaces traditional bi-level sync, providing a robust reference for HD systems where higher data rates demand precise timing. The primary purpose of tri-level sync is to deliver a precise timing reference that synchronizes multiple video sources, cameras, and in professional production environments, preventing signal drift and ensuring consistent frame alignment across devices. It functions as a facility-wide "heartbeat" generated by a central sync generator and distributed to all connected equipment, enabling seamless integration and coordination in broadcast and workflows. Key benefits include reduced timing through fast rise-time edges and a zero-crossing point that is immune to gain, DC offset, and response errors, which enhances reliability in high-bandwidth HD formats. Additionally, its zero-DC content eliminates offset issues common in bi-level methods, supporting stricter jitter requirements and formats like 24 Hz film rates without the limitations of 50/60 Hz references.

Historical Development

Tri-level sync emerged in the mid-1990s as broadcasting transitioned from standard-definition (SD) to high-definition (HD) video formats, addressing the shortcomings of bi-level sync signals that proved inadequate for the higher bandwidth and resolution demands of HD systems. Traditional bi-level sync, with its two voltage levels, suffered from increased susceptibility to noise and timing instability in the wider line structures and progressive scan modes of HD, necessitating a more robust synchronization method to maintain precise frame and line alignment across production equipment. The standard was first formalized in SMPTE 240M, published in 1995, which defined signal parameters for 1125-line analog HDTV production systems and introduced tri-level sync to provide cleaner separation of horizontal and vertical timing information through three distinct voltage levels and faster rise times. This innovation aligned with SMPTE's broader efforts to standardize HD infrastructure, culminating in key milestones around 1998–2000, including SMPTE 274M for 1920×1080 image structures and SMPTE 292M for the 1.485 Gb/s HD-SDI serial interface, both of which incorporated tri-level sync for genlocking in professional environments. Early adoption occurred in HD production facilities for film and television, where multi-camera setups required reduced timing errors and stable synchronization for widescreen progressive formats, enabling smoother integration of cameras, switchers, and effects generators. Initially deployed in analog interfaces, tri-level sync evolved with the shift to digital workflows, becoming embedded in HD-SDI systems by the early 2000s while retaining its analog reference role for . Tri-level sync continues to be used in 4K and UHD production environments, with sync generators supporting the necessary frame rates and line structures for these formats while maintaining core analog principles.

Technical Specifications

Waveform Characteristics

The tri-level sync signal serves as a periodic timing reference in systems, featuring horizontal sync pulses that occur once per video line alongside vertical sync intervals to mark frame boundaries. The overall structure begins and ends at the blanking level of 0 V, dipping to a negative before rising to a positive one within each sync period, creating a balanced, three-level pattern that facilitates reliable without introducing DC offset. Within each horizontal sync period, the pulse components consist of a sharp negative-going immediately followed by a positive-going one, forming a symmetric bipolar pulse that replaces the simpler bi-level sync used in standard definition formats. Notably, this signal excludes any color burst component, distinguishing it from black burst references that incorporate subcarrier information for analog . A representative waveform diagram depicts the sync tip reaching -300 mV, the positive overscan peak at +300 mV, and the intervening blanking level at 0 V, underscoring the equal-amplitude polarities that promote DC-free transmission and enhance over long cable runs. This balanced design centers the timing reference at the zero-crossing point, mitigating errors from gain variations or DC shifts. A defining characteristic of the tri-level sync waveform is its fast rise and fall times, which accommodate the elevated bandwidth demands of HD line rates and allow for precise in sync extraction circuits.

Timing and Voltage Parameters

The tri-level sync signal is defined with precise voltage levels to facilitate accurate in high-definition video systems. The sync tip reaches a negative level of -300 mV, the positive overscan level is +300 mV, and the blanking level is maintained at 0 V, providing a typical amplitude of ±300 mV when the signal is terminated into 75 Ω. These levels include a tolerance of ±6 mV for the positive peak, as specified in SMPTE ST 274:2014 for 1920 × 1080 image structure and scanning. The horizontal sync pulse consists of negative and positive excursions, each with a duration of 44 clock cycles (approximately 0.593 μs), resulting in a total horizontal sync width of 88 clock cycles (about 1.186 μs); this is at the 74.25 MHz reference clock frequency used for 1080-line formats at 59.94/60 Hz. The horizontal period is given by the equation H=1fLH = \frac{1}{f_L}, where fLf_L is the line rate—for example, 14.83 μs for 1080p at 59.94 Hz (line rate of 67.432 kHz) or 29.66 μs for 1080i at 59.94 Hz (line rate of 33.716 kHz). Vertical sync incorporates multiple horizontal line pulses over several lines to identify and distinguish fields, typically using five broad pulses during the vertical interval for interlaced formats. The reference clock frequency is 74.25 MHz for nominal 60 Hz formats and 74.25 / 1.001 MHz (approximately 74.17 MHz) for 59.94 Hz variants to maintain precise timing alignment. Rise and fall times for the tri-level sync transitions are limited to a maximum of 0.05 μs (nominal 4 clock cycles at 74.25 MHz, or 53.87 ns from 10% to 90% ), with a tolerance of ±1.5 clock cycles to minimize distortion and support sharp edges for low-jitter performance. Professional sync generators, such as the SPG700, achieve timing stability of less than 1 ns RMS, which is essential for low-jitter performance in HD production environments.

Applications

Synchronization in HD Production

Tri-level sync serves as the primary timing reference in high-definition (HD) video production environments, enabling the coordination of diverse equipment to maintain frame-accurate alignment between video sources and embedded audio. Originating from a central sync , the signal is distributed via dedicated outputs to cameras, video switchers, video tape recorders (VTRs), and audio embedders, ensuring that all devices operate in unison for tasks such as multi-camera shoots and source mixing while preserving lip-sync integrity. The process relies on production devices extracting the tri-level sync's precise rising and falling edges—typically referenced at half-height—to lock their internal oscillators and clocks, which generates sampling rates aligned with HD standards like 74.25 MHz for /. This locking allows active video to commence at controlled offsets, such as 1-2 lines of delay, accommodating processing latencies in switchers and embedders without introducing or drift. In practical applications, tri-level sync is indispensable for live broadcasts, where it facilitates glitch-free transitions between camera feeds and overlays; editing suites, supporting multi-format timelines in and 4K resolutions; and virtual production sets, aligning live action with rendered elements to avoid frame slips during real-time . Facility-wide integration involves tri-level sync through distribution amplifiers to the signal reliably to numerous endpoints, while its compatibility with HD-SDI infrastructures eliminates the need for re-timing buffers in routing switchers, thereby minimizing latency and supporting extended cable runs up to 300 meters with appropriate cabling.

Integration with Systems

Genlock systems utilize tri-level sync as an external reference signal to synchronize the pixel clock and frame timing of video devices within a facility, ensuring precise alignment across multiple sources. The tri-level , with its distinct positive, zero, and negative voltage levels, delivers sharp, clean edges that facilitate reliable locking in phase-locked loops (PLLs) within the device's circuitry. This process begins with a central sync generator producing the tri-level signal, which is distributed via dedicated BNC connections to all genlock-capable equipment, such as cameras, switchers, and frame synchronizers. Devices then extract horizontal and vertical timing information directly from the sync pulses embedded in the tri-level signal, allowing the internal clocks to phase-align without introducing significant . In mixed standard-definition (SD) and high-definition (HD) environments, black burst signals can serve as a substitute reference for SD devices, while tri-level sync handles HD components; however, this requires format converters or multi-standard genlock modules to bridge the differences in pulse characteristics and prevent timing offsets. Implementation involves configuring the sync generator to match the facility's frame rate and format—such as 1080i59.94 or 720p59.94—followed by adjusting timing offsets (e.g., line, coarse, and fine delays) on receiving devices to achieve sub-pixel accuracy. Programmable sync generators enable support for variable frame rates by allowing user-defined outputs, ensuring flexibility in dynamic production setups. The integration of tri-level sync in genlock offers superior noise immunity and timing stability compared to bi-level alternatives, particularly for HD workflows at rates up to 3G-SDI (2.97 Gbps), due to its higher-frequency pulses and reduced susceptibility to interference. This results in lower jitter and more consistent frame locking, critical for high-resolution productions where even minor drifts can cause visible artifacts. Additionally, the waveform's design supports precise PLL operation, enhancing overall system reliability in large-scale facilities. As of 2024, tri-level sync generation synchronized to PTP enables precise timing in networked, IP-centric production environments, supporting multi-sensor applications. Despite these benefits, challenges arise from the need for dedicated HD sync distribution lines, separate from SD black burst infrastructure, to avoid signal degradation over long cable runs. Format or frame rate mismatches between the reference and devices can lead to timing drift or loss of lock, triggering internal flywheel modes for temporary stability; these issues are typically resolved using frame synchronizers that buffer and realign incoming signals to the reference. Proper cabling and configuration, such as loop-through BNCs with 75Ω termination, are essential to maintain signal integrity.

Standards and Comparisons

Relevant Standards

Tri-level sync is primarily defined by several key standards from the Society of Motion Picture and Television Engineers (SMPTE) and the (ITU), which establish its specifications for high-definition (HD) video synchronization. SMPTE ST 274:2008 specifies the 1920 × 1080 image sample structure, digital representation, and digital timing reference sequences for multiple picture rates in progressive and interlaced formats, including the structure and timing of tri-level sync pulses for and systems. This standard details the tri-level sync with positive and negative excursions around a zero-voltage blanking level, ensuring precise horizontal and vertical timing alignment. Similarly, SMPTE RP 168:2009 defines the vertical interval switching point for synchronous video switching in HD formats, incorporating tri-level sync to facilitate seamless transitions between sources without disrupting timing. BT.1120-8:2012 outlines digital interfaces for HDTV studio signals at 1.485 Gbit/s and 2.97 Gbit/s, integrating tri-level sync as the analog reference for timing and genlocking in parallel and serial digital connections supporting 1080-line formats. These standards collectively specify the tri-level sync waveform characteristics, voltage levels (typically -300 mV to +300 mV), and tolerances for edge timing in 1080i/p and 720p formats, with the latter addressed through complementary references like SMPTE ST 296 for 720p progressive scan. Extensions for ultra-high-definition (UHD) and 4K applications appear in SMPTE ST 2082-10:2018, which maps 12 Gbit/s serial digital interfaces (12G-SDI) for higher-resolution signals while maintaining tri-level sync compatibility for reference timing in multi-format environments. The scope emphasizes interoperability across global HD production chains, with tolerances defined to ±6 mV for peak levels and precise rise/fall times to support stable locking of cameras, switchers, and VTRs. The foundational SMPTE 274M standard originated in 1998 to support early HD adoption, with revisions in 2005 and 2008 incorporating refinements for digital timing sequences and colorimetry. Further updates through the 2010s and into the 2020s extended support for higher frame rates and resolutions, though core specifications for HD tri-level sync saw no major alterations after 2015. Compliance with these standards ensures reliable synchronization in international broadcasting, verified through oscilloscope measurements of sync edge timing and amplitude to confirm adherence to specified tolerances.

Comparison to Bi-level Sync

Bi-level sync, also known as black burst, is a two-level analog signal consisting of a sync tip below the blanking level and the blanking level itself, commonly used in standard-definition (SD) video formats such as and PAL. It includes a color subcarrier burst for phase-locking color information in systems. In contrast, tri-level sync employs a balanced with positive and negative excursions around a zero baseline, eliminating the DC component inherent in bi-level sync's unipolar design. This DC-free structure makes tri-level less susceptible to offset errors, particularly over long cable runs where DC shifts can degrade timing accuracy in bi-level signals. Additionally, tri-level sync operates at higher line rates suited to high-definition (HD) and ultra-high-definition (UHD) formats, such as 74.25 MHz for /60, compared to the 13.5 MHz sampling rate associated with SD bi-level references. Performance-wise, tri-level sync provides superior jitter tolerance and separation due to its sharper rise times and zero-crossing reference points, enabling more precise in bandwidth-intensive HD environments, whereas bi-level sync suffices for lower-resolution SD but often introduces greater timing when adapted to HD workflows. In mixed SD/HD facilities, bi-level signals typically require conversion to tri-level for compatibility, adding complexity and potential . Tri-level sync is the standard for genlocking HD and 4K/UHD production equipment, ensuring low-jitter frame alignment in professional broadcast and post-production settings, while bi-level remains prevalent for legacy SD systems. Hybrid setups frequently employ tri-level converters to interface NTSC/PAL black burst with modern HD infrastructure, facilitating seamless integration without full system overhauls.

References

  1. https://manual.viavision.pro/en/genlock-black-burst-tri-level/
  2. https://jwsoundgroup.net/index.php?/topic/15497-tri-level-sync-in-a-bi-level-world/
  3. https://www.hdhead.com/?p=112
  4. https://download.tek.com/document/20W_18580_0_0.pdf
  5. https://help.rossvideo.com/acuity/Topics/Setup/Video/Ref-Supported.html
  6. https://www.ensembledesigns.com/support/glossary/
  7. https://resi.io/blog/what-is-genlock/
  8. https://standards.globalspec.com/std/1087346/smpte-292
  9. https://lynx-usa.com/wp-content/uploads/2015/02/PTG1802_UserGuide-Rev1.2.pdf
  10. https://web.itu.edu.tr/pazarci/TEK_VideoGlossary_part_3.pdf
  11. https://download.tek.com/document/3GW_20975_3.pdf
  12. https://download.tek.com/document/25W-15960-6.pdf
  13. https://www.ti.com/lit/gpn/LMH1981
  14. https://download.tek.com/manual/SPG700-Specififcations-and-Performance-Verification-077122800.pdf
  15. https://ez.analog.com/video/f/q-a/7946/to-short-fall-times-on-tri-level-line-sync
  16. https://www.ensembledesigns.com/download/applications/SPG_TSG.pdf
  17. https://www.crystalvision.tv/wp/wp-content/uploads/2022/09/synner-ehdbrochure.pdf
  18. https://virtualset.com/product/aida-imaging-3g-sdi-hd-sdi-tri-level-genlock-sync-generator/
  19. https://wwwapps.grassvalley.com/docs/Manuals/modular/geckoflex/8985fsp/071-8431-03.pdf
  20. https://wwwapps.grassvalley.com/manuals/k2_summit_v10.1.3/core/x-cc/content/topic/k2/system/c_AboutTriLevelSync.html
  21. https://download.tek.com/manual/SPG8000-Master-Sync-Clock-Reference-Generator-Technical-Reference_0.pdf
  22. https://ieeexplore.ieee.org/document/10695636/
  23. https://standards.globalspec.com/std/1095006/smpte-st-274m
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