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Vienna Development Method
Vienna Development Method
from Wikipedia

The Vienna Development Method (VDM) is one of the longest-established formal methods for the development of computer-based systems. Originating in work done at the IBM Laboratory Vienna[1] in the 1970s, it has grown to include a group of techniques and tools based on a formal specification language—the VDM Specification Language (VDM-SL). It has an extended form, VDM++,[2] which supports the modeling of object-oriented and concurrent systems. Support for VDM includes commercial and academic tools for analyzing models, including support for testing and proving properties of models and generating program code from validated VDM models. There is a history of industrial usage of VDM and its tools and a growing body of research in the formalism has led to notable contributions to the engineering of critical systems, compilers, concurrent systems and in logic for computer science.

Philosophy

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Computing systems may be modeled in VDM-SL at a higher level of abstraction than is achievable using programming languages, allowing the analysis of designs and identification of key features, including defects, at an early stage of system development. Models that have been validated can be transformed into detailed system designs through a refinement process. The language has a formal semantics, enabling proof of the properties of models to a high level of assurance. It also has an executable subset, so that models may be analyzed by testing and can be executed through graphical user interfaces, so that models can be evaluated by experts who are not necessarily familiar with the modeling language itself.

History

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The origins of VDM-SL lie in the IBM Laboratory in Vienna where the first version of the language was called the Vienna Definition Language (VDL).[3] The VDL was essentially used for giving operational semantics descriptions in contrast to the VDM – Meta-IV which provided denotational semantics[4]

«Towards the end of 1972 the Vienna group again turned their attention to the problem of systematically developing a compiler from a language definition. The overall approach adopted has been termed the "Vienna Development Method"... The meta-language actually adopted ("Meta-IV") is used to define major portions of PL/1 (as given in ECMA 74 – interestingly a "formal standards document written as an abstract interpreter") in BEKIČ 74.»[5]

There is no connection between Meta-IV,[6] and Schorre's META II language, or its successor Tree Meta; these were compiler-compiler systems rather than being suitable for formal problem descriptions.

So Meta-IV was "used to define major portions of" the PL/I programming language. Other programming languages retrospectively described, or partially described, using Meta-IV and VDM-SL include the BASIC programming language, FORTRAN, the APL programming language, ALGOL 60, the Ada programming language and the Pascal programming language. Meta-IV evolved into several variants, generally described as the Danish, English and Irish Schools.

The "English School" derived from work by Cliff Jones on the aspects of VDM not specifically related to language definition and compiler design (Jones 1980, 1990). It stresses modelling persistent[7] state through the use of data types constructed from a rich collection of base types. Functionality is typically described through operations which may have side-effects on the state and which are mostly specified implicitly using a precondition and postcondition. The "Danish School" (Bjørner et al. 1982) has tended to stress a constructive approach with explicit operational specification used to a greater extent. Work in the Danish school led to the first European validated Ada compiler.

An ISO Standard for the language was released in 1996 (ISO, 1996).

VDM features

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The VDM-SL and VDM++ syntax and semantics are described at length in the VDMTools language manuals and in the available texts. The ISO Standard contains a formal definition of the language's semantics. In the remainder of this article, the ISO-defined interchange (ASCII) syntax is used. Some texts prefer a more concise mathematical syntax.

A VDM-SL model is a system description given in terms of the functionality performed on data. It consists of a series of definitions of data types and functions or operations performed upon them.

Basic types: numeric, character, token and quote types

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VDM-SL includes basic types modelling numbers and characters as follows:

Basic Types
bool Booleans false, true
nat natural numbers (including zero) 0, 1, 2, 3, 4, 5 ...
nat1 natural numbers (excluding zero) 1, 2, 3, 4, 5, ...
int integers ..., −3, −2, −1, 0, 1, 2, 3, ...
rat rational numbers a/b, where a and b are integers, b is not 0
real real numbers ...
char characters A, B, C, ...
token structureless tokens ...
<A> the quote type containing the value <A> ...

Data types are defined to represent the main data of the modelled system. Each type definition introduces a new type name and gives a representation in terms of the basic types or in terms of types already introduced. For example, a type modelling user identifiers for a log-in management system might be defined as follows:

types
UserId = nat

For manipulating values belonging to data types, operators are defined on the values. Thus, natural number addition, subtraction etc. are provided, as are Boolean operators such as equality and inequality. The language does not fix a maximum or minimum representable number or a precision for real numbers. Such constraints are defined where they are required in each model by means of data type invariants—Boolean expressions denoting conditions that must be respected by all elements of the defined type. For example, a requirement that user identifiers must be no greater than 9999 would be expressed as follows (where <= is the "less than or equal to" Boolean operator on natural numbers):

UserId = nat
inv uid == uid <= 9999

Since invariants can be arbitrarily complex logical expressions, and membership of a defined type is limited to only those values satisfying the invariant, type correctness in VDM-SL is not automatically decidable in all situations.

The other basic types include char for characters. In some cases, the representation of a type is not relevant to the model's purpose and would only add complexity. In such cases, the members of the type may be represented as structureless tokens. Values of token types can only be compared for equality – no other operators are defined on them. Where specific named values are required, these are introduced as quote types. Each quote type consists of one named value of the same name as the type itself. Values of quote types (known as quote literals) may only be compared for equality.

For example, in modelling a traffic signal controller, it may be convenient to define values to represent the colours of the traffic signal as quote types:

<Red>, <Amber>, <FlashingAmber>, <Green>

Type constructors: union, product and composite types

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The basic types alone are of limited value. New, more structured data types are built using type constructors.

Basic Type Constructors
T1 | T2 | ... | Tn Union of types T1,...,Tn
T1*T2*...*Tn Cartesian product of types T1,...,Tn
T :: f1:T1 ... fn:Tn Composite (Record) type

The most basic type constructor forms the union of two predefined types. The type (A|B) contains all elements of the type A and all of the type B. In the traffic signal controller example, the type modelling the colour of a traffic signal could be defined as follows:

SignalColour =  <Red> | <Amber> | <FlashingAmber> | <Green>

Enumerated types in VDM-SL are defined as shown above as unions on quote types.

Cartesian product types may also be defined in VDM-SL. The type (A1*…*An) is the type composed of all tuples of values, the first element of which is from the type A1 and the second from the type A2 and so on. The composite or record type is a Cartesian product with labels for the fields. The type

T :: f1:A1
     f2:A2
     ...
     fn:An

is the Cartesian product with fields labelled f1,…,fn. An element of type T can be composed from its constituent parts by a constructor, written mk_T. Conversely, given an element of type T, the field names can be used to select the named component. For example, the type

Date :: day:nat1
        month:nat1
        year:nat
inv mk_Date(d,m,y) == d<=31 and m<=12

models a simple date type. The value mk_Date(1,4,2001) corresponds to 1 April 2001. Given a date d, the expression d.month is a natural number representing the month. Restrictions on days per month and leap years could be incorporated into the invariant if desired. Combining these:

mk_Date(1,4,2001).month = 4

Collections

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Collection types model groups of values. Sets are finite unordered collections in which duplication between values is suppressed. Sequences are finite ordered collections (lists) in which duplication may occur and mappings represent finite correspondences between two sets of values.

Sets

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The set type constructor (written set of T where T is a predefined type) constructs the type composed of all finite sets of values drawn from the type T. For example, the type definition

UGroup = set of UserId

defines a type UGroup composed of all finite sets of UserId values. Various operators are defined on sets for constructing their union, intersections, determining proper and non-strict subset relationships etc.

Main operators on sets (s, s1, s2 are sets)
{a, b, c} Set enumeration: the set of elements a, b and c
{x | x:T & P(x)} Set comprehension: the set of x from type T such that P(x)
{i, ..., j} The set of integers in the range i to j
e in set s e is an element of set s
e not in set s e is not an element of set s
s1 union s2 Union of sets s1 and s2
s1 inter s2 Intersection of sets s1 and s2
s1 \ s2 Set difference of sets s1 and s2
dunion s Distributed union of set of sets s
s1 psubset s2 s1 is a (proper) subset of s2
s1 subset s2 s1 is a (weak) subset of s2
card s The cardinality of set s

Sequences

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The finite sequence type constructor (written seq of T where T is a predefined type) constructs the type composed of all finite lists of values drawn from the type T. For example, the type definition

String = seq of char

Defines a type String composed of all finite strings of characters. Various operators are defined on sequences for constructing concatenation, selection of elements and subsequences etc. Many of these operators are partial in the sense that they are not defined for certain applications. For example, selecting the 5th element of a sequence that contains only three elements is undefined.

The order and repetition of items in a sequence is significant, so [a, b] is not equal to [b, a], and [a] is not equal to [a, a].

Main operators on sequences (s, s1,s2 are sequences)
[a, b, c] Sequence enumeration: the sequence of elements a, b and c
[f(x) | x:T & P(x)] Sequence comprehension: sequence of expressions f(x) for each x of (numeric) type T such that P(x) holds
(x values taken in numeric order)
hd s The head (first element) of s
tl s The tail (remaining sequence after head is removed) of s
len s The length of s
elems s The set of elements of s
s(i) The ith element of s
inds s the set of indices for the sequence s
s1^s2 the sequence formed by concatenating sequences s1 and s2

Maps

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A finite mapping is a correspondence between two sets, the domain and range, with the domain indexing elements of the range. It is therefore similar to a finite function. The mapping type constructor in VDM-SL (written map T1 to T2 where T1 and T2 are predefined types) constructs the type composed of all finite mappings from sets of T1 values to sets of T2 values. For example, the type definition

Birthdays = map String to Date

Defines a type Birthdays which maps character strings to Date. Again, operators are defined on mappings for indexing into the mapping, merging mappings, overwriting extracting sub-mappings.

Main operators on mappings
{a |-> r, b |-> s} Mapping enumeration: a maps to r, b maps to s
{x |-> f(x) | x:T & P(x)} Mapping comprehension: x maps to f(x) for all x for type T such that P(x)
dom m The domain of m
rng m The range of m
m(x) m applied to x
m1 munion m2 Union of mappings m1 and m2 (m1, m2 must be consistent where they overlap)
m1 ++ m2 m1 overwritten by m2

Structuring

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The main difference between the VDM-SL and VDM++ notations are the way in which structuring is dealt with. In VDM-SL there is a conventional modular extension whereas VDM++ has a traditional object-oriented structuring mechanism with classes and inheritance.

Structuring in VDM-SL

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In the ISO standard for VDM-SL there is an informative annex that contains different structuring principles. These all follow traditional information hiding principles with modules and they can be explained as:

  • Module naming: Each module is syntactically started with the keyword module followed by the name of the module. At the end of a module the keyword end is written followed again by the name of the module.
  • Importing: It is possible to import definitions that has been exported from other modules. This is done in an imports section that is started off with the keyword imports and followed by a sequence of imports from different modules. Each of these module imports are started with the keyword from followed by the name of the module and a module signature. The module signature can either simply be the keyword all indicating the import of all definitions exported from that module, or it can be a sequence of import signatures. The import signatures are specific for types, values, functions and operations and each of these are started with the corresponding keyword. In addition these import signatures name the constructs that there is a desire to get access to. In addition optional type information can be present and finally it is possible to rename each of the constructs upon import. For types one needs also to use the keyword struct if one wish to get access to the internal structure of a particular type.
  • Exporting: The definitions from a module that one wish other modules to have access to are exported using the keyword exports followed by an exports module signature. The exports module signature can either simply consist of the keyword all or as a sequence of export signatures. Such export signatures are specific for types, values, functions and operations and each of these are started with the corresponding keyword. In case one wish to export the internal structure of a type the keyword struct must be used.
  • More exotic features: In earlier versions of the VDM-SL, tools there was also support for parameterized modules and instantiations of such modules. However, these features were taken out of VDMTools around 2000 because they were hardly ever used in industrial applications and there was a substantial number of tool challenges with these features.

Structuring in VDM++

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In VDM++ structuring are done using classes and multiple inheritance. The key concepts are:

  • Class: Each class is syntactically started with the keyword class followed by the name of the class. At the end of a class the keyword end is written followed again by the name of the class.
  • Inheritance: In case a class inherits constructs from other classes the class name in the class heading can be followed by the keywords is subclass of followed by a comma-separated list of names of superclasses.
  • Access modifiers: Information hiding in VDM++ is done in the same way as in most object oriented languages using access modifiers. In VDM++ definitions are per default private but in front of all definitions it is possible to use one of the access modifier keywords: private, public and protected.

Modelling functionality

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Functional modelling

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In VDM-SL, functions are defined over the data types defined in a model. Support for abstraction requires that it should be possible to characterize the result that a function should compute without having to say how it should be computed. The main mechanism for doing this is the implicit function definition in which, instead of a formula computing a result, a logical predicate over the input and result variables, termed a postcondition, gives the result's properties. For example, a function SQRT for calculating a square root of a natural number might be defined as follows:

SQRT(x:nat)r:real
post r*r = x

Here the postcondition does not define a method for calculating the result r but states what properties can be assumed to hold of it. Note that this defines a function that returns a valid square root; there is no requirement that it should be the positive or negative root. The specification above would be satisfied, for example, by a function that returned the negative root of 4 but the positive root of all other valid inputs. Note that functions in VDM-SL are required to be deterministic so that a function satisfying the example specification above must always return the same result for the same input.

A more constrained function specification is arrived at by strengthening the postcondition. For example, the following definition constrains the function to return the positive root.

SQRT(x:nat)r:real
post r*r = x and r>=0

All function specifications may be restricted by preconditions which are logical predicates over the input variables only and which describe constraints that are assumed to be satisfied when the function is executed. For example, a square root calculating function that works only on positive real numbers might be specified as follows:

SQRTP(x:real)r:real
pre x >=0
post r*r = x and r>=0

The precondition and postcondition together form a contract that to be satisfied by any program claiming to implement the function. The precondition records the assumptions under which the function guarantees to return a result satisfying the postcondition. If a function is called on inputs that do not satisfy its precondition, the outcome is undefined (indeed, termination is not even guaranteed).

VDM-SL also supports the definition of executable functions in the manner of a functional programming language. In an explicit function definition, the result is defined by means of an expression over the inputs. For example, a function that produces a list of the squares of a list of numbers might be defined as follows:

SqList: seq of nat -> seq of nat
SqList(s) == if s = [] then [] else [(hd s)**2] ^ SqList(tl s)

This recursive definition consists of a function signature giving the types of the input and result and a function body. An implicit definition of the same function might take the following form:

SqListImp(s:seq of nat)r:seq of nat
post len r = len s and
     forall i in set inds s & r(i) = s(i)**2

The explicit definition is in a simple sense an implementation of the implicitly specified function. The correctness of an explicit function definition with respect to an implicit specification may be defined as follows.

Given an implicit specification:

f(p:T_p)r:T_r
pre pre-f(p)
post post-f(p, r)

and an explicit function:

f:T_p -> T_r

we say it satisfies the specification iff:

forall p in set T_p & pre-f(p) => f(p):T_r and post-f(p, f(p))

So, "f is a correct implementation" should be interpreted as "f satisfies the specification".

State-based modelling

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In VDM-SL, functions do not have side-effects such as changing the state of a persistent global variable. This is a useful ability in many programming languages, so a similar concept exists; instead of functions, operations are used to change state variables (also known as globals).

For example, if we have a state consisting of a single variable someStateRegister : nat, we could define this in VDM-SL as:

 state Register of
   someStateRegister : nat
 end

In VDM++ this would instead be defined as:

 instance variables
   someStateRegister : nat

An operation to load a value into this variable might be specified as:

 LOAD(i:nat)
 ext wr someStateRegister:nat
 post someStateRegister = i

The externals clause (ext) specifies which parts of the state can be accessed by the operation; rd indicating read-only access and wr being read/write access.

Sometimes it is important to refer to the value of a state before it was modified; for example, an operation to add a value to the variable may be specified as:

 ADD(i:nat)
 ext wr someStateRegister : nat
 post someStateRegister = someStateRegister~ + i

Where the ~ symbol on the state variable in the postcondition indicates the value of the state variable before execution of the operation.

Examples

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The max function

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This is an example of an implicit function definition. The function returns the largest element from a set of positive integers:

 max(s:set of nat)r:nat
 pre card s > 0
 post r in set s and
      forall r' in set s & r' <= r

The postcondition characterizes the result rather than defining an algorithm for obtaining it. The precondition is needed because no function could return an r in set s when the set is empty.

Natural number multiplication

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 multp(i,j:nat)r:nat
 pre true
 post r = i*j

Applying the proof obligation forall p:T_p & pre-f(p) => f(p):T_r and post-f(p, f(p)) to an explicit definition of multp:

 multp(i,j) ==
  if i=0
  then 0
  else if is-even(i)
       then 2*multp(i/2,j)
       else j+multp(i-1,j)

Then the proof obligation becomes:

 forall i, j : nat & multp(i,j):nat and multp(i, j) = i*j

This can be shown correct by:

  1. Proving that the recursion ends (this in turn requires proving that the numbers become smaller at each step)
  2. Mathematical induction

Queue abstract data type

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This is a classical example illustrating the use of implicit operation specification in a state-based model of a well-known data structure. The queue is modelled as a sequence composed of elements of a type Qelt. The representation is Qelt is immaterial and so is defined as a token type.

 types

 Qelt = token;
 Queue = seq of Qelt;

 state TheQueue of
   q : Queue
 end

 operations

 ENQUEUE(e:Qelt)
 ext wr q:Queue
 post q = q~ ^ [e];

 DEQUEUE()e:Qelt
 ext wr q:Queue
 pre q <> []
 post q~ = [e]^q;

 IS-EMPTY()r:bool
 ext rd q:Queue
 post r <=> (len q = 0)

Bank system example

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As a very simple example of a VDM-SL model, consider a system for maintaining details of customer bank account. Customers are modelled by customer numbers (CustNum), accounts are modelled by account numbers (AccNum). The representations of customer numbers are held to be immaterial and so are modelled by a token type. Balances and overdrafts are modelled by numeric types.

 AccNum = token;
 CustNum = token;
 Balance = int;
 Overdraft = nat;

 AccData :: owner : CustNum
            balance : Balance

 state Bank of
   accountMap : map AccNum to AccData
   overdraftMap : map CustNum to Overdraft
 inv mk_Bank(accountMap,overdraftMap) == for all a in set rng accountMap & a.owner in set dom overdraftMap and
                                         a.balance >= -overdraftMap(a.owner)

With operations: NEWC allocates a new customer number:

 operations
 NEWC(od : Overdraft)r : CustNum
 ext wr overdraftMap : map CustNum to Overdraft
 post r not in set dom ~overdraftMap and overdraftMap = ~overdraftMap ++ { r |-> od};

NEWAC allocates a new account number and sets the balance to zero:

 NEWAC(cu : CustNum)r : AccNum
 ext wr accountMap : map AccNum to AccData
     rd overdraftMap map CustNum to Overdraft
 pre cu in set dom overdraftMap
 post r not in set dom accountMap~ and accountMap = accountMap~ ++ {r|-> mk_AccData(cu,0)}

ACINF returns all the balances of all the accounts of a customer, as a map of account number to balance:

 ACINF(cu : CustNum)r : map AccNum to Balance
 ext rd accountMap : map AccNum to AccData
 post r = {an |-> accountMap(an).balance | an in set dom accountMap & accountMap(an).owner = cu}

Tool support

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A number of different tools support VDM:

  • VDMTools was the leading commercial tools for VDM and VDM++, owned, marketed, maintained and developed by CSK Systems, building on earlier versions developed by the Danish Company IFAD. The manuals and a practical tutorial Archived 19 November 2008 at the Wayback Machine are available. All licenses are available, free of charge, for the full version of the tool. The full version includes automatic code generation for Java and C++, dynamic link library and CORBA support.
  • Overture is a community-based open source initiative aimed at providing freely available tool support for all VDM dialects (VDM-SL, VDM++ and VDM-RT) originally on top of the Eclipse platform but subsequently on top of the Visual Studio Code platform. Its aim is to develop a framework for interoperable tools that will be useful for industrial application, research and education.
  • vdm-mode is a collection of Emacs packages for writing VDM specifications using VDM-SL, VDM++ and VDM-RT. It supports syntax highlighting and editing, on-the-fly syntax checking, template completion and interpreter support.
  • SpecBox Archived 7 July 2011 at the Wayback Machine: from Adelard provides syntax checking, some simple semantic checking, and generation of a LaTeX file enabling specifications to be printed in mathematical notation. This tool is freely available but it is not being further maintained.
  • LaTeX and LaTeX2e macros are available to support the presentation of VDM models in the ISO Standard Language's mathematical syntax. They have been developed and are maintained by the National Physical Laboratory in the UK. Documentation and the macros are available online.

Industrial experience

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VDM has been applied widely in a variety of application domains. The most well-known of these applications are:

  • Ada and CHILL compilers: The first European validated Ada compiler was developed by Dansk Datamatik Center using VDM.[8] Likewise the semantics of CHILL and Modula-2 were described in their standards using VDM.
  • ConForm: An experiment at British Aerospace comparing the conventional development of a trusted gateway with a development using VDM.
  • Dust-Expert: A project carried out by Adelard in the UK for a safety related application determining that the safety is appropriate in the layout of industrial plants.
  • The development of VDMTools: Most components of the VDMTools tool suite are themselves developed using VDM. This development has been made at IFAD in Denmark and CSK in Japan.[9]
  • TradeOne: Certain key components of the TradeOne back-office system developed by CSK systems for the Japanese stock exchange were developed using VDM. Comparative measurements exist for developer productivity and defect density of the VDM-developed components versus the conventionally developed code.
  • FeliCa Networks have reported the development of an operating system for an integrated circuit for cellular telephone applications.

Refinement

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Use of VDM starts with a very abstract model and develops this into an implementation. Each step involves data reification, then operation decomposition.

Data reification develops the abstract data types into more concrete data structures, while operation decomposition develops the (abstract) implicit specifications of operations and functions into algorithms that can be directly implemented in a computer language of choice.

Data reification

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Data reification (stepwise refinement) involves finding a more concrete representation of the abstract data types used in a specification. There may be several steps before an implementation is reached. Each reification step for an abstract data representation ABS_REP involves proposing a new representation NEW_REP. In order to show that the new representation is accurate, a retrieve function is defined that relates NEW_REP to ABS_REP, i.e. retr : NEW_REP -> ABS_REP. The correctness of a data reification depends on proving adequacy, i.e.

 forall a:ABS_REP & exists r:NEW_REP & a = retr(r)

Since the data representation has changed, it is necessary to update the operations and functions so that they operate on NEW_REP. The new operations and functions should be shown to preserve any data type invariants on the new representation. In order to prove that the new operations and functions model those found in the original specification, it is necessary to discharge two proof obligations:

  • Domain rule:
 forall r: NEW_REP & pre-OPA(retr(r)) => pre-OPR(r)
  • Modelling rule:
 forall ~r,r:NEW_REP & pre-OPA(retr(~r)) and post-OPR(~r,r) => post-OPA(retr(~r,), retr(r))

Example data reification

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In a business security system, workers are given ID cards; these are fed into card readers on entry to and exit from the factory. Operations required:

  • INIT() initialises the system, assumes that the factory is empty
  • ENTER(p : Person) records that a worker is entering the factory; the workers' details are read from the ID card)
  • EXIT(p : Person) records that a worker is exiting the factory
  • IS-PRESENT(p : Person) r : bool checks to see if a specified worker is in the factory or not

Formally, this would be:

 types

 Person = token;
 Workers = set of Person;

 state AWCCS of
   pres: Workers
 end

 operations

 INIT()
 ext wr pres: Workers
 post pres = {};

 ENTER(p : Person)
 ext wr pres : Workers
 pre p not in set pres
 post pres = pres~ union {p};

 EXIT(p : Person)
 ext wr pres : Workers
 pre p in set pres
 post pres = pres~\{p};

 IS-PRESENT(p : Person) r : bool
 ext rd pres : Workers
 post r <=> p in set pres~

As most programming languages have a concept comparable to a set (often in the form of an array), the first step from the specification is to represent the data in terms of a sequence. These sequences must not allow repetition, as we do not want the same worker to appear twice, so we must add an invariant to the new data type. In this case, ordering is not important, so [a,b] is the same as [b,a].

The Vienna Development Method is valuable for model-based systems. It is not appropriate if the system is time-based. For such cases, the calculus of communicating systems (CCS) is more useful.

See also

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Further reading

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References

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Revisions and contributorsEdit on WikipediaRead on Wikipedia
from Grokipedia
The Vienna Development Method (VDM) is a model-oriented formal method for specifying, developing, and verifying computer-based systems and software, emphasizing mathematical rigor and abstraction to ensure properties such as correctness, safety, and reliability. Originating in the early at IBM's laboratory in , , it began as an approach to define the semantics of programming languages like using the Meta-IV notation, later evolving into a comprehensive for systematic [software engineering](/page/software engineering) by the . The core of VDM is its , VDM-SL (Vienna Development Method Specification Language), which allows modeling of types, invariants, operations, and functions through pre- and post-conditions, enabling formal and stepwise refinement from abstract specifications to executable code. VDM's key principles revolve around abstraction—suppressing implementation details to focus on essential behaviors—and rigorous proof of system properties using mathematical semantics, making it suitable for critical applications in domains like , , and healthcare. An extension, VDM++, incorporates object-oriented and concurrent features to address distributed systems, broadening its applicability beyond sequential software. The method supports a development process that includes model construction, validation via testing and animation, static analysis for consistency, and automated code generation, often yielding cost savings through early error detection. Standardized by the (ISO) as ISO/IEC 13817-1 in 1996, VDM-SL provides a formally defined interchange format and semantics, facilitating tool and industrial adoption. Open-source tools like enable model execution and verification, while suites such as VDMTools support advanced features like proof obligations and integration with other . Despite its age, VDM remains influential in formal engineering practices, with ongoing research enhancing its scalability for modern software challenges like real-time systems and cybersecurity.

Introduction and Philosophy

Overview

The Vienna Development Method (VDM) is a model-oriented method developed in the for the rigorous design and verification of computer-based systems and software. It originated from work at the laboratory in , emphasizing mathematical rigor in modeling system behaviors and data structures to ensure correctness and reliability. At its core, VDM aims to support for capturing , provide formal semantics to eliminate ambiguity in specifications, and enable stepwise refinement from abstract models to executable code. This approach facilitates verification through proofs of refinement steps, including data reification and operation , thereby bridging the gap between high-level designs and implementations. VDM has evolved into several dialects, notably VDM-SL, a standardized specification language for defining abstract models, and VDM++, an object-oriented extension that incorporates classes and concurrency features. In the software lifecycle, VDM plays a pivotal role by allowing executable specifications that can be tested early, refined iteratively, and transformed into production code while maintaining formal guarantees.

Philosophical Foundations

The Vienna Development Method (VDM) is grounded in the principle of , which involves suppressing irrelevant details to focus solely on those elements essential to the model's purpose, thereby separating concerns and facilitating the early detection of defects in . This approach allows developers to model systems at a high level of generality, reducing and enabling iterative refinement without being bogged down by specifics. By prioritizing abstraction as the primary technique, VDM promotes a clear understanding of core functionalities and behaviors, which helps in identifying ambiguities and errors before they propagate to later development stages. At the heart of VDM's philosophy lies its formal semantics, which provide a mathematical foundation for specifications, ensuring precision and unambiguity in describing system properties. This rigor is achieved through , originally developed using the , allowing specifications to be treated as mathematical objects amenable to proof and analysis. Such formal underpinnings enable the verification of consistency and completeness in models, distinguishing VDM from less structured approaches by offering a verifiable basis for reasoning about system correctness. VDM supports a unified framework that accommodates both functional and state-based modeling paradigms, allowing developers to choose or combine them based on the problem domain without sacrificing methodological consistency. In functional modeling, it emphasizes operations as mathematical functions with pre- and post-conditions, while state-based aspects model implicit state changes through explicit state variables and invariants. This flexibility ensures that VDM can address diverse software needs, from purely applicative computations to systems with persistent state, all within a coherent formal environment. A key tenet of VDM is the executability of specifications, which supports validation through testing, , and prototyping to explore model behavior interactively. This principle bridges the gap between formal modeling and practical development, enabling early feedback and refinement. Compared to informal methods, VDM offers superior precision by eliminating ambiguities inherent in descriptions and enhances through explicit links between specifications, proofs, and implementations, ultimately reducing residual errors and rework in downstream phases.

Historical Development

Origins and Early Work

The Development Method (VDM) originated in the early 1970s at the Laboratory in , where researchers sought to provide a rigorous formal semantics for programming languages, initially focusing on . This work built upon the Vienna Definition Language (VDL), an notation developed earlier in the decade to define the syntax and semantics of complex languages like , including its concurrency features through versions known as ULD I-III. By 1966, the first version of VDL had been printed, and the third and final version appeared in April 1969, enabling precise descriptions that supported compiler design experiments between 1968 and 1970. Key contributors to this foundational effort included Peter Lucas, who initiated collaborations and linked models with proofs; Hans Bekić, who advocated for ; Cliff B. Jones, who contributed to compiler-related aspects; Wolfgang Henhapl; and Dines Bjørner, who co-designed the approach during intensive team meetings from 1973 to 1975. In late 1972, the Vienna Laboratory was tasked with building a compiler, prompting a shift toward a more abstract, denotational style that evolved VDL into VDM. This transition culminated in the adoption of Meta-IV as the core notation in 1974, transforming it from a specialized tool for language definition into a general-purpose suitable for broader software development. Early applications of VDM and Meta-IV centered on the formal definition of a PL/I subset (excluding concurrency), which facilitated the validation and correctness proofs for compilers. This work demonstrated VDM's utility in analyzing computing concepts and engineering reliable systems, with the method's principles later documented in detail through team collaborations that emphasized rigorous notation over informal descriptions. By the mid-1970s, these efforts had laid the groundwork for using VDM in specifying semantics for other languages, enhancing compiler validation processes.

Evolution and Standardization

In the 1980s, VDM transitioned from a language for defining programming semantics to a comprehensive development method, with key advancements including the publication of Cliff B. Jones's "Systematic Software Development Using VDM" in 1986, which formalized core elements of the VDM Specification Language (VDM-SL). The Project, a major European initiative on computer-aided, intuition-guided programming (CIP), further advanced by applying wide-spectrum languages in large-scale , influencing VDM's practical refinement strategies. The first VDM in 1987 marked the beginning of international standardization efforts, fostering community consensus on the method's principles. The 1990s saw significant developments in extending VDM to support emerging paradigms, notably the introduction of VDM++ in the mid-1990s through the European Afrodite project, which incorporated object-oriented features like classes and inheritance to model complex systems. This era culminated in the formal standardization of VDM-SL as ISO/IEC 13817-1 in 1996, defining its syntax, static semantics, and interchange formats to ensure portability and interoperability across tools. The standard's adoption was bolstered by IFIP 2.3 on , where key figures like Cliff B. Jones (chair from 1987 to 1996) promoted VDM's integration into rigorous practices. Post-2000, VDM evolved through sustained community efforts, including the open-source toolset launched in 2005, which built on commercial VDMTools to provide integrated support for model , testing, and code generation. Tool maturation accelerated via EU-funded projects like and DESTECS, enabling minor extensions such as VDM-RT for modeling real-time and distributed systems with primitives for asynchronous communication and timing constraints. Reference manuals, including the VDM-SL Reference Guide (1991) and the VDM-10 Language Manual (updated through 2011), documented these updates, ensuring accessibility for practitioners. These milestones, driven by IFIP WG 2.3's ongoing involvement, solidified VDM's role in industrial applications like embedded systems and cyber-physical modeling, with the community continuing to hold annual workshops into the 2020s.

Core Language Features

Basic Types

The Vienna Development Method Specification Language (VDM-SL) defines a set of primitive basic types that form the foundation for constructing formal specifications, ensuring and semantic clarity in modeling software systems. These types include numeric, character, token, quote, and varieties, each with predefined values and operations that support rigorous mathematical reasoning without implementation-specific details. Numeric types in VDM-SL encompass nat for non-negative integers starting from 0, nat1 for positive integers starting from 1, int for all integers including negatives, rat for rational numbers, and real for real numbers with floating-point representation. These types are equipped with a comprehensive set of predefined arithmetic operations, including unary minus (-), absolute value (abs), floor (floor), and binary operations such as addition (+), subtraction (-), multiplication (*), division (/), integer division (div), remainder (rem), modulus (mod), exponentiation (**), and relational comparisons (<, >, <=, >=, =, <>). The semantics of these operations follow standard mathematical definitions, with division and related functions using floor-based rounding to handle precision; for instance, 7 div 3 evaluates to 2, and 7 rem 3 to 1. The character type char represents individual printable ASCII characters, such as 'a' or '1', and supports basic equality operations (=, <>) to compare values, returning results. Tokens, denoted by token, are used to model identifiers or strings in specifications, constructed via mk_token(expression) where the expression can be any valid VDM-SL term, and they too support only equality comparisons (=, <>), treating distinct expressions as unequal even if they evaluate similarly. Quote types provide enumerated constants, written as <literal> (e.g., <yes>, <no>), each forming a singleton type with no operations beyond equality (=, <>), ideal for representing fixed symbolic values without numeric interpretation. The boolean type bool includes the values true and false, along with an implicit undefined value bottom in the three-valued logic system. It features logical operations such as negation (not), conjunction (and), disjunction (or), implication (=>), and equivalence (<=>), all of which employ conditional evaluation to avoid propagating undefinedness unnecessarily; for example, false and expr evaluates to false without assessing expr. Equality (=, <>) is also defined for booleans. Type checking in VDM-SL distinguishes between strict and total functions to manage error handling for these basic types. Strict functions, marked with a bar (e.g., f: nat |-> int), fail or produce undefined results if any argument is undefined (bottom), enforcing rigorous definedness conditions during specification execution. In contrast, total functions (e.g., f: nat -> int) require all inputs to be defined and may incorporate preconditions to handle potential errors explicitly, promoting safer specification development. These basic types can be used as domains or ranges in function definitions to build more complex models.

Type Constructors

In the Vienna Development Method (VDM), type constructors enable the composition of basic types into more complex structures, facilitating the modeling of abstract data types with precise semantics. These constructors include union types, product types, composite types, and optional types, each serving distinct purposes in specifying data alternatives, ordered combinations, named records, and nullable values, respectively. Union types allow a value to belong to one of several alternative types, defined using the | operator in the syntax type = type1 | type2 | ... | typeN. Semantically, a encompasses all values from its constituent types, enabling or narrowing to determine the actual subtype, such as through the is_type predicate or narrow_ function. For example, an expression type might be specified as Expr = Const | Var | [Infix](/page/Infix) | Cond, where Const could be a composite type for constants and Var for variables, supporting operations like equality (=) and inequality (<>) across alternatives. This constructor is particularly useful for modeling polymorphic data without fixed structures. Product types represent ordered tuples of fixed length, constructed with the * operator, as in T = A1 * A2 * ... * An. Values are formed using the mk_ constructor, such as mk_(1, true) for an int * bool product, and accessed via indexed selection like t.#2 for the second component. Semantically, products enforce a strict positional relationship among components, with equality defined component-wise, making them suitable for representing simple pairs or n-tuples without named fields. For instance, a coordinate might be modeled as Point = real * real. Composite types, akin to , provide structured types with named fields, declared using the :: notation, e.g., Person :: name: seq of char age: nat. Instances are created with mk_Person("Alice", 30), and fields are accessed directly as p.name or via predicates like is_Person(p). Semantics include field selection, equality based on field values, and support for invariance through inv clauses that restrict valid instances, such as inv mk_Person(n, a) == a >= 0 and len n > 0, ensuring constraints like non-negative age and non-empty name. Subtype relations arise implicitly in type hierarchies, where composites can form part of unions, allowing broader compatibility while preserving invariance. This constructor is essential for defining domain-specific entities with semantic integrity. Optional types handle nullability by unioning a type with nil, abbreviated as [T] equivalent to T | nil. Syntactically, it uses square brackets, e.g., [seq of char] for an optional name, with values either as mk_(value) or nil. Semantically, operations like is_nil(opt) test for absence, and narrowing extracts the underlying value if present, providing a concise way to model optional attributes without explicit unions. For example, a variable declaration might include tp: [nat] to allow an optional . Invariance can apply to the non-nil case, reinforcing in specifications.

Collections

In the Vienna Development Method (VDM), particularly in its specification language VDM-SL, collections serve as fundamental aggregate data types for representing groups of values in models, enabling the specification of operations on multi-element structures without built-in size limits beyond finiteness. These include sets, sequences, and mappings, each designed to capture specific aspects of organization while integrating seamlessly with basic and composite types as their elements. Operations on collections support common mathematical and list manipulations, and quantification mechanisms allow expressing properties over their elements. Sets in VDM-SL model finite, unordered collections of unique elements from a type TT, denoted by the type constructor set of T. For instance, a set of numbers can be declared as S: set of nat. The non-empty variant is specified as set1 of T to ensure at least one element. Set literals use curly braces, such as {1, 2, 3} for or {x | x in set {1, ..., 5} & x mod 2 = 0} for comprehension to build sets conditionally. Key operations include union (s1 union s2), (s1 inter s2), difference (s1 \ s2), membership testing (e in set s), relation (s1 subset s2), and (card s), which returns the number of elements. These operations facilitate modeling scenarios like unique identifiers or disjoint groups, with union combining elements without duplicates and identifying common members. Sequences represent finite, ordered collections where duplicates are permitted, typed as seq of T for potentially empty lists or seq1 of T for non-empty ones. An example declaration is Q: seq of char, suitable for strings or ordered events. Literals appear as [1, 2, 2] for enumeration or [x * 2 | x <- inds Rs] for comprehensions over indices. Essential operations encompass head extraction (hd s for the first element), tail extraction (tl s for all but the first), length computation (len s), indexing (s(i) where ii is a natural number from 1 to len s), concatenation (s1 ^ s2), and index finding (inds s returning the set of valid positions). These enable the modeling of , queues, or time-series data, with concatenation preserving order and allowing repetition. Mappings function as finite partial functions from a domain type T1T_1 to a range type T2T_2, declared as map T1 to T2, with an injective variant inmap T1 to T2 ensuring unique mappings. For example, M: map nat to real might associate indices to values. Literals use maplets like {1 |-> 3.14, 2 |-> 2.71}, or comprehensions such as {i |-> i*i | i in set {1, ..., 5}}. Operations include domain extraction (dom m as a set of keys), range extraction (rng m as a set of values), application (m(k) yielding the value for key kk if defined), definedness check (defined(m, k) returning a boolean), union (m1 munion m2), and override (m1 ++ m2 where the second mapping takes precedence on overlaps). These support dictionary-like structures or relations, with application providing functional lookup and domain aiding iteration over keys. Iteration and quantification over collections use universal (forall) and existential (exists) quantifiers, typically bound to sets or sequences for expressing predicates. The syntax forall x in set S & P(x) asserts that property PP holds for every element xx in set SS, while exists x in set S & P(x) claims at least one such element; analogous forms apply to sequences using seq instead of set. For example, forall i in set inds s & s(i) > 0 verifies all positive elements in a sequence. These constructs are integral to preconditions, postconditions, and invariants, enabling concise statements about collection properties without explicit loops. Multiple variables can be quantified, as in forall x in set S1, y in set S2 & P(x, y), and they extend to mappings via domains.

Structuring Mechanisms

The Vienna Development Method (VDM) employs distinct structuring mechanisms in its dialects to organize specifications into modular and object-oriented units, facilitating abstraction, reusability, and scalability in formal modeling. In VDM-SL, the primary dialect for functional and state-based specifications, models are structured using modules that encapsulate related definitions, promoting a clear separation of concerns. A module is declared with the module keyword, followed by optional imports and exports clauses to manage dependencies and visibility. The imports clause allows a module to reference constructs from other modules, supporting renaming for clarity and avoiding namespace conflicts, while exports specifies what elements—such as types, values, functions, or operations—are visible externally, using options like all or selective lists. For instance, a module might export a type and an operation while importing a supporting type from another module, enabling layered specifications without exposing internal details. Within VDM-SL modules, specifications include type definitions with invariants, pure functions for computations without side effects, operations for state manipulation, and global state declarations. Types are defined under a types section, often with invariants to constrain values, such as digit = nat inv d == d < 10; functions appear in a functions section, like digval: digit -> nat digval(d) == ..., ensuring ; operations in an operations section can modify state, for example, withdrawal: account * real -> account ...; and state is defined globally via state with components, invariants, and initialization, such as state ident of account: ... init .... This modular approach supports composition through system modules, where subsystems are combined by importing and instantiating lower-level modules, forming hierarchical models without direct state sharing across modules to maintain encapsulation. VDM++, the object-oriented extension of VDM, shifts structuring toward classes to model systems with , polymorphism, and concurrency, making it suitable for detailed phases. A class is defined with the class keyword, containing instance variables, static variables, operations, and functions, with declared via is subclass of to extend superclasses, allowing of state and while overriding specifics. For example, class SelectionSort is subclass of Sort inherits sorting logic but customizes the selection mechanism. Instance variables are object-specific, declared as instance variables x: nat, while static variables are class-shared, prefixed with static, and initialized deterministically before instance creation. Instances are created dynamically with new ClassName(), supporting multiple objects from a single class blueprint. Concurrency is handled through threads, defined within classes using thread blocks that execute operations asynchronously, identified by threadid for . Permissions and access control in VDM++ enhance modularity by restricting visibility and mutability. Access modifiers—public, protected, and private—govern instance and static variables and operations, with public allowing external access, protected limiting to subclasses, and private confining to the class itself. Functions remain pure, incapable of modifying state or accessing global variables, contrasting with mutative operations that can alter instance or static state, ensuring predictable behavior in concurrent settings. For example, a pure function computes values solely from inputs, while a mutative operation like a thread's update method changes shared state under controlled permissions. Composition in VDM++ extends beyond modules to class relationships, where system-level models aggregate instances via composition or , often culminating in a top-level class that orchestrates subsystems. This mirrors VDM-SL's module composition but leverages object instances for dynamic assembly. The key differences lie in scope: VDM-SL emphasizes modular, flat or hierarchical specifications for abstract functional and state-based models, ideal for early requirements capture, whereas VDM++ provides object-oriented constructs for concrete designs, incorporating and threads to handle complexity in distributed or concurrent s.

Modeling Paradigms

Functional Modeling

Functional modeling in the Vienna Development Method (VDM) focuses on specifying system behavior through stateless mathematical functions that map inputs to outputs, promoting abstract and verifiable descriptions of functionality. These functions are central to , the , where they enable the modeling of computations without reference to mutable state, emphasizing and mathematical purity. Functions in VDM-SL are classified as total or partial: total functions are defined for all inputs in their domain, while partial functions use preconditions to restrict applicability, ensuring undefined behavior is explicit. All functions are pure, producing no side effects, which supports their use in compositional specifications.

Implicit Definitions

Implicit definitions characterize a function's behavior via preconditions and postconditions, abstractly relating inputs to outputs using logical expressions, including quantifiers like exists and forall. This approach avoids algorithmic details, allowing multiple implementations while ensuring correctness properties. For instance, the maximum of two integers can be specified as:

max(i: Z, j: Z) r: Z pre true post (r = i \/ r = j) /\ i <= r /\ j <= r

max(i: Z, j: Z) r: Z pre true post (r = i \/ r = j) /\ i <= r /\ j <= r

Here, the precondition is always true (total function), and the postcondition ensures the result is one of the inputs and at least as large as both. Satisfiability requires that for all valid inputs, there exists an output satisfying the postcondition.

Explicit Definitions

Explicit definitions provide a computational body, often recursive or using pattern matching, to directly express how the output is derived from inputs. Pattern matching decomposes structured arguments, such as sequences or records, facilitating concise recursive specifications. For example, the sum of a list can be defined recursively as:

lsum(t: list of Z) r: Z lsum(t) == cases t: nil -> 0, hd ^ tl -> hd + lsum(tl) end

lsum(t: list of Z) r: Z lsum(t) == cases t: nil -> 0, hd ^ tl -> hd + lsum(tl) end

This matches the list against nil (base case) or head-tail (recursive case), assuming well-formed inputs. s can still apply to handle partiality, as in a recursive :

fact(n: nat) r: nat pre n >= 0 fact(n) == if n = 0 then 1 else n * fact(n - 1)

fact(n: nat) r: nat pre n >= 0 fact(n) == if n = 0 then 1 else n * fact(n - 1)

The ensures non-negative input, with recursion proven via on natural numbers. Higher-order functions are supported through currying, where a multi-argument function like f: nat * nat -> nat can be partially applied (e.g., f(5) yields a function nat -> nat), enabling functions as arguments or return values for enhanced compositionality. The primary advantages of VDM's functional modeling lie in its composability—functions can be nested or combined mathematically—and provability, where tool-generated proof obligations verify consistency of definitions against types and logic. In hybrid models, these functions integrate with state-based elements to specify computations over persistent data.

State-Based Modeling

State-based modeling in the Vienna Development Method (VDM) centers on specifying systems with a persistent global state, captured through a structured that defines state variables and their invariants to maintain system consistency throughout execution. The state is typically declared using a record type within a module's STATE clause in VDM-SL, the core , allowing for composite structures such as , , or sets. For instance, in a simple queue , the state might be defined as state Queue of s: Qel* end, where s is a of queue elements, ensuring the state represents the current configuration of the . An invariant constrains valid states, such as inv mk_Queue(s) == forall i in set inds s & ... to enforce properties like no duplicates or bounded size, preventing invalid configurations from arising during operation executions. This approach enables reasoning about state transitions while abstracting details. Operations in state-based VDM specifications modify the state through implicit definitions using pre-conditions, post-conditions, and explicit access declarations, focusing on observable rather than internal steps. Pre-conditions specify valid and initial state conditions (e.g., pre s <> [] for a non-empty queue), while post-conditions describe the resulting state using notation like post new_s = old_s to reference prior values (often denoted as ↼−s). The external (ext) declares read (rd) or write (wr) access to state variables, implicitly defining the frame condition by limiting modifications to specified components and addressing the —ensuring unchanged parts remain invariant. For example, a dequeue operation could be specified as DEQUEUE() ext wr s: seq Qel pre s <> [] post s = tl(↼−s) ^ forall i in set inds ↼−s & i > 1 => s(i-1) = ↼−s(i), guaranteeing the front element is removed without altering the rest. This declarative style supports non-deterministic choices, where multiple post-conditions may hold, resolved through proofs or refinements. Initialization establishes the starting state via an clause, ensuring it satisfies the state invariant and provides a valid for subsequent operations. For the queue example, this might be init s == s = [], setting an empty that upholds any associated invariants like non-negative . Proof obligations arise to verify that initialization preserves consistency, enabling formal of the entire lifecycle from startup. History conditions, used in non-deterministic operations, relate outcomes to sequences of prior executions (e.g., via trace functions), distinguishing external (observable) and internal (hidden) choices to model reactive behaviors without full . In the object-oriented extension VDM++, state-based modeling extends to concurrent systems through threading, where multiple threads share object instances representing state components, synchronized via permissions and guards to manage concurrent access and avoid races. Threads are started with start statements and communicate via shared variables, with the state invariant enforced across executions to maintain thread safety. For example, a multi-threaded scheduler might define instance variables as state, with operations guarded by guard conditions before atomic execution. This supports distributed real-time specifications while inheriting VDM-SL's pre/post and frame mechanisms.

Examples and Applications

Basic Functions and Operations

The Vienna Development Method (VDM) employs VDM-SL, a that supports the definition of basic functions through implicit specifications using preconditions and postconditions, or explicit definitions providing algorithmic details. These constructs enable precise modeling of simple operations on basic types like natural numbers, ensuring mathematical rigor in software specifications. A canonical example is the maximum function for two integers, specified implicitly to capture its intended behavior without prescribing an implementation. The function signature is max(i: Z, j: Z) r: Z, with precondition true (indicating total definition) and postcondition (r = i ∨ r = j) ∧ (i ≤ r) ∧ (j ≤ r), meaning the result is one of the inputs and at least as large as both. An equivalent explicit definition provides a direct computation: max(i, j) ≜ if i ≤ j then j else i. Correctness of this explicit form follows from case analysis: if i ≤ j, then j satisfies the postcondition as j ≥ i and j = j; otherwise, i > j implies i satisfies it similarly. Another fundamental operation is multiplication, defined recursively to illustrate in VDM. The function Mult(m: nat, n: nat) r: nat has the explicit recursive definition Mult(m, n) ≜ if n = 0 then 0 else m + Mult(m, n-1). Its correctness is proved by on n: the base case n=0 yields Mult(m, 0) = 0, matching the multiplicative identity; for the inductive step, assuming Mult(m, k) = m * k for k < n, then Mult(m, n) = m + Mult(m, n-1) = m + m * (n-1) = m * n by arithmetic properties. This recursion terminates since n decreases toward 0 in each call. VDM-SL incorporates static type checking to verify that function applications conform to declared types, such as ensuring arguments to max or Mult are integers or naturals, respectively; mismatches, like passing a real to Mult, trigger errors during parsing or interpretation. Execution traces for explicit functions reveal step-by-step evaluation: for max(3, 5), the trace evaluates 3 ≤ 5 as true, returning 5; for Mult(2, 3), it unfolds as 2 + Mult(2, 2)2 + (2 + Mult(2, 1))2 + (2 + (2 + Mult(2, 0)))2 + (2 + (2 + 0)) = 6. Such traces, generated by tools like , aid in validation and debugging. These functional examples extend naturally to state-based operations in more complex models.

Abstract Data Types

In the Vienna Development Method (VDM), abstract data types (ADTs) are modeled using state-based specifications in VDM-SL, which encapsulate a hidden state along with operations that manipulate it while preserving invariants and adhering to pre- and post-conditions. This approach promotes reusability by defining self-contained data structures independent of specific implementations, focusing on observable behavior through input-output relations and state transformers. A classic example of an ADT in VDM is the queue, a first-in-first-out (FIFO) structure that manages a sequence of elements, such as tokens or natural numbers. The state is represented as a sequence type, ensuring ordered access where elements are added to the end and removed from the front. The specification includes an initialization to an empty sequence and frame conditions that restrict modifications to the relevant state component, preventing unintended side effects. No explicit invariant is typically required for a basic queue, though extensions might add constraints like element uniqueness if needed. The full specification for the queue ADT is as follows:

types Queue = seq of nat state QueueState of q : Queue end init QueueState == q = [] inv QueueState == true -- Enqueue: Add element to the end Enq(e: nat) ext wr q: Queue pre true post q = q~ ^ [e]; -- Dequeue: Remove and return element from the front Deq() r: nat ext rd q: Queue wr q: Queue pre len q > 0 post q~ = [r] ^ q; -- IsEmpty: Check if queue is empty IsEmpty() r: bool ext rd q: Queue pre true post r = (len q = 0) end QueueState ```[](https://raw.githubusercontent.com/overturetool/documentation/master/documentation/VDM10LangMan/VDM10_lang_man.pdf) Here, the `Enq` operation appends the input `e` to the current state using sequence concatenation (`^`), with no precondition since queues can always accept additions. The `Deq` operation outputs the front element `r` and updates the state by removing it, guarded by a precondition ensuring the queue is non-empty (`len q > 0`). The `IsEmpty` operation is a pure query, reading the state without modification and returning true if the sequence length is zero. Frame conditions (`ext wr q` or `rd q`) ensure only the queue state `q` is affected, aligning with VDM's emphasis on modular, verifiable designs.[](https://www.di.uminho.pt/~jno/ps/Jones1990.pdf) To validate such an ADT, VDM supports animation, where tools execute sequences of operations on the specification to test behavior. For instance, animating `Enq(5); Enq(3); Deq()` on an initial empty queue should yield `r=5` and leave `[3]` as the state, confirming FIFO ordering and precondition enforcement without runtime errors. This technique aids early detection of inconsistencies before refinement to code. ### System-Level Models System-level models in the Vienna Development Method (VDM) integrate abstract data types and operations to specify interactive components of larger systems, ensuring consistency through invariants and pre/post-conditions. A representative example is a banking system that manages customer accounts, balances, and transactions, demonstrating how VDM-SL captures state evolution and error handling for real-world applications.[](https://raw.githubusercontent.com/overturetool/documentation/master/documentation/VDM10LangMan/VDM10_lang_man.pdf) The state of the banking system is defined using a module named `AccountSys`, which maintains a mapping of account numbers to account records, including customer details and transaction history. The `Account` type is a composite record comprising the account number, customer details (as a token for name and other identifiers), current balance, overdraft limit, and a sequence of past transactions. Each `Transaction` is another composite with date, amount, and type (deposit or withdrawal), enforcing that amounts are positive. The state invariant requires that all account numbers match the keys in the map and that no account exceeds its overdraft limit, formally expressed as:

types Queue = seq of nat state QueueState of q : Queue end init QueueState == q = [] inv QueueState == true -- Enqueue: Add element to the end Enq(e: nat) ext wr q: Queue pre true post q = q~ ^ [e]; -- Dequeue: Remove and return element from the front Deq() r: nat ext rd q: Queue wr q: Queue pre len q > 0 post q~ = [r] ^ q; -- IsEmpty: Check if queue is empty IsEmpty() r: bool ext rd q: Queue pre true post r = (len q = 0) end QueueState ```[](https://raw.githubusercontent.com/overturetool/documentation/master/documentation/VDM10LangMan/VDM10_lang_man.pdf) Here, the `Enq` operation appends the input `e` to the current state using sequence concatenation (`^`), with no precondition since queues can always accept additions. The `Deq` operation outputs the front element `r` and updates the state by removing it, guarded by a precondition ensuring the queue is non-empty (`len q > 0`). The `IsEmpty` operation is a pure query, reading the state without modification and returning true if the sequence length is zero. Frame conditions (`ext wr q` or `rd q`) ensure only the queue state `q` is affected, aligning with VDM's emphasis on modular, verifiable designs.[](https://www.di.uminho.pt/~jno/ps/Jones1990.pdf) To validate such an ADT, VDM supports animation, where tools execute sequences of operations on the specification to test behavior. For instance, animating `Enq(5); Enq(3); Deq()` on an initial empty queue should yield `r=5` and leave `[3]` as the state, confirming FIFO ordering and precondition enforcement without runtime errors. This technique aids early detection of inconsistencies before refinement to code. ### System-Level Models System-level models in the Vienna Development Method (VDM) integrate abstract data types and operations to specify interactive components of larger systems, ensuring consistency through invariants and pre/post-conditions. A representative example is a banking system that manages customer accounts, balances, and transactions, demonstrating how VDM-SL captures state evolution and error handling for real-world applications.[](https://raw.githubusercontent.com/overturetool/documentation/master/documentation/VDM10LangMan/VDM10_lang_man.pdf) The state of the banking system is defined using a module named `AccountSys`, which maintains a mapping of account numbers to account records, including customer details and transaction history. The `Account` type is a composite record comprising the account number, customer details (as a token for name and other identifiers), current balance, overdraft limit, and a sequence of past transactions. Each `Transaction` is another composite with date, amount, and type (deposit or withdrawal), enforcing that amounts are positive. The state invariant requires that all account numbers match the keys in the map and that no account exceeds its overdraft limit, formally expressed as:

state AccountSys of accounts: AccNum -> Account inv AccountSys == forall num in set dom accounts • num = accounts(num).number end AccountSys

where `AccNum` and related tokens are defined as basic types, and the `Account` invariant includes `limit >= 0` and `balance >= -limit`. Initialization sets the accounts map to empty. This structure supports customer records by embedding identifiers in the details field, allowing queries on balances per customer.[](https://raw.githubusercontent.com/overturetool/documentation/master/documentation/VDM10LangMan/VDM10_lang_man.pdf) Operations such as `Deposit`, `Withdraw`, and `Transfer` manipulate the state while upholding invariants through explicit pre- and post-conditions. For instance, `Deposit` requires a valid account and positive amount, updating the balance additively and appending a deposit transaction:

where `AccNum` and related tokens are defined as basic types, and the `Account` invariant includes `limit >= 0` and `balance >= -limit`. Initialization sets the accounts map to empty. This structure supports customer records by embedding identifiers in the details field, allowing queries on balances per customer.[](https://raw.githubusercontent.com/overturetool/documentation/master/documentation/VDM10LangMan/VDM10_lang_man.pdf) Operations such as `Deposit`, `Withdraw`, and `Transfer` manipulate the state while upholding invariants through explicit pre- and post-conditions. For instance, `Deposit` requires a valid account and positive amount, updating the balance additively and appending a deposit transaction:

Deposit(numberIn: AccNum; amountIn: Real; dateIn: Date) ext wr accounts pre numberIn in set dom accounts and amountIn > 0 post accounts = accounts ++ {numberIn |-> let oldAcc = accounts(numberIn), newBal = oldAcc.balance + amountIn, newTrans = oldAcc.transactions ^ [mk_Transaction(dateIn, amountIn, )] in mk_Account(numberIn, oldAcc.details, newBal, oldAcc.limit, newTrans)};

`Withdraw` adds a check for sufficient funds relative to the limit, subtracting from the balance and recording the withdrawal if the pre-condition holds. `Transfer` extends this by coordinating two accounts: it verifies both exist, the source has adequate balance, and amounts are positive, then adjusts balances atomically (debit source, credit destination) while logging transactions on both. [Error](/page/Error) handling, such as insufficient funds, is managed via pre-condition failures, preventing invalid state transitions. These operations ensure atomicity and [traceability](/page/Traceability) in the model.[](https://raw.githubusercontent.com/overturetool/documentation/master/documentation/VDM10LangMan/VDM10_lang_man.pdf) To promote [maintainability](/page/Maintainability), the banking system can employ a modular structure in VDM-SL, separating concerns into distinct modules—for example, an `Accounts` module for [state management](/page/State_management) and invariants, and a `Transactions` module for operation logic that imports and extends the former. This allows independent development and reuse, with the overall system composing them via imports.[](https://raw.githubusercontent.com/overturetool/documentation/master/documentation/VDM10LangMan/VDM10_lang_man.pdf) Refinement from this abstract model to a concrete implementation involves data reification, where the abstract map of accounts is represented by a more efficient structure like an [array](/page/Array) or [list](/page/List) in the target [language](/page/Language), preserving observable behavior through retrieve functions that map concrete states back to abstract ones. For instance, reifying the accounts [map](/page/Map) to a sorted [array](/page/Array) enables [sequential access](/page/Sequential_access) while maintaining lookup invariants.[](https://raw.githubusercontent.com/overturetool/documentation/master/documentation/VDM10LangMan/VDM10_lang_man.pdf) ## Tool Support ### Commercial and Integrated Tools VDMTools is a comprehensive integrated development environment (IDE) originally developed as a commercial suite by IFAD in Denmark for supporting the Vienna Development Method (VDM), encompassing editing, type-checking, interpretation, and automatic code generation to languages such as Java, C++, and C#.[](https://www.sciencedirect.com/science/article/pii/S2352220815000954) It supports both VDM-SL (Specification Language) and VDM++ dialects, enabling formal modeling of systems with executable specifications.[](http://fmvdm.org/vdmtools/) Key features include syntax highlighting for enhanced readability, static semantic analysis to detect inconsistencies early, test coverage metrics to evaluate model thoroughness, and round-trip engineering capabilities that synchronize VDM models with UML diagrams and generated code.[](https://dl.acm.org/doi/10.1145/1361213.1361214) Historically, VDMTools evolved from the IFAD VDM Toolbox in the [1990s](/page/1990s), with significant [bootstrapping](/page/Bootstrapping) where parts of the tool itself were developed using VDM, and following IFAD's bankruptcy in 2004, its intellectual property was acquired by CSK Corporation in [Japan](/page/Japan), leading to continued enhancements.[](https://www.jucs.org/jucs_7_8/ten_years_of_historical/Larsen_P_G.html) As of 2025, VDMTools has transitioned to a free and open-source model under the FMVDM project, with release 9.0.7 incorporating updates aligned with VDM-10 standards, such as support for pure operations, execution measures, and composite type ordering, while integrating with modern environments like [Visual Studio Code](/page/Visual_Studio_Code) through extensions for improved workflow.[](http://fmvdm.org/vdmtools/) This evolution has made it a staple for professional VDM practitioners seeking robust, integrated support without licensing costs. SpecBox, developed by Adelard, is a specialized commercial toolkit for the [British Standards](/page/British_Standards) Institution (BSI) variant of VDM, focusing on syntax and basic semantic checking, specification parsing, and automated generation of LaTeX-formatted documents for printable outputs.[](https://ieeexplore.ieee.org/document/51719) It has been particularly applied in safety-critical domains, including railway signaling specifications, where it facilitates rigorous input validation and documentation for complex systems like interlockings and control protocols.[](https://www.iosrjournals.org/iosr-jce/papers/Vol11-issue5/G01153739.pdf) While earlier tools like SpecBox laid foundational support for VDM in industry, contemporary integrated suites such as VDMTools have expanded on these capabilities with broader [language](/page/Language) generation and analysis features.[](https://www.researchgate.net/publication/220177638_VDMTools_Advances_in_support_for_formal_modeling_in_VDM) ### Open-Source and Community Tools The [Overture Tool](/page/Overture) serves as the primary open-source [integrated development environment](/page/Integrated_development_environment) (IDE) for the Vienna Development Method (VDM), supporting dialects such as VDM-SL and VDM++. Built on the [Eclipse](/page/Eclipse) platform, it enables model development, syntax checking, type checking, and interpretation of VDM specifications.[](https://www.overturetool.org/) Key features include automated generation of proof obligations for [theorem](/page/Theorem) proving, integration with the [Alloy](/page/Alloy) analyzer for [model checking](/page/Model_checking) to detect inconsistencies, and code generation to [Java](/page/Java) or C++ for prototyping and implementation.[](https://github.com/overturetool/overture) The tool is actively maintained by an international community through the Overture project on [GitHub](/page/GitHub), with contributions focusing on enhancing usability and extensibility for academic and research applications.[](https://github.com/overturetool) For users preferring text-based editors, vdm-mode provides Emacs support for VDM specifications in VDM-SL, VDM++, and VDM-RT. This major mode offers syntax highlighting, indentation, and basic evaluation capabilities, facilitating efficient editing and navigation of formal models without a full IDE.[](https://github.com/peterwvj/vdm-mode) It replaces ASCII notations with more readable symbols and includes utilities for commenting and outlining code structure, making it suitable for lightweight specification authoring in research environments.[](https://www.overturetool.org/community/related-tools.html) To aid in documentation, the vdmlisting LaTeX package extends the listings environment for typesetting VDM-SL source code with proper syntax highlighting and formatting. Available through the Comprehensive TeX Archive Network (CTAN), it defines language-specific styles for keywords, comments, and mathematical constructs, ensuring professional presentation of specifications in academic papers and reports.[](https://ctan.org/pkg/vdmlisting) Recent community-driven advancements as of 2025 include a Visual Studio Code extension for VDM language support, which provides syntax highlighting, error detection, and integration with Overture's backend for evaluation and debugging directly in the VS Code editor. Additionally, Overture has been integrated with the ProB model checker via its Java API, allowing animation and validation of implicit VDM specifications to uncover logical errors through constraint solving.[](https://link.springer.com/article/10.1007/s10703-020-00351-3) These extensions broaden accessibility for modern development workflows while leveraging the community's ongoing efforts to connect VDM with complementary formal verification tools.[](https://www.overturetool.org/) ## Industrial Use and Refinement ### Case Studies in Industry One prominent industrial application of VDM involved the development of an [Ada compiler](/page/Compiler) by Dansk Datamatik Center (DDC) in the 1980s. The project utilized [Meta-IV](/page/Specification_language), the original VDM [specification language](/page/Specification_language), to formally define the compiler's semantics, including static and dynamic aspects such as [well-formedness](/page/Well-formedness) criteria and tasking behavior. This approach enabled rigorous verification through iterative refinement, resulting in a multipass [compiler](/page/Compiler) implementation that demonstrated VDM's suitability for large-scale software projects in terms of technical precision and [quality assurance](/page/Quality_assurance). In the domain of safety-critical systems, VDM-SL was applied to the Dust-Expert project by Adelard for the UK Health and Safety Executive. This expert system provides advisory support for managing dust explosion risks in chemical manufacturing processes, specifying relief venting designs and operational controls to enhance embedded safety mechanisms. The formalization using VDM-SL, supported by the Mural tool, facilitated error reduction during specification management and refinement, contributing to a reliable advisory tool for industrial hazard mitigation.[](https://www.sciencedirect.com/science/article/abs/pii/S0950584900001610) VDM++ found significant use in the TradeOne project, a back-office system for securities trading developed by CSK Systems in [Japan](/page/Japan) during the early [2000s](/page/2000s). The method was employed to model and verify two key subsystems—tax exemption processing and option handling—ensuring high reliability in a high-stakes financial environment prone to operational errors. This application, leveraging VDMTools for executable specifications, led to substantial effort reductions, with the tax subsystem achieving 74% savings and the option subsystem 60%, alongside low defect rates of 0.65 to 0.71 per thousand source instructions during integration.[](https://www.researchgate.net/publication/228640192_Recent_industrial_applications_of_VDM_in_Japan) FeliCa Networks, a Sony subsidiary, applied VDM++ to specify the operating system firmware for the Mobile FeliCa IC chip, enabling secure [smart card](/page/Smart_card) functionality in cellular phones as electronic purses. Over a three-year project involving a 50-60 person team without prior [formal methods](/page/Formal_methods) experience, VDM++ produced a 677-page external specification covering 86 commands and [file system](/page/File_system) [security](/page/Security), which was validated through extensive testing achieving 82% model coverage. The resulting 110,000 lines of C/C++ code exhibited zero post-release defects, with 440 issues detected early via VDM++ reviews and interpreter execution.[](https://www.researchgate.net/publication/228640192_Recent_industrial_applications_of_VDM_in_Japan) Across these case studies, VDM deployments have yielded notable cost savings through early defect detection and reduced rework, as evidenced by TradeOne's productivity gains and FeliCa's quality improvements without overall cost increases. However, challenges in scalability for large systems persist, including extended initial specification phases, the need for team training, and tool performance optimizations like interpreter enhancements to handle complex models efficiently.[](https://www.researchgate.net/publication/228640192_Recent_industrial_applications_of_VDM_in_Japan)[](https://www.sciencedirect.com/science/article/pii/S2352220815000954) ### Refinement Techniques In the Vienna Development Method (VDM), refinement techniques provide a structured approach to progressively transform abstract specifications into executable code while preserving correctness. These techniques emphasize stepwise development, where each refinement step reduces abstraction by introducing more concrete data representations and algorithmic details, guided by [formal proof](/page/Formal_proof) obligations to ensure the concrete model simulates the abstract one.[](https://www.di.uminho.pt/~jno/ps/Jones1990.pdf) Data reification in VDM involves mapping abstract data types to more concrete representations that are suitable for implementation, such as replacing mathematical sets with sequences or arrays to enable efficient operations. This process preserves the observable behavior of the abstract model by establishing a retrieve function that relates concrete states back to abstract states, ensuring that the reified data type supports the same functionality without altering the specification's intent. For instance, an abstract set of elements might be reified to a sequence, where the retrieve function extracts the unique elements while maintaining the set's invariant properties.[](https://www.di.uminho.pt/~jno/ps/Jones1990.pdf)[](https://link.springer.com/content/pdf/10.1007/BF02919424.pdf) The retrieve function, often denoted as $ \text{retr} $, is a total function from the concrete state space to the abstract state space, satisfying adequacy conditions to guarantee that every abstract value has at least one corresponding concrete representation. It forms the cornerstone of data reification proofs by enabling simulation between levels: for a concrete operation to correctly refine an abstract one, applying the retrieve function before and after the operation must yield results consistent with the abstract post-condition. In biased reifications, where the concrete model may retain additional details (e.g., order or history), the retrieve relation ensures monotonicity, preventing information loss that could violate the abstraction.[](https://www.di.uminho.pt/~jno/ps/Jones1990.pdf)[](https://link.springer.com/content/pdf/10.1007/BF02919424.pdf) Operation decomposition complements data reification by breaking down abstract operations—defined via pre- and post-conditions—into sequences of more detailed steps, such as loops or conditional statements, while preserving the overall semantics. This involves deriving proof obligations that verify each decomposed step maintains the abstract invariants and simulates the original operation's behavior under the retrieve function. For example, a non-deterministic abstract search might be decomposed into a deterministic binary search algorithm on a reified tree structure, with intermediate assertions ensuring progress and correctness.[](https://www.di.uminho.pt/~jno/ps/Jones1990.pdf)[](https://dl.acm.org/doi/pdf/10.1145/214448.214460) A representative example is the reification of a queue abstract data type, initially specified as $ \text{Queue} = \text{Qel}^* $ (a sequence of queue elements), supporting operations like ENQUEUE (adding an element) and DEQUEUE (removing the front element). This is reified to a concrete $ \text{Queueb} $ with fields $ s: \text{Qel}^* $ (the sequence) and $ i: \mathbb{N} $ (an index tracking the front), where the retrieve function $ \text{retr-Queue}(s, i) = s(i, \text{len}(s)) $ extracts the logical queue contents. The reification introduces efficiency by avoiding full sequence shifts in DEQUEUE, but requires proving the retrieve invariant holds and that operations like DEQUEUE preserve the post-condition $ \text{post-DEQUEUE}(\text{retr-Queue}(\langle s, i \rangle), \text{retr-Queue}(\langle s', i' \rangle)) $.[](https://www.di.uminho.pt/~jno/ps/Jones1990.pdf) Refinement correctness in VDM relies on discharging specific proof obligations, including type-correctness (ensuring the retrieve function is well-defined and total on the concrete domain) and monotonicity (verifying that the concrete operations do not introduce non-determinism beyond the abstract specification). The core rules are the domain rule, $$ \text{pre}_A(\text{retr}(\underline{r})) \Rightarrow \text{pre}_R(r) $$ and the result rule, $$ \text{pre}_A(\text{retr}(\underline{r})) \wedge \text{post}_R(\underline{r}, r) \Rightarrow \text{post}_A(\text{retr}(\underline{r}), \text{retr}(r)), $$ where $ A $ denotes the abstract operation, $ R $ the concrete one, $ \underline{r} $ the initial concrete state, and $ r $ the final. These obligations can be checked mechanically using VDM tools that generate and verify them against the models. Refinement techniques like these have been applied in industrial developments, such as railway signaling systems, to ensure reliable transitions from specification to code.[](https://www.di.uminho.pt/~jno/ps/Jones1990.pdf)[](https://link.springer.com/content/pdf/10.1007/BF02919424.pdf)

`Withdraw` adds a check for sufficient funds relative to the limit, subtracting from the balance and recording the withdrawal if the pre-condition holds. `Transfer` extends this by coordinating two accounts: it verifies both exist, the source has adequate balance, and amounts are positive, then adjusts balances atomically (debit source, credit destination) while logging transactions on both. [Error](/page/Error) handling, such as insufficient funds, is managed via pre-condition failures, preventing invalid state transitions. These operations ensure atomicity and [traceability](/page/Traceability) in the model.[](https://raw.githubusercontent.com/overturetool/documentation/master/documentation/VDM10LangMan/VDM10_lang_man.pdf) To promote [maintainability](/page/Maintainability), the banking system can employ a modular structure in VDM-SL, separating concerns into distinct modules—for example, an `Accounts` module for [state management](/page/State_management) and invariants, and a `Transactions` module for operation logic that imports and extends the former. This allows independent development and reuse, with the overall system composing them via imports.[](https://raw.githubusercontent.com/overturetool/documentation/master/documentation/VDM10LangMan/VDM10_lang_man.pdf) Refinement from this abstract model to a concrete implementation involves data reification, where the abstract map of accounts is represented by a more efficient structure like an [array](/page/Array) or [list](/page/List) in the target [language](/page/Language), preserving observable behavior through retrieve functions that map concrete states back to abstract ones. For instance, reifying the accounts [map](/page/Map) to a sorted [array](/page/Array) enables [sequential access](/page/Sequential_access) while maintaining lookup invariants.[](https://raw.githubusercontent.com/overturetool/documentation/master/documentation/VDM10LangMan/VDM10_lang_man.pdf) ## Tool Support ### Commercial and Integrated Tools VDMTools is a comprehensive integrated development environment (IDE) originally developed as a commercial suite by IFAD in Denmark for supporting the Vienna Development Method (VDM), encompassing editing, type-checking, interpretation, and automatic code generation to languages such as Java, C++, and C#.[](https://www.sciencedirect.com/science/article/pii/S2352220815000954) It supports both VDM-SL (Specification Language) and VDM++ dialects, enabling formal modeling of systems with executable specifications.[](http://fmvdm.org/vdmtools/) Key features include syntax highlighting for enhanced readability, static semantic analysis to detect inconsistencies early, test coverage metrics to evaluate model thoroughness, and round-trip engineering capabilities that synchronize VDM models with UML diagrams and generated code.[](https://dl.acm.org/doi/10.1145/1361213.1361214) Historically, VDMTools evolved from the IFAD VDM Toolbox in the [1990s](/page/1990s), with significant [bootstrapping](/page/Bootstrapping) where parts of the tool itself were developed using VDM, and following IFAD's bankruptcy in 2004, its intellectual property was acquired by CSK Corporation in [Japan](/page/Japan), leading to continued enhancements.[](https://www.jucs.org/jucs_7_8/ten_years_of_historical/Larsen_P_G.html) As of 2025, VDMTools has transitioned to a free and open-source model under the FMVDM project, with release 9.0.7 incorporating updates aligned with VDM-10 standards, such as support for pure operations, execution measures, and composite type ordering, while integrating with modern environments like [Visual Studio Code](/page/Visual_Studio_Code) through extensions for improved workflow.[](http://fmvdm.org/vdmtools/) This evolution has made it a staple for professional VDM practitioners seeking robust, integrated support without licensing costs. SpecBox, developed by Adelard, is a specialized commercial toolkit for the [British Standards](/page/British_Standards) Institution (BSI) variant of VDM, focusing on syntax and basic semantic checking, specification parsing, and automated generation of LaTeX-formatted documents for printable outputs.[](https://ieeexplore.ieee.org/document/51719) It has been particularly applied in safety-critical domains, including railway signaling specifications, where it facilitates rigorous input validation and documentation for complex systems like interlockings and control protocols.[](https://www.iosrjournals.org/iosr-jce/papers/Vol11-issue5/G01153739.pdf) While earlier tools like SpecBox laid foundational support for VDM in industry, contemporary integrated suites such as VDMTools have expanded on these capabilities with broader [language](/page/Language) generation and analysis features.[](https://www.researchgate.net/publication/220177638_VDMTools_Advances_in_support_for_formal_modeling_in_VDM) ### Open-Source and Community Tools The [Overture Tool](/page/Overture) serves as the primary open-source [integrated development environment](/page/Integrated_development_environment) (IDE) for the Vienna Development Method (VDM), supporting dialects such as VDM-SL and VDM++. Built on the [Eclipse](/page/Eclipse) platform, it enables model development, syntax checking, type checking, and interpretation of VDM specifications.[](https://www.overturetool.org/) Key features include automated generation of proof obligations for [theorem](/page/Theorem) proving, integration with the [Alloy](/page/Alloy) analyzer for [model checking](/page/Model_checking) to detect inconsistencies, and code generation to [Java](/page/Java) or C++ for prototyping and implementation.[](https://github.com/overturetool/overture) The tool is actively maintained by an international community through the Overture project on [GitHub](/page/GitHub), with contributions focusing on enhancing usability and extensibility for academic and research applications.[](https://github.com/overturetool) For users preferring text-based editors, vdm-mode provides Emacs support for VDM specifications in VDM-SL, VDM++, and VDM-RT. This major mode offers syntax highlighting, indentation, and basic evaluation capabilities, facilitating efficient editing and navigation of formal models without a full IDE.[](https://github.com/peterwvj/vdm-mode) It replaces ASCII notations with more readable symbols and includes utilities for commenting and outlining code structure, making it suitable for lightweight specification authoring in research environments.[](https://www.overturetool.org/community/related-tools.html) To aid in documentation, the vdmlisting LaTeX package extends the listings environment for typesetting VDM-SL source code with proper syntax highlighting and formatting. Available through the Comprehensive TeX Archive Network (CTAN), it defines language-specific styles for keywords, comments, and mathematical constructs, ensuring professional presentation of specifications in academic papers and reports.[](https://ctan.org/pkg/vdmlisting) Recent community-driven advancements as of 2025 include a Visual Studio Code extension for VDM language support, which provides syntax highlighting, error detection, and integration with Overture's backend for evaluation and debugging directly in the VS Code editor. Additionally, Overture has been integrated with the ProB model checker via its Java API, allowing animation and validation of implicit VDM specifications to uncover logical errors through constraint solving.[](https://link.springer.com/article/10.1007/s10703-020-00351-3) These extensions broaden accessibility for modern development workflows while leveraging the community's ongoing efforts to connect VDM with complementary formal verification tools.[](https://www.overturetool.org/) ## Industrial Use and Refinement ### Case Studies in Industry One prominent industrial application of VDM involved the development of an [Ada compiler](/page/Compiler) by Dansk Datamatik Center (DDC) in the 1980s. The project utilized [Meta-IV](/page/Specification_language), the original VDM [specification language](/page/Specification_language), to formally define the compiler's semantics, including static and dynamic aspects such as [well-formedness](/page/Well-formedness) criteria and tasking behavior. This approach enabled rigorous verification through iterative refinement, resulting in a multipass [compiler](/page/Compiler) implementation that demonstrated VDM's suitability for large-scale software projects in terms of technical precision and [quality assurance](/page/Quality_assurance). In the domain of safety-critical systems, VDM-SL was applied to the Dust-Expert project by Adelard for the UK Health and Safety Executive. This expert system provides advisory support for managing dust explosion risks in chemical manufacturing processes, specifying relief venting designs and operational controls to enhance embedded safety mechanisms. The formalization using VDM-SL, supported by the Mural tool, facilitated error reduction during specification management and refinement, contributing to a reliable advisory tool for industrial hazard mitigation.[](https://www.sciencedirect.com/science/article/abs/pii/S0950584900001610) VDM++ found significant use in the TradeOne project, a back-office system for securities trading developed by CSK Systems in [Japan](/page/Japan) during the early [2000s](/page/2000s). The method was employed to model and verify two key subsystems—tax exemption processing and option handling—ensuring high reliability in a high-stakes financial environment prone to operational errors. This application, leveraging VDMTools for executable specifications, led to substantial effort reductions, with the tax subsystem achieving 74% savings and the option subsystem 60%, alongside low defect rates of 0.65 to 0.71 per thousand source instructions during integration.[](https://www.researchgate.net/publication/228640192_Recent_industrial_applications_of_VDM_in_Japan) FeliCa Networks, a Sony subsidiary, applied VDM++ to specify the operating system firmware for the Mobile FeliCa IC chip, enabling secure [smart card](/page/Smart_card) functionality in cellular phones as electronic purses. Over a three-year project involving a 50-60 person team without prior [formal methods](/page/Formal_methods) experience, VDM++ produced a 677-page external specification covering 86 commands and [file system](/page/File_system) [security](/page/Security), which was validated through extensive testing achieving 82% model coverage. The resulting 110,000 lines of C/C++ code exhibited zero post-release defects, with 440 issues detected early via VDM++ reviews and interpreter execution.[](https://www.researchgate.net/publication/228640192_Recent_industrial_applications_of_VDM_in_Japan) Across these case studies, VDM deployments have yielded notable cost savings through early defect detection and reduced rework, as evidenced by TradeOne's productivity gains and FeliCa's quality improvements without overall cost increases. However, challenges in scalability for large systems persist, including extended initial specification phases, the need for team training, and tool performance optimizations like interpreter enhancements to handle complex models efficiently.[](https://www.researchgate.net/publication/228640192_Recent_industrial_applications_of_VDM_in_Japan)[](https://www.sciencedirect.com/science/article/pii/S2352220815000954) ### Refinement Techniques In the Vienna Development Method (VDM), refinement techniques provide a structured approach to progressively transform abstract specifications into executable code while preserving correctness. These techniques emphasize stepwise development, where each refinement step reduces abstraction by introducing more concrete data representations and algorithmic details, guided by [formal proof](/page/Formal_proof) obligations to ensure the concrete model simulates the abstract one.[](https://www.di.uminho.pt/~jno/ps/Jones1990.pdf) Data reification in VDM involves mapping abstract data types to more concrete representations that are suitable for implementation, such as replacing mathematical sets with sequences or arrays to enable efficient operations. This process preserves the observable behavior of the abstract model by establishing a retrieve function that relates concrete states back to abstract states, ensuring that the reified data type supports the same functionality without altering the specification's intent. For instance, an abstract set of elements might be reified to a sequence, where the retrieve function extracts the unique elements while maintaining the set's invariant properties.[](https://www.di.uminho.pt/~jno/ps/Jones1990.pdf)[](https://link.springer.com/content/pdf/10.1007/BF02919424.pdf) The retrieve function, often denoted as $ \text{retr} $, is a total function from the concrete state space to the abstract state space, satisfying adequacy conditions to guarantee that every abstract value has at least one corresponding concrete representation. It forms the cornerstone of data reification proofs by enabling simulation between levels: for a concrete operation to correctly refine an abstract one, applying the retrieve function before and after the operation must yield results consistent with the abstract post-condition. In biased reifications, where the concrete model may retain additional details (e.g., order or history), the retrieve relation ensures monotonicity, preventing information loss that could violate the abstraction.[](https://www.di.uminho.pt/~jno/ps/Jones1990.pdf)[](https://link.springer.com/content/pdf/10.1007/BF02919424.pdf) Operation decomposition complements data reification by breaking down abstract operations—defined via pre- and post-conditions—into sequences of more detailed steps, such as loops or conditional statements, while preserving the overall semantics. This involves deriving proof obligations that verify each decomposed step maintains the abstract invariants and simulates the original operation's behavior under the retrieve function. For example, a non-deterministic abstract search might be decomposed into a deterministic binary search algorithm on a reified tree structure, with intermediate assertions ensuring progress and correctness.[](https://www.di.uminho.pt/~jno/ps/Jones1990.pdf)[](https://dl.acm.org/doi/pdf/10.1145/214448.214460) A representative example is the reification of a queue abstract data type, initially specified as $ \text{Queue} = \text{Qel}^* $ (a sequence of queue elements), supporting operations like ENQUEUE (adding an element) and DEQUEUE (removing the front element). This is reified to a concrete $ \text{Queueb} $ with fields $ s: \text{Qel}^* $ (the sequence) and $ i: \mathbb{N} $ (an index tracking the front), where the retrieve function $ \text{retr-Queue}(s, i) = s(i, \text{len}(s)) $ extracts the logical queue contents. The reification introduces efficiency by avoiding full sequence shifts in DEQUEUE, but requires proving the retrieve invariant holds and that operations like DEQUEUE preserve the post-condition $ \text{post-DEQUEUE}(\text{retr-Queue}(\langle s, i \rangle), \text{retr-Queue}(\langle s', i' \rangle)) $.[](https://www.di.uminho.pt/~jno/ps/Jones1990.pdf) Refinement correctness in VDM relies on discharging specific proof obligations, including type-correctness (ensuring the retrieve function is well-defined and total on the concrete domain) and monotonicity (verifying that the concrete operations do not introduce non-determinism beyond the abstract specification). The core rules are the domain rule, $$ \text{pre}_A(\text{retr}(\underline{r})) \Rightarrow \text{pre}_R(r) $$ and the result rule, $$ \text{pre}_A(\text{retr}(\underline{r})) \wedge \text{post}_R(\underline{r}, r) \Rightarrow \text{post}_A(\text{retr}(\underline{r}), \text{retr}(r)), $$ where $ A $ denotes the abstract operation, $ R $ the concrete one, $ \underline{r} $ the initial concrete state, and $ r $ the final. These obligations can be checked mechanically using VDM tools that generate and verify them against the models. Refinement techniques like these have been applied in industrial developments, such as railway signaling systems, to ensure reliable transitions from specification to code.[](https://www.di.uminho.pt/~jno/ps/Jones1990.pdf)[](https://link.springer.com/content/pdf/10.1007/BF02919424.pdf)

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