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Wilson current mirror

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Wilson current mirror

A Wilson current mirror is a three-terminal circuit (Fig. 1) that accepts an input current at the input terminal and provides a "mirrored" current source or sink output at the output terminal. The mirrored current is a precise copy of the input current.

It may be used as a Wilson current source by applying a constant bias current to the input branch as in Fig. 2. The circuit is named after George R. Wilson, an integrated circuit design engineer who worked for Tektronix. Wilson devised this configuration in 1967 when he and Barrie Gilbert challenged each other to find an improved current mirror overnight that would use only three transistors. Wilson won the challenge.

There are three principal metrics of how well a current mirror will perform as part of a larger circuit.

An approximate analysis due to Gilbert shows how the Wilson current mirror works and why its static error should be very low. Transistors Q1 and Q2 in Fig. 1 are a matched pair sharing the same emitter and base potentials and therefore have and . This is a simple two-transistor current mirror with as its input and as its output. When a current is applied to the input node (the connection between the base of Q3 and collector of Q1), the voltage from that node to ground begins to increase. As it exceeds the voltage required to bias the emitter-base junction of Q3, Q3 acts as an emitter follower or common collector amplifier and the base voltage of Q1 and Q2 begins to rise. As this base voltage increases, current begins to flow in the collector of Q1. All increases in voltage and current stop when the sum of the collector current of Q1 and base current of Q3 exactly balance .[dubiousdiscuss] Under this condition all three transistors have nearly equal collector currents and therefore approximately equal base currents. Let . Then the collector current of Q1 is ; the collector current of Q2 is exactly equal to that of Q1 so the emitter current of Q3 is . The collector current of Q3 is its emitter current minus the base current so . In this approximation, the static error is zero.

A more exact formal analysis shows the expected static error. We assume:

Therefore, and . The base current of Q3 is given by, and the emitter current by,

From the sum of currents at the node shared by the emitter of Q3, the collector of Q2 and the bases of Q1 and Q2, the emitter current of Q3 must be:

Equating the expressions for in (1) and (2) gives:

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