Current mirror

There are three main specifications that characterize a current mirror. The first is the transfer ratio (in the case of a current amplifier) or the output current magnitude (in the case of a constant current source CCS). The second is its AC output resistance, which determines how much the output current varies with the voltage applied to the mirror. The third specification is the minimum voltage drop across the output part of the mirror necessary to make it work properly. This minimum voltage is dictated by the need to keep the output transistor of the mirror in active mode. The range of voltages where the mirror works is called the compliance range and the voltage marking the boundary between good and bad behavior is called the compliance voltage. There are also a number of secondary performance issues with mirrors, for example, temperature stability.

For small-signal analysis the current mirror can be approximated by its equivalent Norton impedance.

In large-signal hand analysis, a current mirror is usually and simply approximated by an ideal current source. However, an ideal current source is unrealistic in several respects:

• it has infinite AC impedance, while a practical mirror has finite impedance
• it provides the same current regardless of voltage, that is, there are no compliance range requirements
• it has no frequency limitations, while a real mirror has limitations due to the parasitic capacitances of the transistors
• the ideal source has no sensitivity to real-world effects like noise, power-supply voltage variations and component tolerances.

A bipolar transistor can be used as the simplest current-to-current converter but its transfer ratio would highly depend on temperature variations, β tolerances, etc. To eliminate these undesired disturbances, a current mirror is composed of two cascaded current-to-voltage and voltage-to-current converters placed at the same conditions and having reverse characteristics. It is not obligatory for them to be linear; the only requirement is their characteristics to be mirrorlike (for example, in the BJT current mirror below, they are logarithmic and exponential). Usually, two identical converters are used but the characteristic of the first one is reversed by applying a negative feedback. Thus a current mirror consists of two cascaded equal converters (the first – reversed and the second – direct).

If a voltage is applied to the BJT base-emitter junction as an input quantity and the collector current is taken as an output quantity, the transistor will act as an exponential voltage-to-current converter. By applying a negative feedback (simply joining the base and collector) the transistor can be "reversed" and it will begin acting as the opposite logarithmic current-to-voltage converter; now it will adjust the "output" base-emitter voltage so as to pass the applied "input" collector current.

The simplest bipolar current mirror (shown in Figure 1) implements this idea. It consists of two cascaded transistor stages acting accordingly as a reversed and direct voltage-to-current converters. The emitter of transistor Q₁ is connected to ground. Its collector and base are tied together, so its collector-base voltage is zero. Consequently, the voltage drop across Q₁ is V_BE, that is, this voltage is set by the diode law and Q₁ is said to be diode connected. (See also Ebers-Moll model.) It is important to have Q₁ in the circuit instead of a simple diode, because Q₁ sets V_BE for transistor Q₂. If Q₁ and Q₂ are matched, that is, have substantially the same device properties, and if the mirror output voltage is chosen so the collector-base voltage of Q₂ is also zero, then the V_BE-value set by Q₁ results in an emitter current in the matched Q₂ that is the same as the emitter current in Q₁^{[citation needed]}. Because Q₁ and Q₂ are matched, their β₀-values also agree, making the mirror output current the same as the collector current of Q₁.

The current delivered by the mirror for arbitrary collector-base reverse bias, V_CB, of the output transistor is given by:

${\displaystyle I_{\text{C}}=I_{\text{S}}\left(e^{\frac {V_{\text{BE}}}{V_{\text{T}}}}-1\right)\left(1+{\frac {V_{\text{CE}}}{V_{\text{A}}}}\right),}$

where I_S is the reverse saturation current or scale current; V_T, the thermal voltage; and V_A, the Early voltage. This current is related to the reference current I_ref when the output transistor V_CB = 0 V by:

${\displaystyle I_{\text{ref}}=I_{C}\left(1+{\frac {2}{\beta _{0}}}\right),}$

as found using Kirchhoff's current law at the collector node of Q₁:

${\displaystyle I_{\text{ref}}=I_{C}+I_{B1}+I_{B2}\ .}$

The reference current supplies the collector current to Q₁ and the base currents to both transistors – when both transistors have zero base-collector bias, the two base currents are equal, I_B1 = I_B2 = I_B.

${\displaystyle I_{\text{ref}}=I_{C}+I_{B}+I_{B}=I_{C}+2I_{B}=I_{C}\left(1+{\frac {2}{\beta _{0}}}\right),}$

Parameter β₀ is the transistor β-value for V_CB = 0 V.

If V_BC is greater than zero in output transistor Q₂, the collector current in Q₂ will be somewhat larger than for Q₁ due to the Early effect. In other words, the mirror has a finite output (or Norton) resistance given by the r_o of the output transistor, namely:

${\displaystyle R_{N}=r_{o}={\frac {V_{A}+V_{CE}}{I_{C}}}\ ,}$

where V_A is the Early voltage; and V_CE, the collector-to-emitter voltage of output transistor.

To keep the output transistor active, V_CB ≥ 0 V. That means the lowest output voltage that results in correct mirror behavior, the compliance voltage, is V_OUT = V_CV = V_BE under bias conditions with the output transistor at the output current level I_C and with V_CB = 0 V or, inverting the I–V relation above:

${\displaystyle V_{CV}=V_{T}\ln \left({\frac {I_{C}}{I_{S}}}+1\right),}$

where V_T is the thermal voltage; and I_S, the reverse saturation current or scale current.

When Q₂ has V_CB > 0 V, the transistors no longer are matched. In particular, their β-values differ due to the Early effect, with

${\displaystyle {\begin{aligned}\beta _{1}&=\beta _{0}\\\beta _{2}&=\beta _{0}\left(1+{\frac {V_{CB}}{V_{A}}}\right),\end{aligned}}}$

where V_A is the Early voltage and β₀ is the transistor β for V_CB = 0 V. Besides the difference due to the Early effect, the transistor β-values will differ because the β₀-values depend on current, and the two transistors now carry different currents (see Gummel–Poon model).

Further, Q₂ may get substantially hotter than Q₁ due to the associated higher power dissipation. To maintain matching, the temperature of the transistors must be nearly the same. In integrated circuits and transistor arrays where both transistors are on the same die, this is easy to achieve. But if the two transistors are widely separated, the precision of the current mirror is compromised.

Additional matched transistors can be connected to the same base and will supply the same collector current. In other words, the right half of the circuit can be duplicated several times. Note, however, that each additional right-half transistor "steals" a bit of collector current from Q₁ due to the non-zero base currents of the right-half transistors. This will result in a small reduction in the programmed current.

See also an example of a mirror with emitter degeneration to increase mirror resistance.

For the simple mirror shown in the diagram, typical values of ${\displaystyle \beta }$ will yield a current match of 1% or better.

The basic current mirror can also be implemented using MOSFET transistors, as shown in Figure 2. Transistor M₁ is operating in the saturation or active mode, and so is M₂. In this setup, the output current I_OUT is directly related to I_REF, as discussed next.

The drain current of a MOSFET I_D is a function of both the gate-source voltage and the drain-to-gate voltage of the MOSFET given by I_D = f(V_GS, V_DG), a relationship derived from the functionality of the MOSFET device. In the case of transistor M₁ of the mirror, I_D = I_REF. Reference current I_REF is a known current, and can be provided by a resistor as shown, or by a "threshold-referenced" or "self-biased" current source to ensure that it is constant, independent of voltage supply variations.^[1]

Using V_DG = 0 for transistor M₁, the drain current in M₁ is I_D = f(V_GS, V_DG=0), so we find: f(V_GS, 0) = I_REF, implicitly determining the value of V_GS. Thus I_REF sets the value of V_GS. The circuit in the diagram forces the same V_GS to apply to transistor M₂. If M₂ is also biased with zero V_DG and provided transistors M₁ and M₂ have good matching of their properties, such as channel length, width, threshold voltage, etc., the relationship I_OUT = f(V_GS, V_DG = 0) applies, thus setting I_OUT = I_REF; that is, the output current is the same as the reference current when V_DG = 0 for the output transistor, and both transistors are matched.

The drain-to-source voltage can be expressed as V_DS = V_DG + V_GS. With this substitution, the Shichman–Hodges model provides an approximate form for function f(V_GS, V_DG):^[2]

${\displaystyle {\begin{aligned}I_{\text{d}}&=f(V_{\text{GS}},V_{\text{DG}})\\&={\frac {1}{2}}K_{\text{p}}\left({\frac {W}{L}}\right)\left(V_{\text{GS}}-V_{\text{th}}\right)^{2}\left(1+\lambda V_{\text{DS}}\right)\\&={\frac {1}{2}}K_{\text{p}}\left[{\frac {W}{L}}\right]\left[V_{\text{GS}}-V_{\text{th}}\right]^{2}\left[1+\lambda (V_{\text{DG}}+V_{\text{GS}})\right],\\\end{aligned}}}$

where ${\displaystyle K_{\text{p}}}$ is a technology-related constant associated with the transistor, W/L is the width to length ratio of the transistor, ${\displaystyle V_{\text{GS}}}$ is the gate-source voltage, ${\displaystyle V_{\text{th}}}$ is the threshold voltage, λ is the channel length modulation constant, and ${\displaystyle V_{DS}}$ is the drain-source voltage.

Because of channel-length modulation, the mirror has a finite output (or Norton) resistance given by the r_o of the output transistor, namely (see channel length modulation):

${\displaystyle R_{\text{N}}=r_{\text{o}}={\frac {1}{I_{\text{D}}}}\left({\frac {1}{\lambda }}r+V_{\text{DS}}\right)={\frac {1}{I_{\text{D}}}}\left(V_{\text{E}}L+V_{\text{DS}}\right),}$

where λ = channel-length modulation parameter and V_DS is the drain-to-source bias.

To keep the output transistor resistance high, V_DG ≥ 0 V.^{[nb 1]} (see Baker).^[3] That means the lowest output voltage that results in correct mirror behavior, the compliance voltage, is V_OUT = V_CV = V_GS for the output transistor at the output current level with V_DG = 0 V, or using the inverse of the f-function, f⁻¹:

${\displaystyle V_{\text{CV}}=V_{\text{GS}}({\text{for}}\ I_{\text{D}}\ {\text{at}}\ V_{\text{DG}}=0V)=f^{-1}(I_{\text{D}})\ {\text{with}}\ V_{\text{DG}}=0\ .}$

For the Shichman–Hodges model, f⁻¹ is approximately a square-root function.

A useful feature of this mirror is the linear dependence of f upon device width W, a proportionality approximately satisfied even for models more accurate than the Shichman–Hodges model. Thus, by adjusting the ratio of widths of the two transistors, multiples of the reference current can be generated.

The Shichman–Hodges model^[4] is accurate only for rather dated^[when?] technology, although it often is used simply for convenience even today. Any quantitative design based upon new^[when?] technology uses computer models for the devices that account for the changed current-voltage characteristics. Among the differences that must be accounted for in an accurate design is the failure of the square law in V_gs for voltage dependence and the very poor modeling of V_ds drain voltage dependence provided by λV_ds. Another failure of the equations that proves very significant is the inaccurate dependence upon the channel length L. A significant source of L-dependence stems from λ, as noted by Gray and Meyer, who also note that λ usually must be taken from experimental data.^[5]

Due to the wide variation of V_th even within a particular device number discrete versions are problematic. Although the variation can be somewhat compensated for by using a Source degenerate resistor its value becomes so large that the output resistance suffers (i.e. reduces). This variation relegates the MOSFET version to the IC/monolithic arena.

Figure 3 shows a mirror using negative feedback to increase output resistance. Because of the op amp, these circuits are sometimes called gain-boosted current mirrors. Because they have relatively low compliance voltages, they also are called wide-swing current mirrors. A variety of circuits based upon this idea are in use,^[6][7][8] particularly for MOSFET mirrors because MOSFETs have rather low intrinsic output resistance values. A MOSFET version of Figure 3 is shown in Figure 4, where MOSFETs M₃ and M₄ operate in ohmic mode to play the same role as emitter resistors R_E in Figure 3, and MOSFETs M₁ and M₂ operate in active mode in the same roles as mirror transistors Q₁ and Q₂ in Figure 3. An explanation follows of how the circuit in Figure 3 works.

The operational amplifier is fed the difference in voltages V₁ − V₂ at the top of the two emitter-leg resistors of value R_E. This difference is amplified by the op amp and fed to the base of output transistor Q₂. If the collector base reverse bias on Q₂ is increased by increasing the applied voltage V_A, the current in Q₂ increases, increasing V₂ and decreasing the difference V₁ − V₂ entering the op amp. Consequently, the base voltage of Q₂ is decreased, and V_BE of Q₂ decreases, counteracting the increase in output current.

If the op-amp gain A_v is large, only a very small difference V₁ − V₂ is sufficient to generate the needed base voltage V_B for Q₂, namely

${\displaystyle V_{1}-V_{2}={\frac {V_{B}}{A_{v}}}.}$

Consequently, the currents in the two leg resistors are held nearly the same, and the output current of the mirror is very nearly the same as the collector current I_C1 in Q₁, which in turn is set by the reference current as

${\displaystyle I_{\text{ref}}=I_{C1}\left(1+{\frac {1}{\beta _{1}}}\right),}$

where β₁ for transistor Q₁ and β₂ for Q₂ differ due to the Early effect if the reverse bias across the collector-base of Q₂ is non-zero.

An idealized treatment of output resistance is given in the footnote.^{[nb 2]} A small-signal analysis for an op amp with finite gain A_v but otherwise ideal is based upon Figure 5 (β, r_O and r_π refer to Q₂). To arrive at Figure 5, notice that the positive input of the op amp in Figure 3 is at AC ground, so the voltage input to the op amp is simply the AC emitter voltage V_e applied to its negative input, resulting in a voltage output of −A_v V_e. Using Ohm's law across the input resistance r_π determines the small-signal base current I_b as:

${\displaystyle I_{\text{b}}={\frac {V_{\text{e}}}{\frac {r_{\pi }}{A_{\text{v}}+1}}}\ .}$

Combining this result with Ohm's law for ${\displaystyle R_{\text{E}}}$, ${\displaystyle V_{\text{e}}}$ can be eliminated, to find:^{[nb 3]}

${\displaystyle I_{\text{b}}=I_{\text{X}}{\frac {R_{\text{E}}}{R_{\text{E}}+{\frac {r_{\pi }}{A_{\text{v}}+1}}}}.}$

Kirchhoff's voltage law from the test source I_X to the ground of R_E provides:

${\displaystyle V_{\text{X}}=(I_{\text{X}}+\beta I_{\text{b)}}r_{\text{O}}+(I_{\text{X}}-I_{\text{b}})R_{\text{E}}.}$

Substituting for I_b and collecting terms the output resistance R_out is found to be:

${\displaystyle R_{\text{out}}={\frac {V_{\text{X}}}{I_{\text{X}}}}=r_{\text{O}}\left(1+\beta {\frac {R_{\text{E}}}{R_{\text{E}}+{\frac {r_{\pi }}{A_{\text{v}}+1}}}}\right)+R_{\text{E}}\|{\frac {r_{\pi }}{A_{\text{v}}+1}}.}$

For a large gain A_v ≫ r_π / R_E the maximum output resistance obtained with this circuit is

${\displaystyle R_{\text{out}}=(\beta +1)r_{O},}$

a substantial improvement over the basic mirror where R_out = r_O.

The small-signal analysis of the MOSFET circuit of Figure 4 is obtained from the bipolar analysis by setting β = g_m r_π in the formula for R_out and then letting r_π → ∞. The result is

${\displaystyle R_{\text{out}}=r_{\text{O}}\left[1+g_{\text{m}}R_{\text{E}}(A_{\text{v}}+1)\right]+R_{\text{E}}.}$

This time, R_E is the resistance of the source-leg MOSFETs M₃, M₄. Unlike Figure 3, however, as A_v is increased (holding R_E fixed in value), R_out continues to increase, and does not approach a limiting value at large A_v.

For Figure 3, a large op amp gain achieves the maximum R_out with only a small R_E. A low value for R_E means V₂ also is small, allowing a low compliance voltage for this mirror, only a voltage V₂ larger than the compliance voltage of the simple bipolar mirror. For this reason this type of mirror also is called a wide-swing current mirror, because it allows the output voltage to swing low compared to other types of mirror that achieve a large R_out only at the expense of large compliance voltages.

With the MOSFET circuit of Figure 4, like the circuit in Figure 3, the larger the op amp gain A_v, the smaller R_E can be made at a given R_out, and the lower the compliance voltage of the mirror.

There are many sophisticated current mirrors that have higher output resistances than the basic mirror (more closely approach an ideal mirror with current output independent of output voltage) and produce currents less sensitive to temperature and device parameter variations and to circuit voltage fluctuations. These multi-transistor mirror circuits are used both with bipolar and MOS transistors. These circuits include:

• the Widlar current source
• the Wilson current mirror used as a current source
• Cascoded current sources

• Current source
• Widlar current source
• Wilson current mirror
• Bipolar junction transistor
• MOSFET
• Channel length modulation
• Early effect