The CDC 8600 was the last of Seymour Cray's supercomputer designs while he worked for Control Data Corporation. As the natural successor to the CDC 6600 and CDC 7600, the 8600 was intended to be about 10 times as fast as the 7600, already the fastest computer on the market. The design was essentially four 7600's, packed into a very small chassis so they could run at higher clock speeds.

Development started in 1968, shortly after the release of the 7600, but the project soon started to bog down. The dense packaging of the system led to serious reliability problems and difficulty cooling the individual components. By 1971, CDC was having cash-flow problems and the design was still not coming together, prompting Cray to leave the company in 1972. The 8600 design effort was eventually canceled in 1974, and Control Data moved on to the CDC STAR-100 series instead.

Cray revisited the 8600's basic design in his Cray-2 of the early 1980s. The introduction of integrated circuits solved the problems with dense packaging and liquid cooling addressed the heat issues. The Cray-2 is very similar to the 8600 both physically and conceptually.

In the 1960s, computer design was based on mounting electronic components (transistors, resistors, etc.) on circuit boards. One or more boards formed a discrete logic element of the machine, known as a module. Overall machine cycle speed is strongly related to the signal path —the length of the wiring— requiring high-speed computers to make their modules as small as possible. This was at odds with the desire to make the modules themselves more complex to increase functionality. By the late 1960s, individual components had stopped getting much smaller, so to increase the complexity of the machines, the modules would have to grow. In theory, this could slow the machine down due to signalling delays.

Cray aimed to solve these contradictory problems by making each module larger and crammed with many more components, while at the same time making the computer as a whole smaller by packing the modules closer together inside the machine. Between the time the 7600 was developed and work on the 8600 began, there had been no packaging improvements in the components, so any performance improvements had to come solely from packaging of the boards. For the new design, they used modules containing eight four-layer circuit boards about 8" by 6", resulting in a stack the size of a large textbook and using about 3 kilowatts of power. The modules were then packed into a mainframe chassis that was comparatively tiny, a 16-sided cylinder about one meter (3') across and high, sitting on top of a ring of power supplies. The proposed design bears a strong resemblance to the later Cray-2, but even shorter and smaller in diameter.

With all of this power being dissipated in such a small space, cooling was a major design issue. Cray's refrigeration engineer, Dean Roush, formerly of Amana, placed a sheet of copper inside each of the circuit boards, removing the heat to a copper block on one end where it was cooled by a freon system. This further increased the weight and complexity of the modules, to the point where each one weighed about 15 pounds (6.8 kg). The external cooling system was considerably larger than the machine itself.

The electronic components were likewise improved over previous designs. The main CPU circuits moved to ECL-based logic, enabling a clock speed increase to 125 MHz (8 ns cycle time) from the 7600's 36.4 MHz (27.5 ns cycle time) an increase of about four times. Main memory was also moved to an ECL implementation and the machine was equipped with a whopping-for-the-times 256k-words (2 megabytes) standard. The system spread the memory across 64 banks for fast access at about 8 ns/word, even though the cycle time of any one bank was about 250 ns. A high-speed core memory with a 20 ns access (overall) was also designed as a backup to the semiconductor memory.

Cray decided that the 8600 would include four complete CPUs sharing the main memory. To improve overall throughput, the machine could operate in a special mode that sent a single instruction to all four processors with different data. This technique, today known as SIMD, reduced the total number of memory accesses because the instruction was only read once, instead of four times. This meant that three cycles were freed up to read data instead. Each processor was about 2.5 times as fast as a 7600, so with all four running the machine as a whole would be about 10 times as fast, at about 100 MFLOPS.