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Expeed
The Nikon Expeed image/video processors (often styled EXPEED) are media processors for Nikon's digital cameras.
They perform a large number of tasks:
Expeed's multi-processor system on a chip solution integrates an image processor in multi-core processor architecture, with each single processor-core able to compute many instructions/operations in parallel. Storage and display interfaces and other modules are added and a digital signal processor (DSP) increases the number of simultaneous computations. On-chip 32-bit microcontroller initiates and controls the operation and data transfers of all processors, modules, interfaces and can be seen as the main control unit of the camera.
In each generation Nikon uses different versions for its professional and consumer DSLRs / MILCs, whereas its compact cameras use completely different architectures. This is different from for example Canons DIGIC: its professional DSLRs double the processors of its consumer DSLR series. The Expeed is an application-specific integrated circuit (ASIC) built by Socionext specifically for Nikon designs according to Nikon specifications.
The Nikon Expeed is based on the Socionext Milbeaut imaging processors with 16-bit per pixel multi-core FR-V processor architecture, using a highly parallel pipelined architecture which allows efficient hardware use, increasing throughput and reducing power consumption.
Each core uses an eight-way 256-bit very long instruction word (VLIW, MIMD) and is organized in a four-unit superscalar pipelined architecture (Integer (ALU)-, Floating-point- and two media-processor-units) giving a peak performance of up to 28 instructions per clock cycle and core. Due to the used four-way single instruction, multiple data (SIMD) vector processor units, data is processed with up to 112 data operations per cycle and core.
An on-chip 32-bit Fujitsu FR RISC micro-controller core is used to initiate and control all processors, modules and interfaces. The Expeed versions designated EI-14x and the Expeed 2 and 3 additionally include a HD video codec engine (FR-V based) and a 16-bit DSP with separate on-chip 4-block Harvard RAM which is usable for example for additional image- and audio-processing. The Expeed 3 (FR) (EI-158/175) is based on an improved Expeed 2 EI-154 with greatly increased processing speed.
A new architecture in the Expeed 3 (ARM) offers a highly increased speed in its image processor (with even two pipelines on the EI-160), its H.264 video encoder and is controlled by a dual-core ARM architecture microcontroller replacing the Fujitsu FR.
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Expeed
The Nikon Expeed image/video processors (often styled EXPEED) are media processors for Nikon's digital cameras.
They perform a large number of tasks:
Expeed's multi-processor system on a chip solution integrates an image processor in multi-core processor architecture, with each single processor-core able to compute many instructions/operations in parallel. Storage and display interfaces and other modules are added and a digital signal processor (DSP) increases the number of simultaneous computations. On-chip 32-bit microcontroller initiates and controls the operation and data transfers of all processors, modules, interfaces and can be seen as the main control unit of the camera.
In each generation Nikon uses different versions for its professional and consumer DSLRs / MILCs, whereas its compact cameras use completely different architectures. This is different from for example Canons DIGIC: its professional DSLRs double the processors of its consumer DSLR series. The Expeed is an application-specific integrated circuit (ASIC) built by Socionext specifically for Nikon designs according to Nikon specifications.
The Nikon Expeed is based on the Socionext Milbeaut imaging processors with 16-bit per pixel multi-core FR-V processor architecture, using a highly parallel pipelined architecture which allows efficient hardware use, increasing throughput and reducing power consumption.
Each core uses an eight-way 256-bit very long instruction word (VLIW, MIMD) and is organized in a four-unit superscalar pipelined architecture (Integer (ALU)-, Floating-point- and two media-processor-units) giving a peak performance of up to 28 instructions per clock cycle and core. Due to the used four-way single instruction, multiple data (SIMD) vector processor units, data is processed with up to 112 data operations per cycle and core.
An on-chip 32-bit Fujitsu FR RISC micro-controller core is used to initiate and control all processors, modules and interfaces. The Expeed versions designated EI-14x and the Expeed 2 and 3 additionally include a HD video codec engine (FR-V based) and a 16-bit DSP with separate on-chip 4-block Harvard RAM which is usable for example for additional image- and audio-processing. The Expeed 3 (FR) (EI-158/175) is based on an improved Expeed 2 EI-154 with greatly increased processing speed.
A new architecture in the Expeed 3 (ARM) offers a highly increased speed in its image processor (with even two pipelines on the EI-160), its H.264 video encoder and is controlled by a dual-core ARM architecture microcontroller replacing the Fujitsu FR.
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