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Hub AI
Vector processor AI simulator
(@Vector processor_simulator)
Hub AI
Vector processor AI simulator
(@Vector processor_simulator)
Vector processor
In computing, a vector processor is a central processing unit (CPU) that implements an instruction set where its instructions are designed to operate efficiently and architecturally sequentially on large one-dimensional arrays of data called vectors. When integrated as a hardware component the vector processor is often called a vector processing unit (VPU). This is in contrast to scalar processors, whose instructions operate on single data items only, and in contrast to some of those same scalar processors having additional single instruction, multiple data (SIMD) or SIMD within a register (SWAR) Arithmetic Units. Vector processors can greatly improve performance on certain workloads, notably numerical simulation, compression and similar tasks.
Vector processing techniques also operate in video-game console hardware and in graphics accelerators but these are invariably Single instruction, multiple threads (SIMT) and occasionally Single instruction, multiple data (SIMD).
Vector machines appeared in the early 1970s and dominated supercomputer design through the 1970s into the 1990s, notably the various Cray platforms. The rapid fall in the price-to-performance ratio of conventional microprocessor designs led to a decline in vector supercomputers during the 1990s.
Array processing development began in the early 1960s at the Westinghouse Electric Corporation in their Solomon project. Solomon's goal was to dramatically increase math performance by using a large number of simple coprocessors under the control of a single master Central processing unit (CPU). The CPU fed a single common instruction to all of the arithmetic logic units (ALUs), one per cycle, but with a different data point for each one to work on. This allowed the Solomon machine to apply a single algorithm to a large data set, fed in the form of an array, leading it to be cited as an example Array processor in Flynn's taxonomy.
In 1962, Westinghouse cancelled the project, but the effort was restarted by the University of Illinois at Urbana–Champaign as the ILLIAC IV. Their version of the design originally called for a 1 GFLOPS machine with 256 ALUs, but, when it was finally delivered in 1972, it had only 64 ALUs and could reach only 100 to 150 MFLOPS. Nevertheless, it showed that the basic concept was sound, and, when used on data-intensive applications, such as computational fluid dynamics, the ILLIAC was the fastest machine in the world. The ILLIAC approach of using separate ALUs for each data element is not common to later designs,[fact or opinion?] and is often referred to under a separate category of massively parallel computing: around 1972 Flynn categorized this type of processing as an early form of single instruction, multiple threads (SIMT).
International Computers Limited sought to avoid many of the difficulties with the ILLIAC concept with its own Distributed Array Processor (DAP) design, categorising the ILLIAC and DAP as cellular array processors that potentially offered substantial performance benefits over conventional vector processor designs such as the CDC STAR-100 and Cray 1.
A computer for operations with functions was presented and developed by Kartsev in 1967.
The first vector supercomputers are the Control Data Corporation STAR-100 and Texas Instruments Advanced Scientific Computer (ASC), which were introduced in 1974 and 1972, respectively.
Vector processor
In computing, a vector processor is a central processing unit (CPU) that implements an instruction set where its instructions are designed to operate efficiently and architecturally sequentially on large one-dimensional arrays of data called vectors. When integrated as a hardware component the vector processor is often called a vector processing unit (VPU). This is in contrast to scalar processors, whose instructions operate on single data items only, and in contrast to some of those same scalar processors having additional single instruction, multiple data (SIMD) or SIMD within a register (SWAR) Arithmetic Units. Vector processors can greatly improve performance on certain workloads, notably numerical simulation, compression and similar tasks.
Vector processing techniques also operate in video-game console hardware and in graphics accelerators but these are invariably Single instruction, multiple threads (SIMT) and occasionally Single instruction, multiple data (SIMD).
Vector machines appeared in the early 1970s and dominated supercomputer design through the 1970s into the 1990s, notably the various Cray platforms. The rapid fall in the price-to-performance ratio of conventional microprocessor designs led to a decline in vector supercomputers during the 1990s.
Array processing development began in the early 1960s at the Westinghouse Electric Corporation in their Solomon project. Solomon's goal was to dramatically increase math performance by using a large number of simple coprocessors under the control of a single master Central processing unit (CPU). The CPU fed a single common instruction to all of the arithmetic logic units (ALUs), one per cycle, but with a different data point for each one to work on. This allowed the Solomon machine to apply a single algorithm to a large data set, fed in the form of an array, leading it to be cited as an example Array processor in Flynn's taxonomy.
In 1962, Westinghouse cancelled the project, but the effort was restarted by the University of Illinois at Urbana–Champaign as the ILLIAC IV. Their version of the design originally called for a 1 GFLOPS machine with 256 ALUs, but, when it was finally delivered in 1972, it had only 64 ALUs and could reach only 100 to 150 MFLOPS. Nevertheless, it showed that the basic concept was sound, and, when used on data-intensive applications, such as computational fluid dynamics, the ILLIAC was the fastest machine in the world. The ILLIAC approach of using separate ALUs for each data element is not common to later designs,[fact or opinion?] and is often referred to under a separate category of massively parallel computing: around 1972 Flynn categorized this type of processing as an early form of single instruction, multiple threads (SIMT).
International Computers Limited sought to avoid many of the difficulties with the ILLIAC concept with its own Distributed Array Processor (DAP) design, categorising the ILLIAC and DAP as cellular array processors that potentially offered substantial performance benefits over conventional vector processor designs such as the CDC STAR-100 and Cray 1.
A computer for operations with functions was presented and developed by Kartsev in 1967.
The first vector supercomputers are the Control Data Corporation STAR-100 and Texas Instruments Advanced Scientific Computer (ASC), which were introduced in 1974 and 1972, respectively.