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Cell (processor)
The Cell Broadband Engine (Cell/B.E.) is a 64-bit reduced instruction set computer (RISC) multi-core processor and microarchitecture developed by Sony, Toshiba, and IBM—an alliance known as "STI". It combines a general-purpose PowerPC core, named the Power Processing Element (PPE), with multiple specialized coprocessors, known as Synergistic Processing Elements (SPEs), which accelerate tasks such as multimedia and vector processing.
The architecture was developed over a four-year period beginning in March 2001, with Sony reporting a development budget of approximately US$400 million. Its first major commercial application was in Sony's PlayStation 3 home video game console, released in 2006. In 2008, a modified version of the Cell processor powered IBM's Roadrunner, the first supercomputer to sustain one petaFLOPS. Other applications include high-performance computing systems from Mercury Computer Systems and specialized arcade system boards.
Cell emphasizes memory coherence, power efficiency, and peak computational throughput, but its design presented significant challenges for software development. IBM offered a Linux-based software development kit to facilitate programming on the platform.
In mid-2000, Sony, Toshiba, and IBM formed the STI alliance to develop a new microprocessor. The STI Design Center opened in March 2001 in Austin, Texas. Over the next four years, more than 400 engineers collaborated on the project, with IBM contributing from eleven of its design centers.
Initial patents described a configuration with four Power Processing Elements (PPEs), each paired with eight Synergistic Processing Elements (SPEs), for a theoretical peak performance of 1 teraFLOPS.[citation needed] However, only a scaled-down design—one PPE with eight SPEs—was ultimately manufactured.
Fabrication of the initial Cell chip began on a 90 nm SOI (silicon on insulator) process. In March 2007, IBM transitioned production to a 65 nm process, followed by a 45 nm process announced in February 2008. Bandai Namco Entertainment used the Cell processor in its Namco System 357 and 369 arcade boards.[citation needed]
In May 2008, IBM introduced the PowerXCell 8i, a double-precision variant of the Cell processor, used in systems such as IBM's Roadrunner supercomputer, the first to achieve one petaFLOPS and the fastest until late 2009.
IBM ceased development of higher-core-count Cell variants (such as a 32-APU version) in late 2009, but continued supporting existing Cell-based products.
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Cell (processor)
The Cell Broadband Engine (Cell/B.E.) is a 64-bit reduced instruction set computer (RISC) multi-core processor and microarchitecture developed by Sony, Toshiba, and IBM—an alliance known as "STI". It combines a general-purpose PowerPC core, named the Power Processing Element (PPE), with multiple specialized coprocessors, known as Synergistic Processing Elements (SPEs), which accelerate tasks such as multimedia and vector processing.
The architecture was developed over a four-year period beginning in March 2001, with Sony reporting a development budget of approximately US$400 million. Its first major commercial application was in Sony's PlayStation 3 home video game console, released in 2006. In 2008, a modified version of the Cell processor powered IBM's Roadrunner, the first supercomputer to sustain one petaFLOPS. Other applications include high-performance computing systems from Mercury Computer Systems and specialized arcade system boards.
Cell emphasizes memory coherence, power efficiency, and peak computational throughput, but its design presented significant challenges for software development. IBM offered a Linux-based software development kit to facilitate programming on the platform.
In mid-2000, Sony, Toshiba, and IBM formed the STI alliance to develop a new microprocessor. The STI Design Center opened in March 2001 in Austin, Texas. Over the next four years, more than 400 engineers collaborated on the project, with IBM contributing from eleven of its design centers.
Initial patents described a configuration with four Power Processing Elements (PPEs), each paired with eight Synergistic Processing Elements (SPEs), for a theoretical peak performance of 1 teraFLOPS.[citation needed] However, only a scaled-down design—one PPE with eight SPEs—was ultimately manufactured.
Fabrication of the initial Cell chip began on a 90 nm SOI (silicon on insulator) process. In March 2007, IBM transitioned production to a 65 nm process, followed by a 45 nm process announced in February 2008. Bandai Namco Entertainment used the Cell processor in its Namco System 357 and 369 arcade boards.[citation needed]
In May 2008, IBM introduced the PowerXCell 8i, a double-precision variant of the Cell processor, used in systems such as IBM's Roadrunner supercomputer, the first to achieve one petaFLOPS and the fastest until late 2009.
IBM ceased development of higher-core-count Cell variants (such as a 32-APU version) in late 2009, but continued supporting existing Cell-based products.