Dual-ported video RAM
Dual-ported video RAM
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Dual-ported video RAM

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Dual-ported video RAM

Dual-ported video RAM is a type of dual-ported RAM derived from dynamic RAM (DRAM), and was historically used to store the framebuffer in graphics card, and was at the time often called VRAM.

Unlike conventional DRAM, VRAM features two ports: one for the CPU and one for the video display controller (VDC). This architecture allows simultaneous access—while the CPU writes data, the VDC can read it independently. This eliminates wait states, ensuring smoother performance and efficient screen rendering.

VRAM was widely used between the mid-1980s and mid-1990s. As newer high-performance memory technologies emerged, dual-ported VRAM was gradually phased out. Today, the term "VRAM" can refer to modern types of video memory as well, which can lead to confusion with this original dual-ported variant.

Early computers used dynamic RAM to store video data to be output to a conventional television or a simple conversion of a television that accepted composite video input. To work with such a display, it is extremely important that the video hardware output a very accurately timed signal. At the speeds that contemporary memory worked at, reading data to feed to the video hardware used up much of the possible performance of the memory devices. This conflicted with the need for the central processing unit (CPU) to write data to memory for the video system to read, as both could not use the same memory at the same time.

Two general solutions were used to avoid timing issues. For higher-priced systems, the video systems had their own dedicated memory and used a separate system for the CPU to store data into it. This eliminated any possibility of contention for memory, but at the cost of requiring separate memory in an era when memory was very expensive. It also almost always communicated over a slow system bus that limited the speed at which changes to the screen could be made, making interactive graphics difficult. The other solution, used by most home computers, was to use a single shared bank of memory and allow the video hardware to control access to memory, pausing the CPU when needed. This may lead to slower computing performance as the CPU is repeatedly put into these wait states, but it has the advantage of being less expensive and allowing the CPU to more rapidly update the display and thus provide more interactivity.

By the early 1980s, the introduction of much higher-resolution monitors that demanded larger framebuffers, and the newly introduced graphical user interfaces (GUIs) that required high resolution and high overall performance, made the performance of the video system an increasingly difficult problem. Complex systems like the Amiga emerged to carefully control access to memory and reduce contention, but while these reduced the problem, they did not eliminate it.

The solution was to use memory that could be accessed by the CPU and video hardware at the same time. It was invented by F. Dill, D. Ling and R. Matick at IBM Research in 1980, with a patent issued in 1985 (US Patent 4,541,075). The first commercial use of VRAM was in a high-resolution graphics adapter introduced in 1986 by IBM for its IBM RT PC system, which set a new standard for graphics displays. Prior to the development of VRAM, dual-ported memory was quite expensive, limiting higher-resolution bitmapped graphics to high-end workstations. VRAM improved the overall framebuffer throughput, allowing low-cost, high-resolution, high-speed, color graphics. Modern GUI-based operating systems benefited from this, and thus, they provided a key ingredient for the proliferation of GUIs throughout the world at that time.

Dynamic RAM is internally arranged in an array of rows and columns of capacitors, with each row/column intersection holding a single bit in a cell. In typical use, a CPU accessing a DRAM will ask for a small amount of data at a time, possibly a single byte. To read a byte for the CPU, the DRAM decodes the provided address into a series of eight cells containing the eight bits in that particular byte, reads the entire row containing those cells, and latches the requested data so it can be read on the data bus. At the time, rows were commonly 1,024 cells wide.

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