IBM Advanced Computer Systems project

The ACS-1 and ACS-360 are two related supercomputers designed by IBM as part of the Advanced Computing Systems project from 1965 to 1969. Although the designs were never finished and no models ever went into production, the project spawned a number of organizational techniques and architectural innovations that have since become incorporated into nearly all high-performance computers in existence today. Many of the ideas resulting from the project directly influenced the development of the IBM RS/6000 and, more recently, have contributed to the Explicitly Parallel Instruction Computing (EPIC) computing paradigm used by Intel and HP in the Itanium processors.

After the ACS project folded, the engineers were given the choice to rejoin other divisions of IBM. Many declined as it would require them to return to the east coast from California. A number formed MASCOR in 1970 but this was short-lived as they were unable to raise capital. Gene Amdahl took the opportunity to start his own company, building IBM-compatible mainframe computers using the ECL designs worked on for ACS. Amdahl Corporation's 470V/6 were both faster and less expensive than IBM's own high-end designs.

IBM introduced its first supercomputer, the IBM 7030 Stretch, in May 1961. They had to withdraw it from the market when tests at the launch customer, Los Alamos Scientific Laboratory, demonstrated it had very poor real-world performance. Almost immediately, IBM organized two development projects, Project X at the IBM Poughkeepsie Laboratory and Project Y at the IBM Thomas J. Watson Research Center. Project X was tasked with designing a machine that would run 10 to 20 times as fast as Stretch, while Y was to be 100 times faster.

In the spring of 1962, Control Data Corporation (CDC) announced that they had installed two computers at Lawrence Radiation Laboratory and had received a contract for a third, a much more powerful design. That new machine was officially announced in August 1963 as the CDC 6600, causing IBM CEO Thomas J. Watson Jr. to write a now-famous memo asking how it was that this small company could produce machines that outperformed those from IBM.

At a meeting in September 1963, IBM decided to shore up the high-end of what was then known as the New Product Line, or NPL. Project X was directed to implement the NPL instruction set, becoming a high-end machine in that lineup. When NPL was launched in 1964 as the System/360, Project X became the Model 92, later renamed Model 91. Eventually, about a dozen machines in the Model 90 series would be sold.

Project Y was never directed to use NPL, as it was a longer-term project aimed purely at the scientific market. Development was assigned to Jack Bertram and his Experimental Computers and Programming Group and started in earnest in late 1963. Bertram brought in John Cocke, Frances Allen, Brian Randell, Herb Schorr, and Edward H. Sussenguth, among others. Schorr developed the initial instruction set and recruited his former student, Lynn Conway, to work on a system simulator.

The System/360 was an immediate runaway success, but production line problems plagued deliveries and much of the company was dedicated to fixing them. Meanwhile, CDC announced they would be introducing a new machine that was 10 times the performance of the 6600. Watson was convinced that the 360 instruction set would not be suitable for the new design and was worried that development would be slowed by the turmoil at the labs due to the 360 problems. In the spring of 1965, he approved the creation of a new division in California that would be closer to their customers at the weapons labs. A building in Sunnyvale, California was purchased in 1965 and set up as the IBM Advanced Computing Systems. Max Paley would be the lab director.

At a steering meeting in August 1965, Paley, Bertram, and Schorr gave presentations on the design so far. The machine would use a 48-bit word length, as that was the standard for scientific computing. The machine would have a clock cycle time of 10 nanoseconds, about 10 times faster than the 6600, with six or seven internal cycles per clock. The arithmetic logic units (ALUs) that performed most of the mathematics would be pipelined, as in the 6600, and it would dispatch multiple instructions per cycle. Branching performance would be improved with a buffer that would begin executing both sides of the branch.