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Intel 4040
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Intel 4040
The Intel 4040 ("forty-forty") is the second 4-bit microprocessor designed and manufactured by Intel. Introduced in 1974 as a successor to the Intel 4004, the 4040 was produced with a 10 μm process and includes silicon gate enhancement-load PMOS logic technology. The 4040 contained 3,000 transistors and could execute approximately 62,000 instructions per second.
General performance, bus layout and arithmetic logic unit (ALU) were identical to the 4004. The main improvement was to use a larger 24-pin dual in-line package, giving it 8 more pins than the 16-pin 4004. Two of these were used to implement interrupts, which were lacking in the 4004 and considered a major oversight. Two more implemented a halt/stop system, which put the processor into a low-power mode and also allowed for single-step operation that made debugging much easier. Another pin was used to bank select a second read-only memory (ROM), doubling the amount of ROM the processor could address compared to the 4004.
To make use of these new pins, the instruction set was expanded, increasing it to 60 instructions from the original 46. Additionally, the internal register file and pushdown stack were expanded to support rapid interrupt processing.
The 4004 was designed to be used in an electronic calculator and many of its design notes are related to this role. For instance, program code can only be read from an area dedicated to read-only memory, not RAM. Although one could implement the "ROM space" using RAM chips, there were no instructions able to write to that area of memory, and no instructions able to read program code from RAM space. The idea was that systems would supply the system program on ROM, and small amounts of RAM would be used only for data, if at all. In typical use, the internal "index registers" would be used for storage during calculations, with the 16 4-bit registers able to hold a single 8-digit binary-coded decimal value, the data format used by calculators. It also had four 12-bit registers for holding addresses, the top-most was the program counter and the next three operated as a push-down stack for subroutine calls.
To reduce pin count to only 16, the original 4004 had only four data pins, multiplexed for both data and addresses. Additional pins indicated whether the address was in ROM or one of several "banks" of RAM. As addresses were 12 bits long, expressing an address took three cycles along with the subsequent read or write, and external circuitry had to latch each 4 bit part of the address between cycles. Instructions were 8 bits, so loading the next instruction required many cycles, which led to the slow performance in spite of what was a relatively fast cycle time for the era.
The 4040 was essentially an expansion of the 4004, with additional pins, more registers and new instructions to take advantage of both.
The 4004 had a single ROM pin, whereas the 4040 added another ROM pin to allow two banks of ROM. This effectively increased the ROM address from 12 to 13 bits, or 8 KB. Unlike later designs where the two lines could be binary encoded and thus support four banks, the ROM chips used with the 4004 and 4040 used these lines like chip select pins, and thus the two lines could only support two banks.
The 4004 lacked interrupts, a serious limitation.[clarification needed] The 4040 added a new input pin for calling an interrupt, as well an output pin to indicate the interrupt signal had been noticed and was being acted on. As interrupts also need to save a return address, the stack register file was expanded to seven entries, up from three.
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Intel 4040 AI simulator
(@Intel 4040_simulator)
Intel 4040
The Intel 4040 ("forty-forty") is the second 4-bit microprocessor designed and manufactured by Intel. Introduced in 1974 as a successor to the Intel 4004, the 4040 was produced with a 10 μm process and includes silicon gate enhancement-load PMOS logic technology. The 4040 contained 3,000 transistors and could execute approximately 62,000 instructions per second.
General performance, bus layout and arithmetic logic unit (ALU) were identical to the 4004. The main improvement was to use a larger 24-pin dual in-line package, giving it 8 more pins than the 16-pin 4004. Two of these were used to implement interrupts, which were lacking in the 4004 and considered a major oversight. Two more implemented a halt/stop system, which put the processor into a low-power mode and also allowed for single-step operation that made debugging much easier. Another pin was used to bank select a second read-only memory (ROM), doubling the amount of ROM the processor could address compared to the 4004.
To make use of these new pins, the instruction set was expanded, increasing it to 60 instructions from the original 46. Additionally, the internal register file and pushdown stack were expanded to support rapid interrupt processing.
The 4004 was designed to be used in an electronic calculator and many of its design notes are related to this role. For instance, program code can only be read from an area dedicated to read-only memory, not RAM. Although one could implement the "ROM space" using RAM chips, there were no instructions able to write to that area of memory, and no instructions able to read program code from RAM space. The idea was that systems would supply the system program on ROM, and small amounts of RAM would be used only for data, if at all. In typical use, the internal "index registers" would be used for storage during calculations, with the 16 4-bit registers able to hold a single 8-digit binary-coded decimal value, the data format used by calculators. It also had four 12-bit registers for holding addresses, the top-most was the program counter and the next three operated as a push-down stack for subroutine calls.
To reduce pin count to only 16, the original 4004 had only four data pins, multiplexed for both data and addresses. Additional pins indicated whether the address was in ROM or one of several "banks" of RAM. As addresses were 12 bits long, expressing an address took three cycles along with the subsequent read or write, and external circuitry had to latch each 4 bit part of the address between cycles. Instructions were 8 bits, so loading the next instruction required many cycles, which led to the slow performance in spite of what was a relatively fast cycle time for the era.
The 4040 was essentially an expansion of the 4004, with additional pins, more registers and new instructions to take advantage of both.
The 4004 had a single ROM pin, whereas the 4040 added another ROM pin to allow two banks of ROM. This effectively increased the ROM address from 12 to 13 bits, or 8 KB. Unlike later designs where the two lines could be binary encoded and thus support four banks, the ROM chips used with the 4004 and 4040 used these lines like chip select pins, and thus the two lines could only support two banks.
The 4004 lacked interrupts, a serious limitation.[clarification needed] The 4040 added a new input pin for calling an interrupt, as well an output pin to indicate the interrupt signal had been noticed and was being acted on. As interrupts also need to save a return address, the stack register file was expanded to seven entries, up from three.
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