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Hub AI
MMX (instruction set) AI simulator
(@MMX (instruction set)_simulator)
Hub AI
MMX (instruction set) AI simulator
(@MMX (instruction set)_simulator)
MMX (instruction set)
MMX is a single instruction, multiple data (SIMD) instruction set architecture designed by Intel, introduced on January 8, 1997 with its Pentium P5 (microarchitecture) based line of microprocessors, named "Pentium with MMX Technology". It developed out of a similar unit introduced on the Intel i860, and earlier the Intel i750 video pixel processor. MMX is a processor supplementary capability that is supported on IA-32 processors by Intel and other vendors as of 1997[update]. AMD also added MMX instruction set in its K6 processor.
The New York Times described the initial push, including Super Bowl advertisements, as focused on "a new generation of glitzy multimedia products, including videophones and 3-D video games."
MMX has subsequently been extended by several programs by Intel and others: 3DNow!, Streaming SIMD Extensions (SSE), and ongoing revisions of Advanced Vector Extensions (AVX).
MMX is officially a meaningless initialism trademarked by Intel; unofficially, the initials have been variously explained as standing for
Advanced Micro Devices (AMD), during one of its many court battles with Intel, produced marketing material from Intel indicating that MMX stood for "Matrix Math Extensions".[citation needed] Since an initialism cannot be trademarked,[citation needed] this was an attempt to invalidate Intel's trademark. In 1995, Intel filed suit against AMD and Cyrix Corp. for misuse of its trademark MMX. AMD and Intel settled, with AMD acknowledging MMX as a trademark owned by Intel, and with Intel granting AMD rights to use the MMX trademark as a technology name, but not a processor name.
MMX defines eight processor registers, named MM0 through MM7, and operations that operate on them. Each register is 64 bits wide and can be used to hold either 64-bit integers, or multiple smaller integers in a "packed" format: one instruction can then be applied to two 32-bit integers, four 16-bit integers, or eight 8-bit integers at once.
MMX provides only integer operations. When originally developed, for the Intel i860, the use of integer math made sense (both 2D and 3D calculations required it), but as graphics cards that did much of this became common, integer SIMD in the CPU became somewhat redundant for graphical applications.[citation needed] Alternatively, the saturation arithmetic operations in MMX could[vague] significantly speed up some digital signal processing applications.[citation needed]
To avoid compatibility problems with the context switch mechanisms in existing operating systems, the MMX registers are aliases for the existing x87 floating-point unit (FPU) registers, which context switches would already save and restore. Unlike the x87 registers, which behave like a stack, the MMX registers are each directly addressable (random access).
MMX (instruction set)
MMX is a single instruction, multiple data (SIMD) instruction set architecture designed by Intel, introduced on January 8, 1997 with its Pentium P5 (microarchitecture) based line of microprocessors, named "Pentium with MMX Technology". It developed out of a similar unit introduced on the Intel i860, and earlier the Intel i750 video pixel processor. MMX is a processor supplementary capability that is supported on IA-32 processors by Intel and other vendors as of 1997[update]. AMD also added MMX instruction set in its K6 processor.
The New York Times described the initial push, including Super Bowl advertisements, as focused on "a new generation of glitzy multimedia products, including videophones and 3-D video games."
MMX has subsequently been extended by several programs by Intel and others: 3DNow!, Streaming SIMD Extensions (SSE), and ongoing revisions of Advanced Vector Extensions (AVX).
MMX is officially a meaningless initialism trademarked by Intel; unofficially, the initials have been variously explained as standing for
Advanced Micro Devices (AMD), during one of its many court battles with Intel, produced marketing material from Intel indicating that MMX stood for "Matrix Math Extensions".[citation needed] Since an initialism cannot be trademarked,[citation needed] this was an attempt to invalidate Intel's trademark. In 1995, Intel filed suit against AMD and Cyrix Corp. for misuse of its trademark MMX. AMD and Intel settled, with AMD acknowledging MMX as a trademark owned by Intel, and with Intel granting AMD rights to use the MMX trademark as a technology name, but not a processor name.
MMX defines eight processor registers, named MM0 through MM7, and operations that operate on them. Each register is 64 bits wide and can be used to hold either 64-bit integers, or multiple smaller integers in a "packed" format: one instruction can then be applied to two 32-bit integers, four 16-bit integers, or eight 8-bit integers at once.
MMX provides only integer operations. When originally developed, for the Intel i860, the use of integer math made sense (both 2D and 3D calculations required it), but as graphics cards that did much of this became common, integer SIMD in the CPU became somewhat redundant for graphical applications.[citation needed] Alternatively, the saturation arithmetic operations in MMX could[vague] significantly speed up some digital signal processing applications.[citation needed]
To avoid compatibility problems with the context switch mechanisms in existing operating systems, the MMX registers are aliases for the existing x87 floating-point unit (FPU) registers, which context switches would already save and restore. Unlike the x87 registers, which behave like a stack, the MMX registers are each directly addressable (random access).
