Q (number format)

$${\displaystyle \underbrace {\mathrm {U} } _{\mathrm {\scriptscriptstyle unsigned} }\;\mathbf {Q} \;\underbrace {m} _{\mathrm {\scriptscriptstyle integer} }\;\;\mathbf {.} \;\underbrace {n} _{\mathrm {\scriptscriptstyle fraction} }}$$

The Q notation, as defined by Texas Instruments,^[1] consists of the letter Q followed by a pair of numbers m.n, where m is the number of bits used for the integer part of the value, and n is the number of fraction bits.

By default, the notation describes signed binary fixed point format, with the unscaled integer being stored in two's complement format, used in most binary processors. As such, the first bit always gives the sign of the value (1 = negative, 0 = non-negative), and it is not counted in the m parameter. Thus, the total number w of bits used is 1 + m + n.

For example, the specification Q3.12 describes a signed binary fixed-point number with word-size w = 16 bits in total, comprising the sign bit, three bits for the integer part, and 12 bits that are the fraction. This can be seen as a 16-bit signed (two's complement) integer, that is implicitly multiplied by the scaling factor ${\displaystyle 2^{-12}}$.

In particular, when n is zero, the numbers are just integers. If m is zero, all bits except the sign bit are fraction bits; then the range of the stored number is from −1.0 (inclusive) to +1.0 (exclusive).

The m and the dot may be omitted, in which case they are inferred from the size of the variable or register where the value is stored. Thus, Q12 means a signed integer with any number of bits, that is implicitly multiplied by ${\displaystyle 2^{-12}}$.

The letter U can be prefixed to the Q to denote an unsigned binary fixed-point format. For example, UQ1.15 describes values represented as unsigned 16-bit integers with an implicit scaling factor of ${\displaystyle 2^{-15}}$, which range from ${\displaystyle 0.0}$ to ${\displaystyle (2^{16}-1)/2^{15}=+1.999969482421875}$.

A variant of the Q notation has been in use by ARM in which the m number also counts the sign bit. For example, a 16-bit signed integer which the TI variant denotes as Q15.0, would be Q16.0 in the ARM variant.^[2][3] Unsigned numbers are the same across both variants.

While technically the sign-bit belongs just as much to the fractional part as the integer part, ARM's notation has the benefit that there are no implicit bits, so the size of the word is always ${\displaystyle m+n\ {\textrm {bits}}}$.

The resolution (difference between successive values) of a Qm.n or UQm.n format is always 2⁻ⁿ. The range of representable values depends on the notation used:

For example, a Q14.1 format number requires 14+1+1 = 16 bits, has resolution 2⁻¹ = 0.5, and the representable values range from −2¹⁴ = −16384.0 to +2¹⁴ − 2⁻¹ = +16383.5. In hexadecimal, the negative values range from 0x8000 to 0xFFFF followed by the non-negative ones from 0x0000 to 0x7FFF.

Q numbers are a ratio of two integers: the numerator is kept in storage, the denominator ${\displaystyle d}$ is equal to 2ⁿ.

Consider the following example:

• The Q8 denominator equals 2⁸ = 256
• 1.5 equals 384/256
• 384 is stored, 256 is inferred because it is a Q8 number.

If the Q number's base is to be maintained (n remains constant) the Q number math operations must keep the denominator ${\displaystyle d}$ constant. The following formulas show math operations on the general Q numbers ${\displaystyle N_{1}}$ and ${\displaystyle N_{2}}$. (If we consider the example as mentioned above, ${\displaystyle N_{1}}$ is 384 and ${\displaystyle d}$ is 256.)

${\displaystyle {\begin{aligned}{\frac {N_{1}}{d}}+{\frac {N_{2}}{d}}&={\frac {N_{1}+N_{2}}{d}}\\{\frac {N_{1}}{d}}-{\frac {N_{2}}{d}}&={\frac {N_{1}-N_{2}}{d}}\\\left({\frac {N_{1}}{d}}\times {\frac {N_{2}}{d}}\right)\times d&={\frac {N_{1}\times N_{2}}{d}}\\\left({\frac {N_{1}}{d}}/{\frac {N_{2}}{d}}\right)/d&={\frac {N_{1}/N_{2}}{d}}\end{aligned}}}$

Because the denominator is a power of two, the multiplication can be implemented as an arithmetic shift to the left and the division as an arithmetic shift to the right; on many processors shifts are faster than multiplication and division.

To maintain accuracy, the intermediate multiplication and division results must be double precision and care must be taken in rounding the intermediate result before converting back to the desired Q number.

Using C the operations are (note that here, Q refers to the fractional part's number of bits) :

int16_t q_add(int16_t a, int16_t b)
{
    return a + b;
}

With saturation

int16_t q_add_sat(int16_t a, int16_t b)
{
    int16_t result;
    int32_t tmp;

    tmp = (int32_t)a + (int32_t)b;
    if (tmp > 0x7FFF)
        tmp = 0x7FFF;
    if (tmp < -1 * 0x8000)
        tmp = -1 * 0x8000;
    result = (int16_t)tmp;

    return result;
}

Unlike floating point ±Inf, saturated results are not sticky and will unsaturate on adding a negative value to a positive saturated value (0x7FFF) and vice versa in that implementation shown. In assembly language, the Signed Overflow flag can be used to avoid the typecasts needed for that C implementation.

int16_t q_sub(int16_t a, int16_t b)
{
    return a - b;
}

// precomputed value:
#define K   (1 << (Q - 1))
 
// saturate to range of int16_t
int16_t sat16(int32_t x)
{
	if (x > 0x7FFF) return 0x7FFF;
	else if (x < -0x8000) return -0x8000;
	else return (int16_t)x;
}

int16_t q_mul(int16_t a, int16_t b)
{
    int16_t result;
    int32_t temp;

    temp = (int32_t)a * (int32_t)b; // result type is operand's type
    // Rounding; mid values are rounded up
    temp += K;
    // Correct by dividing by base and saturate result
    result = sat16(temp >> Q);

    return result;
}

int16_t q_div(int16_t a, int16_t b)
{
    /* pre-multiply by the base (Upscale to Q16 so that the result will be in Q8 format) */
    int32_t temp = (int32_t)a << Q;
    /* Rounding: mid values are rounded up (down for negative values). */
    /* OR compare most significant bits i.e. if (((temp >> 31) & 1) == ((b >> 15) & 1)) */
    if ((temp >= 0 && b >= 0) || (temp < 0 && b < 0)) {   
        temp += b / 2;    /* OR shift 1 bit i.e. temp += (b >> 1); */
    } else {
        temp -= b / 2;    /* OR shift 1 bit i.e. temp -= (b >> 1); */
    }
    return (int16_t)(temp / b);
}

• Fixed-point arithmetic
• Floating-point arithmetic