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SHAKTI (microprocessor)
Shakti (stylized as SHAKTI) is an open-source initiative by the Reconfigurable Intelligent Systems Engineering (RISE) group at IIT Madras to develop the first indigenous industrial-grade processor. The aims of the Shakti initiative include building an open source production-grade processor, complete systems on a chip, microprocessor development boards, and a Shakti-based software platform. The main focus of the team is computer architecture research to develop SoCs, which are competitive with commercial offerings in the market in area, power, and performance. The source code for Shakti is open-sourced under the Modified BSD License.
V. Kamakoti carried out the SHAKTI Microprocessor Project, at Prathap Subrahmanyam Centre for Digital Intelligence and Secure Hardware Architecture (Department of Computer Science & Engineering, IIT Madras). The Ministry of Electronics and Information Technology supports it through its Digital India RISC-V initiative.
Shakti processors are based on the RISC-V instruction set architecture (ISA). The processors are designed to have either 22 nm process fin field-effect transistor (FinFET) or 180 nm process complementary metal–oxide–semiconductor (CMOS) technology nodes depending on the manufacturing semiconductor fabrication plant (foundry).
Shakti plans a family of processors as part of its road-map, catering to different segments of the market. They have been broadly categorized into "Base Processors", "Multi-Core Processors" and "Experimental Processors".
The E and C-classes core are for the Internet of things (IoT), embedded system, and desktop computer markets. The processor design is free of any royalty and is open-source licensed under the modified BSD License.
E-class and C-class cores are both implemented in Bluespec SystemVerilog (BSV) language, a Haskell dialect.
The Shakti project aims to build 6 variants of processors based on the RISC-V ISA.
The E-class are 32- and 64-bit microcontrollers able to support all extensions of the RISC-V ISA, for low-power and low computer applications. The E-class is an in-order 3 stage pipeline having an operational frequency of less than 200 MHz on silicon. It is positioned against ARM's M-class (Cortex-M series) cores. It can run real-time operating systems like FreeRTOS, Zephyr, and eChronos. Market segments of E-class processor support smart cards, IoT devices, motor controls, and robotic platforms.
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SHAKTI (microprocessor) AI simulator
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SHAKTI (microprocessor)
Shakti (stylized as SHAKTI) is an open-source initiative by the Reconfigurable Intelligent Systems Engineering (RISE) group at IIT Madras to develop the first indigenous industrial-grade processor. The aims of the Shakti initiative include building an open source production-grade processor, complete systems on a chip, microprocessor development boards, and a Shakti-based software platform. The main focus of the team is computer architecture research to develop SoCs, which are competitive with commercial offerings in the market in area, power, and performance. The source code for Shakti is open-sourced under the Modified BSD License.
V. Kamakoti carried out the SHAKTI Microprocessor Project, at Prathap Subrahmanyam Centre for Digital Intelligence and Secure Hardware Architecture (Department of Computer Science & Engineering, IIT Madras). The Ministry of Electronics and Information Technology supports it through its Digital India RISC-V initiative.
Shakti processors are based on the RISC-V instruction set architecture (ISA). The processors are designed to have either 22 nm process fin field-effect transistor (FinFET) or 180 nm process complementary metal–oxide–semiconductor (CMOS) technology nodes depending on the manufacturing semiconductor fabrication plant (foundry).
Shakti plans a family of processors as part of its road-map, catering to different segments of the market. They have been broadly categorized into "Base Processors", "Multi-Core Processors" and "Experimental Processors".
The E and C-classes core are for the Internet of things (IoT), embedded system, and desktop computer markets. The processor design is free of any royalty and is open-source licensed under the modified BSD License.
E-class and C-class cores are both implemented in Bluespec SystemVerilog (BSV) language, a Haskell dialect.
The Shakti project aims to build 6 variants of processors based on the RISC-V ISA.
The E-class are 32- and 64-bit microcontrollers able to support all extensions of the RISC-V ISA, for low-power and low computer applications. The E-class is an in-order 3 stage pipeline having an operational frequency of less than 200 MHz on silicon. It is positioned against ARM's M-class (Cortex-M series) cores. It can run real-time operating systems like FreeRTOS, Zephyr, and eChronos. Market segments of E-class processor support smart cards, IoT devices, motor controls, and robotic platforms.