Semiconductor device fabrication

Semiconductor device fabrication is the process used to manufacture semiconductor devices, typically integrated circuits (ICs) such as microprocessors, microcontrollers, and memories (such as RAM and flash memory). It is a multiple-step photolithographic and physico-chemical process (with steps such as thermal oxidation, thin-film deposition, ion implantation, etching) during which electronic circuits are gradually created on a wafer, typically made of pure single-crystal semiconducting material. Silicon is almost always used, but various compound semiconductors are used for specialized applications. Steps such as etching and photolithography can be used to manufacture other devices, such as LCD and OLED displays.

The fabrication process is performed in highly specialized semiconductor fabrication plants, also called foundries or "fabs", with the central part being the "clean room". In more advanced semiconductor devices, such as modern 14/10/7 nm nodes, fabrication can take up to 15 weeks, with 11–13 weeks being the industry average. Production in advanced fabrication facilities is completely automated, with automated material handling systems taking care of the transport of wafers from machine to machine.

A wafer often has several integrated circuits, which are called dies as they are pieces diced from a single wafer. Individual dies are separated from a finished wafer in a process called die singulation, also called wafer dicing. The dies can then undergo further assembly and packaging.

Within fabrication plants, the wafers are transported inside special sealed plastic boxes called FOUPs. FOUPs in many fabs contain an internal nitrogen atmosphere which helps prevent copper from oxidizing on the wafers. Copper is used in modern semiconductors for wiring. The insides of the processing equipment and FOUPs is kept cleaner than the surrounding air in the cleanroom. This internal atmosphere is known as a mini-environment and helps improve yield, which is the number of working devices on a wafer. This mini environment is within an EFEM (equipment front end module) which allows a machine to receive FOUPs, and introduces wafers from the FOUPs into the machine. Additionally, many machines also handle wafers in clean nitrogen or vacuum environments to reduce contamination and improve process control. Fabrication plants need large amounts of liquid nitrogen to maintain the atmosphere inside production machinery and FOUPs, which are constantly purged with nitrogen. There can also be an air curtain or a mesh between the FOUP and the EFEM which helps reduce the amount of humidity that enters the FOUP and improves yield.

Companies that manufacture machines used in the industrial semiconductor fabrication process include ASML, Applied Materials, Tokyo Electron, and Lam Research.

Feature size (or process size) is determined by the width of the smallest lines that can be patterned in a semiconductor fabrication process; this measurement is known as the linewidth. Patterning often refers to photolithography which allows a device design or pattern to be defined on the device during fabrication. F² is used as a measurement of area for different parts of a semiconductor device, based on the feature size of a semiconductor manufacturing process. Many semiconductor devices are designed in sections called cells, and each cell represents a small part of the device, such as a memory cell to store data. Thus F² is used to measure the area taken up by these cells or sections.

A specific semiconductor process has specific rules on the minimum size (width or CD/Critical Dimension) and spacing for features on each layer of the chip. Normally, a new semiconductor process has smaller minimum sizes and tighter spacing. In some cases, this allows a simple die shrink of a currently produced chip design to reduce costs, improve performance, and increase transistor density (number of transistors per unit area) without the expense of a new design.

Early semiconductor processes had arbitrary names for generations (viz., HMOS I/II/III/IV and CHMOS III/III-E/IV/V). Later each new generation process became known as a technology node or process node, designated by the process' minimum feature size in nanometers (or historically micrometers) of the process's transistor gate length, such as the "90 nm process". However, this has not been the case since 1994, and the number of nanometers used to name process nodes (see the International Technology Roadmap for Semiconductors) has become more of a marketing term that has no standardized relation with functional feature sizes or with transistor density (number of transistors per unit area).