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Zen 4
Zen 4 is the name for a CPU microarchitecture designed by AMD, released on September 27, 2022. It is the successor to Zen 3 and uses TSMC's N6 process for I/O dies, N5 process for CCDs, and N4 process for APUs.
Zen 4 powers Ryzen 7000 performance desktop processors (codenamed "Raphael"), Ryzen 8000G series mainstream desktop APUs (codenamed "Phoenix"), and Ryzen Threadripper 7000 series HEDT and workstation processors (codenamed "Storm Peak"). It is also used in extreme mobile processors (codenamed "Dragon Range"), thin & light mobile processors (codenamed "Phoenix" and "Hawk Point"), as well as EPYC 8004/9004 server processors (codenamed "Siena", "Genoa" and "Bergamo"). Zen 4 is the first microarchitecture whose chips (Ryzen 7000) use the AM5 motherboard socket.
Like its predecessor, Zen 4 in its Desktop Ryzen variants features one or two Core Complex Dies (CCDs) built on TSMC's 5 nm process and one I/O die built on 6 nm. Previously, the I/O die on Zen 3 was built on GlobalFoundries' 14 nm process for EPYC and 12 nm process for Ryzen. Zen 4's I/O die includes integrated RDNA 2 graphics for the first time on any Zen architecture. Zen 4 marks the first utilization of the 5 nm process for x86-based desktop processors and also marks the return of 5.0 GHz clock rate to any AMD processors for the first time since the AMD FX-9590.
On all platforms, Zen 4 supports only DDR5 memory and LPDDR5X in mobile, with support for DDR4 and LPDDR4X dropped. Additionally, Zen 4 supports new AMD EXPO SPD profiles for more comprehensive memory tuning and overclocking by the RAM manufacturers. Unlike Intel's XMP, EXPO is marketed as an open, license- and royalty-free standard for describing memory kit parameters, such as operating frequency, timings and voltages. It allows to encode a wider set of timings to achieve better performance and compatibility. However, XMP memory profiles are still supported. EXPO can also support Intel processors.
All Zen 4 Ryzen desktop processors feature 28 (24 usable + 4 reserved) PCI Express 5.0 lanes. This means that a discrete GPU can be connected by 16 PCIe lanes or two GPUs by 8 PCIe lanes each. Additionally, there are now 2 x 4 lane PCIe interfaces, most often used for M.2 storage devices. Whether the lanes connecting the GPUs in the mechanical x16 slots are executed as PCIe 4.0 or PCIe 5.0 can be configured by the mainboard manufacturers. Finally, 4 PCIe 5.0 lanes are reserved for connecting the south bridge chip or chipset.
Zen 4 is the first AMD microarchitecture to support AVX-512 instruction set extension. Most 512-bit vector instructions are split in two and executed by the 256-bit SIMD execution units internally. The two halves execute in parallel on a pair of execution units and are still tracked as a single micro-OP (except for stores), which means the execution latency isn't doubled compared to 256-bit vector instructions. There are four 256-bit execution units, which gives a maximum throughput of two 512-bit vector instructions per clock cycle, e.g. one multiplication and one addition. The maximum number of instructions per clock cycle is doubled for vectors of 256 bits or less. Load and store units are also 256 bits each, retaining the throughput of up to two 256-bit loads or one store per cycle that was supported by Zen 3. This translates to up to one 512-bit load per cycle or one 512-bit store per two cycles.
Other features and improvements, compared to Zen 3, include:
On August 29, 2022, AMD announced four Zen 4-based Ryzen 7000 series desktop processors. The four Ryzen 7000 processors that were launched on September 27, 2022 consist of the Ryzen 5 7600X, Ryzen 7 7700X, and two Ryzen 9 CPUs: the 7900X and 7950X. The processors feature between 6 and 16 cores.
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Zen 4
Zen 4 is the name for a CPU microarchitecture designed by AMD, released on September 27, 2022. It is the successor to Zen 3 and uses TSMC's N6 process for I/O dies, N5 process for CCDs, and N4 process for APUs.
Zen 4 powers Ryzen 7000 performance desktop processors (codenamed "Raphael"), Ryzen 8000G series mainstream desktop APUs (codenamed "Phoenix"), and Ryzen Threadripper 7000 series HEDT and workstation processors (codenamed "Storm Peak"). It is also used in extreme mobile processors (codenamed "Dragon Range"), thin & light mobile processors (codenamed "Phoenix" and "Hawk Point"), as well as EPYC 8004/9004 server processors (codenamed "Siena", "Genoa" and "Bergamo"). Zen 4 is the first microarchitecture whose chips (Ryzen 7000) use the AM5 motherboard socket.
Like its predecessor, Zen 4 in its Desktop Ryzen variants features one or two Core Complex Dies (CCDs) built on TSMC's 5 nm process and one I/O die built on 6 nm. Previously, the I/O die on Zen 3 was built on GlobalFoundries' 14 nm process for EPYC and 12 nm process for Ryzen. Zen 4's I/O die includes integrated RDNA 2 graphics for the first time on any Zen architecture. Zen 4 marks the first utilization of the 5 nm process for x86-based desktop processors and also marks the return of 5.0 GHz clock rate to any AMD processors for the first time since the AMD FX-9590.
On all platforms, Zen 4 supports only DDR5 memory and LPDDR5X in mobile, with support for DDR4 and LPDDR4X dropped. Additionally, Zen 4 supports new AMD EXPO SPD profiles for more comprehensive memory tuning and overclocking by the RAM manufacturers. Unlike Intel's XMP, EXPO is marketed as an open, license- and royalty-free standard for describing memory kit parameters, such as operating frequency, timings and voltages. It allows to encode a wider set of timings to achieve better performance and compatibility. However, XMP memory profiles are still supported. EXPO can also support Intel processors.
All Zen 4 Ryzen desktop processors feature 28 (24 usable + 4 reserved) PCI Express 5.0 lanes. This means that a discrete GPU can be connected by 16 PCIe lanes or two GPUs by 8 PCIe lanes each. Additionally, there are now 2 x 4 lane PCIe interfaces, most often used for M.2 storage devices. Whether the lanes connecting the GPUs in the mechanical x16 slots are executed as PCIe 4.0 or PCIe 5.0 can be configured by the mainboard manufacturers. Finally, 4 PCIe 5.0 lanes are reserved for connecting the south bridge chip or chipset.
Zen 4 is the first AMD microarchitecture to support AVX-512 instruction set extension. Most 512-bit vector instructions are split in two and executed by the 256-bit SIMD execution units internally. The two halves execute in parallel on a pair of execution units and are still tracked as a single micro-OP (except for stores), which means the execution latency isn't doubled compared to 256-bit vector instructions. There are four 256-bit execution units, which gives a maximum throughput of two 512-bit vector instructions per clock cycle, e.g. one multiplication and one addition. The maximum number of instructions per clock cycle is doubled for vectors of 256 bits or less. Load and store units are also 256 bits each, retaining the throughput of up to two 256-bit loads or one store per cycle that was supported by Zen 3. This translates to up to one 512-bit load per cycle or one 512-bit store per two cycles.
Other features and improvements, compared to Zen 3, include:
On August 29, 2022, AMD announced four Zen 4-based Ryzen 7000 series desktop processors. The four Ryzen 7000 processors that were launched on September 27, 2022 consist of the Ryzen 5 7600X, Ryzen 7 7700X, and two Ryzen 9 CPUs: the 7900X and 7950X. The processors feature between 6 and 16 cores.