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LM393 dual comparator, a common comparator integrated circuit chip, shown on a circuit board

In electronics, a comparator is a device that compares two voltages or currents and outputs a digital signal indicating which is larger. It has two analog input terminals and and one binary digital output . The output is ideally

A comparator consists of a specialized high-gain differential amplifier. They are commonly used in devices that measure and digitize analog signals, such as analog-to-digital converters (ADCs), as well as relaxation oscillators.

Differential voltage

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Illustration of how a comparator works

The differential voltages must stay within the limits specified by the manufacturer. Early integrated comparators, like the LM111 family, and certain high-speed comparators like the LM119 family, require differential voltage ranges substantially lower than the power-supply voltages (±15 V vs. 36 V).[1] Rail-to-rail comparators allow any differential voltages within the power-supply range. When powered from a bipolar (dual rail) supply,

or when powered from an unipolar TTL/CMOS power supply,

.

Specific rail-to-rail comparators with p–n–p input transistors, like the LM139 family, allow the input potential to drop 0.3 volts below the negative supply rail, but do not allow it to rise above the positive rail.[2] Specific ultra-fast comparators, like the LMH7322, allow the input signal to swing below the negative rail and above the positive rail, although by a narrow margin of only 0.2 V.[3] Differential input voltage (the voltage between two inputs) of a modern rail-to-rail comparator is usually limited only by the full swing of power supply.

Op-amp voltage comparator

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A simple op-amp comparator

An operational amplifier (op-amp) has a well balanced difference input and a very high gain. This parallels the characteristics of comparators and can be substituted in applications with low-performance requirements.[4]

A comparator circuit compares two voltages and outputs either a 1 (the voltage at the plus side) or a 0 (the voltage at the negative side) to indicate which is larger. Comparators are often used, for example, to check whether an input has reached some predetermined value. In most cases a comparator is implemented using a dedicated comparator IC, but op-amps may be used as an alternative. Comparator diagrams and op-amp diagrams use the same symbols.

A simple comparator circuit made using an op-amp without feedback simply heavily amplifies the voltage difference between Vin and VREF and outputs the result as Vout. If Vin is greater than VREF, then voltage at Vout will rise to its positive saturation level; that is, to the voltage at the positive side. If Vin is lower than VREF, then Vout will fall to its negative saturation level, equal to the voltage at the negative side.

In practice, this circuit can be improved by incorporating a hysteresis voltage range to reduce its sensitivity to noise.

Because of the difference in characteristics of an operational amplifier and comparator, using an operational amplifier as a comparator presents several disadvantages as compared to using a dedicated comparator.[5]

  1. Op-amps are designed to operate in the linear mode with negative feedback. Hence, an op-amp typically has a lengthy recovery time from saturation. Almost all op-amps have an internal compensation capacitor which imposes slew rate limitations for high frequency signals. Consequently, an op-amp makes a sloppy comparator with propagation delays that can be as long as tens of microseconds.
  2. Since op-amps do not have any internal hysteresis, an external hysteresis network is always necessary for slow moving input signals.
  3. The quiescent current specification of an op-amp is valid only when the feedback is active. Some op-amps show an increased quiescent current when the inputs are not equal.
  4. A comparator is designed to produce well-limited output voltages that easily interface with digital logic. Compatibility with digital logic must be verified while using an op-amp as a comparator.
  5. Some multiple-section op-amps may exhibit extreme channel-channel interaction when used as comparators.
  6. Many op-amps have back to back diodes between their inputs. Op-amp inputs usually follow each other so this is fine. But comparator inputs are not usually the same. The diodes can cause unexpected current through inputs.

Design

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A comparator consists of a high gain differential amplifier whose output is compatible with the logic gates used in the digital circuit. The gain is high enough that a very small difference between the input voltages will saturate the output, the output voltage will be in either the low logic voltage band or the high logic voltage band of the gate input. Analogue op amps have been used as comparators, however a dedicated comparator chip will generally be faster than a general-purpose operational amplifier used as a comparator, and may also contain additional features such as an accurate, internal reference voltage, adjustable hysteresis, and a clock gated input.

A dedicated voltage comparator chip such as LM339 is designed to interface with a digital logic interface (to a TTL or a CMOS). The output is a binary state often used to interface real world signals to digital circuitry (see analog-to-digital converter). If there is a fixed voltage source from, for example, a DC adjustable device in the signal path, a comparator is just the equivalent of a cascade of amplifiers. When the voltages are nearly equal, the output voltage will not fall into one of the logic levels, thus analog signals will enter the digital domain with unpredictable results. To make this range as small as possible, the amplifier cascade is high gain. The circuit consists of mainly bipolar transistors. For very high frequencies, the input impedance of the stages is low. This reduces the saturation of the slow, large p–n junction bipolar transistors that would otherwise lead to long recovery times. Fast small Schottky diodes, like those found in binary logic designs, improve the performance significantly though the performance still lags that of circuits with amplifiers using analog signals. Slew rate has no meaning for these devices. For applications in flash ADCs the distributed signal across eight ports matches the voltage and current gain after each amplifier, and resistors then behave as level-shifters.

Open collector output

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Main article: Open collector

Some comparators (e.g. LM339) use open collector output to help interface to different logic families. When the inverting input is at a higher voltage than the non inverting input, the output of the comparator connects to the negative power supply. When the non inverting input is higher than the inverting input, the output is high impedance, so the output voltage in this state can be set by an external pull-up resistor to a different voltage supply.

Key specifications

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While it is easy to understand the basic task of a comparator, that is, comparing two voltages or currents, several parameters must be considered while selecting a suitable comparator:

Speed and power

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While in general comparators are "fast," their circuits are not immune to the classic speed-power tradeoff. High speed comparators use transistors with larger aspect ratios and hence also consume more power.[6] Depending on the application, select either a comparator with high speed or one that saves power. For example, nano-powered comparators in space-saving chip-scale packages (UCSP), DFN or SC70 packages such as MAX9027,[7] LTC1540,[8] LPV7215,[9] MAX9060,[10] and MCP6541,[11] are ideal for ultra-low-power, portable applications. Likewise if a comparator is needed to implement a relaxation oscillator circuit to create a high speed clock signal then comparators having few Nanoseconds of propagation delay may be suitable. ADCMP572 (CML output),[12] LMH7220 (LVDS Output),[13] MAX999 (CMOS output / TTL output),[14] LT1719 (CMOS output / TTL output),[15] MAX9010 (TTL output),[16] and MAX9601 (PECL output),[17] are examples of some good high speed comparators.

Hysteresis

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A comparator normally changes its output state when the voltage between its inputs crosses through approximately zero volts. Small voltage fluctuations due to noise, always present on the inputs, can cause undesirable rapid changes between the two output states when the input voltage difference is near zero volts. To prevent this output oscillation, a small hysteresis of a few millivolts is integrated into many modern comparators.[18] For example, the LTC6702,[19] MAX9021,[20] and MAX9031,[21] have internal hysteresis desensitizing them from input noise. In place of one switching point, hysteresis introduces two: one for rising voltages, and one for falling voltages. The difference between the higher-level trip value (VTRIP+) and the lower-level trip value (VTRIP-) equals the hysteresis voltage (VHYST).

If the comparator does not have internal hysteresis or if the input noise is greater than the internal hysteresis then an external hysteresis network can be built using positive feedback from the output to the non-inverting input of the comparator. The resulting Schmitt trigger circuit gives additional noise immunity and a cleaner output signal. Some comparators such as LMP7300,[22] LTC1540,[8] MAX931,[23] MAX971,[24] and ADCMP341,[25] also provide the hysteresis control through a separate hysteresis pin. These comparators make it possible to add a programmable hysteresis without feedback or complicated equations. Using a dedicated hysteresis pin is also convenient if the source impedance is high since the inputs are isolated from the hysteresis network.[26] When hysteresis is added then a comparator cannot resolve signals within the hysteresis band.

Output type

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A low-power CMOS clocked comparator

Because comparators have only two output states, their outputs are either near zero or near the supply voltage. Bipolar rail-to-rail comparators have a common-emitter output that produces a small voltage drop between the output and each rail. That drop is equal to the collector-to-emitter voltage of a saturated transistor. When output currents are light, output voltages of CMOS rail-to-rail comparators, which rely on a saturated MOSFET, range closer to the rail voltages than their bipolar counterparts.[27]

On the basis of outputs, comparators can also be classified as open-drain or push–pull. Comparators with an open-drain output stage use an external pull-up resistor to a positive supply that defines the logic high level. Open-drain comparators are more suitable for mixed-voltage system design. Since the output has high impedance for logic high level, open-drain comparators can also be used to connect multiple comparators to a single bus. Push–pull output does not need a pull-up resistor and can also source current, unlike an open-drain output.

Internal reference

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The most frequent application for comparators is the comparison between a voltage and a stable reference. TL431 is widely used for this purpose. Most comparator manufacturers also offer comparators in which a reference voltage is integrated on to the chip. Combining the reference and comparator in one chip not only saves space, but also draws less supply current than a comparator with an external reference.[27] ICs with wide range of references are available such as MAX9062 (200 mV reference),[10] LT6700 (400 mV reference),[28] ADCMP350 (600 mV reference),[29] MAX9025 (1.236 V reference),[7] MAX9040 (2.048 V reference),[30] TLV3012 (1.24 V reference),[31] and TSM109 (2.5 V reference).[32]

Continuous versus clocked

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A continuous comparator will output either a "1" or a "0" any time a high or low signal is applied to its input and will change quickly when the inputs are updated. However, many applications only require comparator outputs at certain instances, such as in A/D converters and memory. By only strobing a comparator at certain intervals, higher accuracy and lower power can be achieved with a clocked (or dynamic) comparator structure, also called a latched comparator. Often latched comparators employ strong positive feedback for a "regeneration phase" when a clock is high, and have a "reset phase" when the clock is low.[33] This is in contrast to a continuous comparator, which can only employ weak positive feedback since there is no reset period.

Applications

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Main article: Comparator applications
A precision calibration comparator

Null detectors

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A null detector identifies when a given value is zero. Comparators are ideal for null detection comparison measurements, since they are equivalent to a very high gain amplifier with well-balanced inputs and controlled output limits. The null detector circuit compares two input voltages: an unknown voltage and a reference voltage, usually referred to as vu and vr. The reference voltage is usually on the non-inverting input (+), while the unknown voltage is usually on the inverting input (−). (A circuit diagram would display the inputs according to their sign with respect to the output when a particular input is greater than the other.) Unless the inputs are nearly equal (see below), the output is either positive or negative, for example ±12 V. In the case of a null detector the aim is to detect when the input voltages are nearly equal, which gives the value of the unknown voltage since the reference voltage is known.

When using a comparator as a null detector, accuracy is limited; an output of zero is given whenever the magnitude of the voltage difference multiplied by the gain of the amplifier is within the voltage limits. For example, if the gain is 106, and the voltage limits are ±6 V, then an output of zero will be given if the voltage difference is less than 6 μV. One could refer to this as a fundamental uncertainty in the measurement.[34]

Zero-crossing detectors

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For this type of detector, a comparator detects each time an AC pulse changes polarity. The output of the comparator changes state each time the pulse changes its polarity, that is the output is HI (high) for a positive pulse and LO (low) for a negative pulse squares the input signal.[35]

Relaxation oscillator

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A comparator can be used to build a relaxation oscillator. It uses both positive and negative feedback. The positive feedback is a Schmitt trigger configuration. Alone, the trigger is a bistable multivibrator. However, the slow negative feedback added to the trigger by the RC circuit causes the circuit to oscillate automatically. That is, the addition of the RC circuit turns the hysteretic bistable multivibrator into an astable multivibrator.[36]

Level shifter

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National Semiconductor LM393

This circuit requires only a single comparator with an open-drain output as in the LM393,[37] TLV3011,[38] or MAX9028.[7] The circuit provides great flexibility in choosing the voltages to be translated by using a suitable pull up voltage. It also allows the translation of bipolar ±5 V logic to unipolar 3 V logic by using a comparator like the MAX972.[24][27]

Analog-to-digital converters

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When a comparator performs the function of telling if an input voltage is above or below a given threshold, it is essentially performing a 1-bit quantization. This function is used in nearly all analog to digital converters (such as flash, pipeline, successive approximation, delta-sigma modulation, folding, interpolating, dual-slope and others) in combination with other devices to achieve a multi-bit quantization.[39]

Window detectors

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Comparators can also be used as window detectors. In a window detector, a comparator is used to compare two voltages and determine whether a given input voltage is under voltage or over voltage.

Absolute-value detectors

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Comparators can be used to create absolute-value detectors. In an absolute-value detector, two comparators and a digital logic gate are used to compare the absolute values of two voltages.[40]

See also

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References

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Revisions and contributorsEdit on WikipediaRead on Wikipedia

Comparator

View on Grokipedia
from Grokipedia
A comparator is an or device that compares two analog input voltages and produces a binary digital output signal indicating which input is greater, typically switching to a high if the non-inverting input exceeds the inverting input and low otherwise. Often implemented using an (op-amp) in open-loop configuration without , this setup exploits the op-amp's high gain to create a sharp transition at the point where the inputs are equal. Comparators serve as fundamental building blocks in analog and mixed-signal systems, functioning essentially as a one-bit by quantizing the input difference into a binary decision. Key performance parameters include delay, which measures the time from input crossing to output change, and , representing the differential input needed for zero output due to device mismatches. To mitigate noise-induced oscillations near the threshold, many comparators incorporate , creating different switching thresholds for rising and falling inputs via . Notable applications encompass analog-to-digital converters (ADCs), where arrays of comparators form the core of flash architectures for high-speed conversion; in ; zero-crossing detectors for phase-locked loops; and circuits. Comparators are also integral to relaxation oscillators and window comparators, which use dual thresholds to detect signals within a specified range. Modern integrated comparators, available from manufacturers like and , offer features such as low power consumption, rail-to-rail inputs, and push-pull or open-collector outputs to suit diverse supply voltages and interfacing needs.

Fundamentals

Basic Operation

A comparator is an that compares two input voltages and produces a binary digital output signal indicating which input is greater. This output is typically a high (often near the positive supply voltage) when the non-inverting input exceeds the inverting input, and a low (near ground or the negative supply) otherwise. Comparators serve as fundamental building blocks in analog-to-digital interfaces, such as within analog-to-digital converters (ADCs), where they enable the quantization of continuous analog signals into discrete digital representations. The core operation of a comparator centers on threshold comparison, where the output state changes abruptly when the relative magnitudes of the two inputs cross a decision point—specifically, when the voltage at the non-inverting input (denoted Vin+V_{in+}) surpasses that at the inverting input (denoted Vin−V_{in-}), or vice versa depending on the configuration. In its ideal form, this comparison yields a perfect step function response, with no transition region or delay, though real devices approximate this behavior with finite gain and speed limits. The comparison relies on the differential voltage between the inputs, amplifying any difference to drive the output to one of its saturated states. The basic block diagram of a comparator consists of two input terminals for receiving Vin+V_{in+} and Vin−V_{in-}, an internal logic stage that evaluates their difference, and a single digital output terminal that reflects the binary result of the . Transistorized comparators emerged in the alongside the development of technology, facilitating their integration into early and systems during the shift from tube-based to solid-state designs. The voltage transfer characteristic of an ideal comparator is a discontinuous , mathematically expressed as: Vout={Vhighif Vin+>Vin−VlowotherwiseV_{out} = \begin{cases} V_{high} & \text{if } V_{in+} > V_{in-} \\ V_{low} & \text{otherwise} \end{cases} where VhighV_{high} and VlowV_{low} represent the supply rail voltages defining the output logic levels.

Differential Input Stage

The differential input stage of a comparator processes the difference between the two input voltages, defined as Vdiff=VIN+−VIN-V_{\text{diff}} = V_{\text{IN+}} - V_{\text{IN-}}, which serves as the primary parameter determining the output logic state. This stage amplifies even minute differences in VdiffV_{\text{diff}} to drive the output to its full rail-to-rail swing, such as from ground to the supply voltage, enabling a binary decision. In contrast to linear amplifiers, where the output scales proportionally with the input difference within the linear , the comparator's input stage pushes the signal into saturation for rapid switching, prioritizing decision speed over proportional fidelity. The core architecture of the differential input stage typically employs a differential pair of matched transistors, such as NPN or PNP bipolar junction transistors (BJTs), with their emitters (or sources in MOSFET variants) connected to a source. This configuration provides high differential gain while achieving excellent common-mode rejection, as common-mode signals applied equally to both inputs produce balanced currents that cancel out at the output. The unbalanced currents resulting from VdiffV_{\text{diff}} are then converted to a voltage difference, often via active loads like current mirrors, to initiate the amplification process. In an ideal comparator, the output transitions at Vdiff=0V_{\text{diff}} = 0, but the high AA ensures that the output voltage approximates Vout≈A⋅VdiffV_{\text{out}} \approx A \cdot V_{\text{diff}} for small ∣Vdiff∣|V_{\text{diff}}|, rapidly saturating to the supply rails as ∣Vdiff∣|V_{\text{diff}}| exceeds a few millivolts. Here, AA is the differential voltage gain, often on the order of 200 V/mV or higher, determined by the of the input transistors and the load impedance, though exact values depend on the specific implementation without requiring detailed derivation. However, practical limitations arise from input offset voltage and common-mode input range. The input offset voltage VOSV_{\text{OS}}, typically a few millivolts, represents the inherent VdiffV_{\text{diff}} needed to balance the stage and trigger switching, arising from mismatches and biasing errors. Additionally, the common-mode input range defines the allowable voltage span for both inputs where the stage maintains proper operation and rejection, often limited by saturation or breakdown, such as from near ground to near the positive supply in rail-to-rail designs. Exceeding this range can lead to phase inversion or .

Circuit Implementations

Operational Amplifier-Based Comparators

Operational amplifiers (op-amps) can be configured as comparators by operating them in open-loop mode, where the high gain amplifies the differential input voltage to produce a binary output that switches between the supply rails based on whether the input signal exceeds a reference threshold. In this setup, no feedback is applied, allowing the op-amp to function as a element for voltage comparison tasks. The non-inverting configuration applies the input signal to the non-inverting (+) terminal and the voltage to the inverting (-) terminal; the output goes high (positive saturation) when the input exceeds the and low (negative saturation) otherwise. Conversely, the inverting configuration connects the input signal to the inverting (-) terminal and the to the non-inverting (+) terminal, resulting in the output going high when the input is below the and low when above, thereby inverting the comparison logic. A basic schematic for setting the threshold uses a two-resistor voltage divider on the reference input. For the non-inverting setup, connect resistor R1R_1 from the reference voltage VrefV_{ref} to the inverting input and R2R_2 from the inverting input to ground; the is given by Vth=R2R1+R2VrefV_{th} = \frac{R_2}{R_1 + R_2} V_{ref} This divides VrefV_{ref} to create a precise level at the inverting terminal. One key advantage of op-amp-based comparators is their low cost, as general-purpose op-amps are ubiquitous and readily available for prototyping or low-volume applications without needing specialized components. However, they suffer from slower response times compared to dedicated comparators, primarily due to internal compensation capacitors designed for stable closed-loop operation, which introduce phase lag and limit slew rates to around 0.5 V/μs in typical devices. Additionally, potential instability can arise from input overdrive or capacitive loading, and the output swing may not directly interface with digital logic levels without buffering. In the inverting configuration, phase inversion occurs because the output polarity is opposite to the input signal's relation to the threshold, which can complicate downstream logic. This can be mitigated by adding an additional inverter stage, such as a second op-amp in a simple inverting buffer configuration, to restore the desired output polarity without significantly impacting speed. The μA741 op-amp, introduced by in 1968, exemplifies early use of general-purpose op-amps in comparator applications during the late and , where its internal compensation and offset null capability made it suitable for basic voltage detection in analog systems despite its modest 1 MHz bandwidth.

Dedicated Integrated Comparators

Dedicated integrated comparators represent purpose-built integrated circuits optimized specifically for voltage comparison tasks, offering superior performance in speed and efficiency compared to adapting general-purpose operational amplifiers. The LM339, introduced by in the early 1970s, marked a significant milestone as one of the first dedicated quad comparator ICs, designed for multi-channel applications with low power consumption and compatibility with TTL logic levels. This development addressed the limitations of earlier discrete or op-amp-based designs by integrating multiple independent comparators on a single chip, enabling compact and cost-effective solutions for . Internally, these ICs employ optimized differential input stages, typically using bipolar pairs for high and gain, followed by output stages without the compensation capacitors required in op-amps for stability in closed-loop operation. This absence of compensation allows for rapid signal transitions, as the circuit prioritizes and over linear amplification, resulting in switching speeds unsuitable for feedback but ideal for binary decisions. Key examples include the LM311 single comparator, the LM393 dual comparator, and the LM339 quad comparator, all part of the enduring LMx39 family originally from National Semiconductor (now Texas Instruments). The LM311 features an 8-pin DIP package with pin 1 as balance, pin 2 as the inverting input, pin 3 as the non-inverting input, pin 4 as V- / strobe, pin 5 as balance / strobe, pin 6 as emitter output, pin 7 as collector output (open-collector), and pin 8 as V+. In a basic application, the inputs connect to the voltages to be compared, the output pulls low when the non-inverting input exceeds the inverting, and a pull-up resistor (e.g., 10 kΩ to V+) converts the open-collector to a logic-high signal. The LM393, in an 8-pin package, has dual channels with pins 1 and 7 as outputs, pins 2/3 and 5/6 as inverting/non-inverting inputs for each, pin 4 for GND, and pin 8 for VCC; a simple circuit mirrors the LM311 but supports two comparisons per IC. The LM339 extends this to four channels in a 14-pin package with the following pinout: pin 1 (output 1), pin 2 (output 2), pin 3 (V+), pin 4 (inverting input 2), pin 5 (non-inverting input 2), pin 6 (inverting input 1), pin 7 (non-inverting input 1), pin 8 (inverting input 3), pin 9 (non-inverting input 3), pin 10 (inverting input 4), pin 11 (non-inverting input 4), pin 12 (GND), pin 13 (output 4), pin 14 (output 3). Basic circuit uses similar input connections and pull-ups on each output for multi-comparison setups. These dedicated ICs provide advantages such as higher switching speeds, lower quiescent power (often under 1 mA total), and wide common-mode input ranges approaching rail-to-rail operation in many variants, facilitating direct interfacing without level shifters. Unlike op-amp configurations requiring external components for speed optimization, dedicated designs minimize propagation delay through streamlined architecture. Propagation delay (t_pd) is the time from the input differential voltage crossing zero to the output reaching 50% of its transition; for the LM339, it typically measures 1.3 μs under 5 mV overdrive. A representative timing for this metric is shown below, where the inputs cross at t=0, and the output transitions after t_pd:

Time axis → V_IN+ ───┐ ┌── │ │ └─────────┘ (rising edge) V_IN- ───┴ └─ │ │ └──┐ └── (falling edge, cross at t=0) V_DIFF ───────┐ (overdrive starts) │ └─ V_OUT ───────┴────────── (falls after t_pd) │ │ └ (50% point defines t_pd)

Time axis → V_IN+ ───┐ ┌── │ │ └─────────┘ (rising edge) V_IN- ───┴ └─ │ │ └──┐ └── (falling edge, cross at t=0) V_DIFF ───────┐ (overdrive starts) │ └─ V_OUT ───────┴────────── (falls after t_pd) │ │ └ (50% point defines t_pd)

The following table compares key specifications for these common ICs:
ICChannelsSupply Voltage Range (V)Input Offset Voltage (mV, max)Propagation Delay (ns, typ)
LM31115 to 30 (single)4200
LM39322 to 3691300
LM33942 to 3691300

Design Features

Output Configurations

Comparators employ various output configurations to interface with subsequent circuitry, each offering distinct electrical characteristics and trade-offs in drive capability, speed, and compatibility. These configurations determine how the comparator drives the output high or low in response to input comparisons, influencing factors such as voltage swing, current handling, and the ability to connect multiple devices. The standard push-pull output, also known as totem-pole, utilizes complementary transistors—one to source current (pull up) and another to current (pull down)—enabling full rail-to-rail voltage swing without an external . This configuration provides symmetrical rise and fall times, typically under 100 ns, and supports both sourcing and sinking currents up to several milliamperes, making it suitable for driving logic gates or loads directly from the supply rails. In totem-pole implementations, often using two NPN transistors in a stacked arrangement for the upper stage, the output actively drives to V+ (high) or ground (low), achieving low for both states but preventing direct tying of multiple outputs due to potential short-circuit risks. Quasi-complementary outputs represent a variant of push-pull where the complementary stages are asymmetric, such as using a pair of NPN transistors for the upper (sourcing) stage paired with a single NPN for the lower (sinking) stage, to simplify fabrication while approximating full complementary performance. This approach offers advantages in cost and integration for bipolar processes but may introduce slight nonlinearity or reduced sourcing efficiency compared to true complementary push-pull, though it still provides rail-to-rail swing and active drive in both directions. In contrast, the open-collector (or open-drain in CMOS equivalents) output relies on a single NPN transistor whose collector is left open, allowing the output to sink current to ground when low but float high when off, necessitating an external pull-up resistor to define the high state. Schematically, the output transistor connects between the output pin and ground, with the pull-up resistor tied from the output to a termination voltage, enabling level-shifting if the pull-up voltage exceeds the comparator's supply (e.g., up to 36 V for devices like the LM139). The pull-up resistor value is selected as Rpullup=Vsupply−VOLIloadR_{\text{pullup}} = \frac{V_{\text{supply}} - V_{\text{OL}}}{I_{\text{load}}}, where VOLV_{\text{OL}} is the low output voltage (typically 0.4 V) and IloadI_{\text{load}} is the required drive current, balancing speed against power dissipation and rise time influenced by load capacitance. This configuration excels in wired-OR logic, where multiple open-collector outputs can be tied together to a single pull-up, allowing any active low to pull the bus low while inactive outputs float, facilitating multi-device connections like error detection buses or window comparators without additional gating. Open-collector outputs gained popularity in TTL-compatible designs, such as the SN54/7400 series, due to their versatility in wired-OR applications and compatibility with expanding digital systems, as detailed in early TTL design guides. For protection, many comparators incorporate output clamping diodes or ESD structures to limit voltage excursions, preventing damage from overvoltage on open-collector pins (e.g., clamping to VCC + 0.3 V) or shorts in push-pull stages. Similar to dedicated comparator outputs, operational amplifier-based designs often use push-pull stages for comparable drive but may lack the optimized speed of specialized comparators.

Hysteresis Mechanisms

Hysteresis in comparators is introduced through , which establishes two distinct switching thresholds: a lower threshold (Vth-) for rising input signals and an upper threshold (Vth+) for falling signals. This mechanism prevents rapid output oscillations caused by around a single threshold, as the output remains until the input crosses the appropriate threshold in the opposite direction. The implementation typically involves a network that feeds a portion of the output voltage back to one of the comparator inputs. In a basic inverting configuration, the input signal is applied to the inverting input (with V_ref also considered at the inverting input or adjusted); a feedback (R1) connects the output to the non-inverting input, while a second (R2) connects the non-inverting input to ground (or a reference voltage). The voltage (Vhys) is given by: Vhys=R2R1+R2×VoutswingVhys = \frac{R2}{R1 + R2} \times V_{out_{swing}} where VoutswingV_{out_{swing}} is the output voltage swing (e.g., from 0 V to the supply voltage). The thresholds are derived as follows: for a rising input, when the output is low (0 V), Vth−=Vref−VhysV_{th-} = V_{ref} - Vhys; for a falling input, when the output is high (VoutswingV_{out_{swing}}), Vth+=Vref+VhysV_{th+} = V_{ref} + Vhys, assuming a voltage VrefV_{ref} effectively at the inverting input. This positive feedback shifts the effective reference based on the output state, creating the dual-threshold behavior. Two primary configurations exist: non-inverting and inverting Schmitt triggers. In the non-inverting type, the input signal is applied to the non-inverting terminal, and feedback adjusts the threshold there, resulting in an output that follows the input logic with hysteresis. The inverting configuration applies the input to the inverting terminal, with feedback to the non-inverting terminal, inverting the logic while providing the same threshold separation. Both types achieve noise rejection but differ in signal polarity handling. The primary benefit of hysteresis is enhanced noise immunity, particularly for slowly varying or noisy input signals, where it avoids false triggering and ensures clean transitions. However, it introduces a drawback of reduced resolution, as the effective input range is narrowed by the hysteresis width, potentially limiting precision in applications requiring fine detection. For example, consider R1 = 1 MΩ (feedback), R2 = 10 kΩ (to ground), and Voutswing=5V_{out_{swing}} = 5 V, with Vref=2.5V_{ref} = 2.5 V. Then, Vhys=10×1031×106+10×103×5≈0.05Vhys = \frac{10 \times 10^3}{1 \times 10^6 + 10 \times 10^3} \times 5 \approx 0.05 V, yielding Vth+≈2.55V_{th+} \approx 2.55 V and Vth−≈2.45V_{th-} \approx 2.45 V.

Performance Specifications

Speed and Power Characteristics

Propagation delay in comparators is defined as the time interval from the (50%) of the input voltage transition to the (50%) of the corresponding output voltage transition. This metric quantifies the device's response speed to input changes and is influenced by factors such as input overdrive voltage (the excess beyond the threshold) and the input signal's . For instance, lower overdrive increases delay due to reduced differential input, while slower input transitions can extend the effective delay by limiting the rate at which the internal differential stage responds. In the LM393 dual comparator, typical propagation delay is 300 ns under conditions of TTL logic swing input, 1.4 V reference, and 5 V supply with a 5.1 kΩ load. Faster bipolar comparators like the LM311 achieve around 200 ns propagation delay with similar overdrive. Slew rate for comparators refers to the maximum rate of change of the output voltage (dV/dt), typically expressed in V/µs, which determines how quickly the output can swing between logic levels during transitions. Rise and fall times, measured from 10% to 90% of the output swing, are closely related and often limited by this ; for example, rise time can be approximated as 0.8 × (output voltage swing) / . To avoid errors from slew limiting or integration during slow inputs, the minimum input transition time should exceed the comparator's inherent delay but remain fast enough to minimize offset from thermal —ideally, input above 1 V/µs for high-speed devices to ensure accurate threshold crossing without prolonged uncertainty. Bipolar comparators like the LM311 exhibit around 30 V/µs, resulting in rise/fall times of ~0.2 µs for full 5 V swings, while modern CMOS designs can achieve higher rates up to 10 V/µs in optimized processes. Power consumption in comparators comprises quiescent current (Iq, the steady-state draw with no input switching) and dynamic power from output transitions, calculated as P_dynamic ≈ V_supply × I_switch × f_switch, where I_switch is the switching current and f_switch is the transition frequency. Low-power comparators prioritize minimal Iq, often in the nA to µA range, enabling battery-operated applications; for example, the LMC6762 draws 12 µA typical total (6 µA per comparator) at 5 V. In contrast, traditional bipolar designs like the LM393 consume 0.4 mA typical Iq (2 mW at 5 V), with dynamic contributions adding during high-frequency operation. A fundamental exists between speed and power in comparator : faster delays require higher currents, increasing both quiescent and dynamic power, while low-power variants sacrifice speed. Bipolar processes excel in speed due to higher but incur higher power (e.g., several mA Iq for ns delays), whereas offers superior efficiency with µA Iq but typically slower responses (µs range) unless scaled to advanced nodes. BiCMOS hybrids mitigate this by combining bipolar speed for critical paths with CMOS low-power logic, achieving sub-100 ns delays at mW levels.
IC Family/ExampleTypical Propagation DelayTypical Iq (at 5 V)Notes/Source
Bipolar (LM393)300 ns0.4 mAStandard dual comparator
Bipolar (LM311)200 ns5.1 mAHigh-speed single
CMOS (LMC6762)0.42 µs6 µA (per comparator)Micropower rail-to-rail
CMOS (MCP65R41)4 µs2.5 µALow-power push-pull output
BiCMOS (LT1011)150 ns3.2 mAUltrafast with adjustable offset

Operational Modes and References

Comparators operate in either continuous or clocked modes, depending on the application requirements for real-time response or . In continuous mode, the comparator continuously monitors the input signals and produces an output that reflects the instantaneous comparison, making it suitable for analog signals without timing constraints. Clocked, or , comparators incorporate a sample-and-hold mechanism that captures the input at clock edges, followed by a regeneration phase where the output is resolved and latched until the next clock cycle; this mode includes a finite regeneration time determined by the latch circuitry's gain and load. Many integrated comparators feature internal reference voltages to simplify circuit design and improve precision, often generated using bandgap circuits that produce stable outputs around 1.2 V or other fixed levels. These references are derived from the silicon bandgap energy, combining proportional-to-absolute-temperature (PTAT) and complementary-to-absolute-temperature (CTAT) components to minimize thermal drift. The accuracy of such a reference over a temperature change ΔT is approximated by Vref±ΔT×tempcoV_{\text{ref}} \pm \Delta T \times \text{tempco}, where tempco is the temperature coefficient typically expressed in ppm/°C or V/°C. For instance, Microchip's comparator modules include selectable internal bandgap references of 1.2 V, 0.6 V, or 0.2 V for threshold comparison. Window comparators extend basic functionality by defining an acceptable input range between upper and lower thresholds, typically implemented using two comparators whose outputs are combined with logic gates such as AND or OR. The first comparator monitors the upper limit (output high if input < upper threshold), while the second handles the lower limit (output high if input > lower threshold); a logical AND of these outputs asserts when the input falls within the , providing over/under-voltage detection. Clocked comparators offer advantages in synchronized systems like analog-to-digital converters (ADCs), where they reduce risks by sampling inputs at precise times and allowing regeneration to resolve near-threshold decisions without . Continuous modes, conversely, excel in real-time where immediate response is critical, avoiding clock-related latency. Examples include LVDS-output comparators like the LMH7220, which maintain a 1.2 V internal for output common-mode stability, and devices with built-in thresholds for differential signaling applications.

Applications

Signal Detection Circuits

Comparators play a crucial role in signal detection circuits by providing rapid thresholding decisions to identify specific voltage levels, transitions, or deviations in input signals, enabling applications in processing and measurement systems. These circuits leverage the comparator's ability to compare an input signal against a reference voltage, producing a binary output that indicates whether the signal meets predefined criteria, such as crossing zero or falling within a range. A zero-crossing detector uses a comparator to convert an AC sine wave into a square wave by detecting points where the input signal crosses the zero-voltage . In this configuration, the comparator's inverting input is connected to ground (0 V), while the noninverting input receives the AC signal, often attenuated for protection; the output toggles high or low each time the input crosses zero, effectively marking phase transitions. This setup is particularly useful for phase detection in circuits, where the square wave output can drive counters or timers to measure timing relative to a . In null detection applications, such as measurements, a comparator serves as a sensitive indicator of deviations from balance by detecting the polarity of the differential null voltage (Vnull), which represents the imbalance between bridge arms. The output indicates the direction of the imbalance (high or low based on sign of Vnull), allowing adjustment or monitoring in precision resistance or systems. This configuration operates to discriminate polarities for balance correction. A window detector employs two comparators to determine if an input signal lies within a defined voltage band, providing an output only when the signal is between upper (Vhigh) and lower (Vlow) thresholds. The first comparator has the signal at its noninverting input and Vlow at the inverting input, outputting high if the signal exceeds Vlow; the second has Vhigh at its noninverting input and the signal at the inverting input, outputting high if the signal is below Vhigh; their outputs are logically ANDed to yield high when Vlow < Vin < Vhigh. This dual-threshold approach is essential for in-range detection in monitoring circuits, such as over/under-voltage . An absolute-value detector, functioning as a , uses a to sense the polarity of the input and control analog switches that route the or its inverted version (via an op-amp stage) to the output, ensuring only the positive magnitude is produced. The compares the input to ground, driving switches (e.g., FETs or transistors) to select the appropriate path: for positive inputs, the passes directly; for negative, it is inverted before switching. This circuit is valuable for AC where magnitude information is needed without phase , such as in power monitoring. Practical considerations in these detection circuits include implementing input filtering to mitigate and prevent false triggers from transient spikes or slow-rising edges. Low-pass filters, such as RC networks at the comparator inputs, attenuate high-frequency while preserving the signal's relevant transitions, reducing erroneous outputs in noisy environments. Additionally, incorporating , as discussed in comparator design features, enhances stability by creating distinct switching thresholds, further minimizing false detections from input fluctuations.

Conversion and Generation Circuits

Comparators play a key role in signal generation circuits, particularly in relaxation oscillators that produce square waves using an RC timing network. In such a circuit, the comparator's output drives the RC network, while a resistive divider provides to the non-inverting input, establishing upper and lower switching thresholds for . When the voltage exceeds the upper threshold during charging, the output switches low, reversing the capacitor's discharge through the toward the lower supply rail; it then switches high upon reaching the lower threshold, completing the cycle and generating a periodic square wave. This configuration ensures stable oscillations without requiring precise component matching, making it suitable for low-frequency applications like timing circuits. The oscillation period can be derived from the exponential charging and discharging dynamics of the . Consider a unipolar supply VCCV_{CC} with lower threshold Vlow=βVCCV_{low} = \beta V_{CC} and upper threshold Vhigh=(1−β)VCCV_{high} = (1 - \beta) V_{CC}, where 0<β<0.50 < \beta < 0.5. During charging from VlowV_{low} toward VCCV_{CC}, the voltage follows VC(t)=VCC−(VCC−Vlow)e−t/RCV_C(t) = V_{CC} - (V_{CC} - V_{low}) e^{-t / RC}; setting VC(tcharge)=VhighV_C(t_{charge}) = V_{high} yields tcharge=RCln⁡(VCC−VlowVCC−Vhigh)=RCln⁡(1−ββ)t_{charge} = RC \ln \left( \frac{V_{CC} - V_{low}}{V_{CC} - V_{high}} \right) = RC \ln \left( \frac{1 - \beta}{\beta} \right). Similarly, during discharging from VhighV_{high} toward ground (0 V), VC(t)=Vhighe−t/RCV_C(t) = V_{high} e^{-t / RC}, and setting VC(tdischarge)=VlowV_C(t_{discharge}) = V_{low} gives tdischarge=RCln⁡(VhighVlow)=RCln⁡(1−ββ)t_{discharge} = RC \ln \left( \frac{V_{high}}{V_{low}} \right) = RC \ln \left( \frac{1 - \beta}{\beta} \right). The total period is thus T=2RCln⁡(1−ββ)T = 2 RC \ln \left( \frac{1 - \beta}{\beta} \right), and the frequency is f=1T=12RCln⁡(1−ββ)f = \frac{1}{T} = \frac{1}{2 RC \ln \left( \frac{1 - \beta}{\beta} \right)}. For the typical symmetric case β=1/3\beta = 1/3, this simplifies to f≈0.72RCf \approx \frac{0.72}{RC}, as ln⁡(2)≈0.693\ln(2) \approx 0.693. In analog-to-digital conversion, comparators form the core of , enabling high-speed quantization of analog signals. A employs 2n−12^n - 1 comparators, each referencing a unique voltage tap from a resistive divider ladder spanning the input range, to simultaneously compare the input signal against these levels. The comparator outputs produce a thermometer code—a unary representation where outputs above the input level are high and below are low—indicating the quantization bin. This code is then converted to n-bit binary via an encoder, allowing rapid conversion rates up to gigasamples per second, though at the cost of exponential hardware growth with resolution; for instance, an 8-bit requires 255 comparators. Comparators also facilitate level shifting for interfacing disparate logic families, leveraging open-collector or open-drain outputs to adapt to different voltage domains without active translation. In a TTL-to- interface, for example, an open-collector comparator like the LM311 compares the TTL signal (typically 0-5 V) to a , pulling the output low when active; an external connected to the CMOS supply (e.g., 3.3 V or 15 V) ensures the high state matches the target , preventing damage and enabling seamless communication. This passive configuration supports mixed-voltage systems in and control applications. Schmitt trigger comparators, incorporating built-in , are widely applied in switch debouncing to suppress mechanical contact bounce, which can generate erroneous multiple transitions lasting 10-50 ms. The circuit typically includes the switch in series with an RC low-pass filter to the comparator input, where the width exceeds the noise amplitude from bounce, ensuring a single clean edge per actuation. For example, using a Schmitt-trigger inverter like the SN74LVC1G14 with a 10 kΩ and 0.1 μF sets a of about 1 ms, filtering transients while the (typically 0.5-1.5 V) stabilizes the output as a reliable square wave for digital inputs. The application of comparators evolved significantly in the early 1980s with the emergence of digital oscilloscopes, where they enabled precise triggering for stable waveform display. In models such as the HP 1980A (introduced in 1982), comparator-based trigger circuits detected signal edges against programmable levels, supporting rising/falling slopes and external sources to initiate sampling in real-time systems. This advancement facilitated the transition from analog to digital scopes, improving accuracy in capturing transient events for .

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