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Figure 1: Basic N-channel JFET common-source circuit (neglecting biasing details).
Figure 2: Basic N-channel JFET common-source circuit with source degeneration[clarification needed].

In electronics, a common-source amplifier is one of three basic single-stage field-effect transistor (FET) amplifier topologies, typically used as a voltage or transconductance amplifier. The easiest way to tell if a FET is common source, common drain, or common gate is to examine where the signal enters and leaves. The remaining terminal is what is known as "common". In this example, the signal enters the gate, and exits the drain. The only terminal remaining is the source. This is a common-source FET circuit. The analogous bipolar junction transistor circuit may be viewed as a transconductance amplifier or as a voltage amplifier. (See classification of amplifiers). As a transconductance amplifier, the input voltage is seen as modulating the current going to the load. As a voltage amplifier, input voltage modulates the current flowing through the FET, changing the voltage across the output resistance according to Ohm's law. However, the FET device's output resistance typically is not high enough for a reasonable transconductance amplifier (ideally infinite), nor low enough for a decent voltage amplifier (ideally zero). As seen below in the formula, the voltage gain depends on the load resistance, so it cannot be applied to drive low-resistance devices, such as a speaker (having a resistance of 8 ohms). Another major drawback is the amplifier's limited high-frequency response. Therefore, in practice the output often is routed through either a voltage follower (common-drain or CD stage), or a current follower (common-gate or CG stage), to obtain more favorable output and frequency characteristics. The CS–CG combination is called a cascode amplifier.


Characteristics

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At low frequencies and using a simplified hybrid-pi model (where the output resistance due to channel length modulation is not considered), the following closed-loop small-signal characteristics can be derived.

Definition Expression
Current gain
Voltage gain
Input impedance
Output impedance

Bandwidth

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Figure 3: Basic N-channel MOSFET common-source amplifier with active load ID.
Figure 4: Small-signal circuit for N-channel MOSFET common-source amplifier.
Figure 5: Small-signal circuit for N-channel MOSFET common-source amplifier using Miller's theorem to introduce Miller capacitance CM.

Bandwidth of common-source amplifier tends to be low, due to high capacitance resulting from the Miller effect. The gate-drain capacitance is effectively multiplied by the factor , thus increasing the total input capacitance and lowering the overall bandwidth.

Figure 3 shows a MOSFET common-source amplifier with an active load. Figure 4 shows the corresponding small-signal circuit when a load resistor RL is added at the output node and a Thévenin driver of applied voltage VA and series resistance RA is added at the input node. The limitation on bandwidth in this circuit stems from the coupling of parasitic transistor capacitance Cgd between gate and drain and the series resistance of the source RA. (There are other parasitic capacitances, but they are neglected here as they have only a secondary effect on bandwidth.)

Using Miller's theorem, the circuit of Figure 4 is transformed to that of Figure 5, which shows the Miller capacitance CM on the input side of the circuit. The size of CM is decided by equating the current in the input circuit of Figure 5 through the Miller capacitance, say iM, which is:

,

to the current drawn from the input by capacitor Cgd in Figure 4, namely jωCgd vGD. These two currents are the same, making the two circuits have the same input behavior, provided the Miller capacitance is given by:

.

Usually the frequency dependence of the gain vD / vG is unimportant for frequencies even somewhat above the corner frequency of the amplifier, which means a low-frequency hybrid-pi model is accurate for determining vD / vG. This evaluation is Miller's approximation[1] and provides the estimate (just set the capacitances to zero in Figure 5):

,

so the Miller capacitance is

.

The gain gm (rO || RL) is large for large RL, so even a small parasitic capacitance Cgd can become a large influence in the frequency response of the amplifier, and many circuit tricks are used to counteract this effect. One trick is to add a common-gate (current-follower) stage to make a cascode circuit. The current-follower stage presents a load to the common-source stage that is very small, namely the input resistance of the current follower (RL ≈ 1 / gmVov / (2ID) ; see common gate). Small RL reduces CM.[2] The article on the common-emitter amplifier discusses other solutions to this problem.

Returning to Figure 5, the gate voltage is related to the input signal by voltage division as:

.

The bandwidth (also called the 3 dB frequency) is the frequency where the signal drops to 1/ 2 of its low-frequency value. (In decibels, dB(2) = 3.01 dB). A reduction to 1/ 2 occurs when ωCM RA = 1, making the input signal at this value of ω (call this value ω3 dB, say) vG = VA / (1+j). The magnitude of (1+j) = 2. As a result, the 3 dB frequency f3 dB = ω3 dB / (2π) is:

.

If the parasitic gate-to-source capacitance Cgs is included in the analysis, it simply is parallel with CM, so

.

Notice that f3 dB becomes large if the source resistance RA is small, so the Miller amplification of the capacitance has little effect upon the bandwidth for small RA. This observation suggests another circuit trick to increase bandwidth: add a common-drain (voltage-follower) stage between the driver and the common-source stage so the Thévenin resistance of the combined driver plus voltage follower is less than the RA of the original driver.[3]

Examination of the output side of the circuit in Figure 2 enables the frequency dependence of the gain vD / vG to be found, providing a check that the low-frequency evaluation of the Miller capacitance is adequate for frequencies f even larger than f3 dB. (See article on pole splitting to see how the output side of the circuit is handled.)

See also

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References

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Revisions and contributorsEdit on WikipediaRead on Wikipedia
from Grokipedia
The common-source amplifier is a fundamental configuration in (FET) circuits, where the source terminal is grounded or serves as the common connection for both the input signal applied to the and the output signal taken from the drain, enabling voltage amplification of small AC signals superimposed on a while operating the FET in the saturation region. This setup inverts the phase of the output signal by 180 degrees relative to the input, providing a negative voltage gain typically greater than 1 in magnitude, such as -4.26 in example circuits. Key characteristics include a high , often in the range of several kiloohms to megohms due to the insulating structure of FETs, which minimizes loading on preceding stages, and a moderate determined by the drain and the FET's output resistance. The small-signal voltage gain is given by Av=gm(RDro)A_v = -g_m (R_D \parallel r_o), where gmg_m is the (e.g., gm=2Kn(VGSVt)g_m = 2 K_n (V_{GS} - V_t) for MOSFETs), RDR_D is the drain load , and ror_o is the FET's output resistance. is achieved using a DC supply VDDV_{DD} and gate-source voltage VGSV_{GS} to set the quiescent point (Q-point) midway in the saturation region for linear operation, ensuring the drain current IDI_D remains stable against variations. This configuration offers advantages such as simplicity in design, suitability for integrated circuits due to efficient usage over resistors, and effective linear amplification for applications like audio and RF . Compared to other FET amplifiers like common-drain (source follower) or common-gate, the common-source provides the highest voltage gain but with the phase inversion, making it ideal for stages requiring signal boosting without buffering. In practice, capacitors are employed to isolate AC signals from , focusing operation in the mid-band frequency range for optimal performance.

Circuit Configuration

Basic Topology

The common source amplifier is a fundamental configuration of a ( in which the source terminal serves as the common connection for both input and output signals. This topology is typically implemented using metal-oxide-semiconductor s (MOSFETs) or junction field-effect transistors (JFETs), providing high due to the insulated or reverse-biased . In the standard , the input signal is applied to the terminal, the output is extracted from the drain terminal, and the source is grounded or connected to a common reference point. A drain RDR_D connects the drain to the positive supply voltage VDDV_{DD}, setting the DC load and enabling signal amplification, while a source RSR_S (frequently bypassed by a CSC_S for AC ) may link the source to ground for stability. components, such as a RGR_G to ground or a voltage source, ensure the operates in its ; input and output CinC_{in} and CoutC_{out} isolate DC while transmitting AC signals. The FET can be n-channel or p-channel, with connections adjusted accordingly for enhancement-mode MOSFETs or depletion-mode JFETs. The common-source configuration for FETs is analogous to the common-emitter amplifier for bipolar junction transistors. It evolved with the development of FETs, including the practical demonstrated in 1953 by Dacey and Ross, and the invented in 1959 by Atalla and Kahng. Proper arrangements are crucial to establish the quiescent for reliable amplification.

Biasing Arrangements

Biasing in a common source amplifier serves to establish a stable DC operating point by setting the gate-source voltage VGSV_{GS} and drain-source voltage VDSV_{DS} such that the MOSFET operates in the saturation (active) region, ensuring linear amplification while avoiding cutoff or triode regions. This quiescent bias point is critical for consistent performance across temperature and device variations. One common method is , where two high-value resistors RG1R_{G1} and RG2R_{G2} form a divider from the supply VDDV_{DD} to ground, setting a fixed gate voltage VG=VDDRG2RG1+RG2V_G = V_{DD} \cdot \frac{R_{G2}}{R_{G1} + R_{G2}}. With the source grounded, VGS=VGV_{GS} = V_G, and the drain current IDI_D follows from the MOSFET's transfer characteristic, typically ID12μnCoxWL(VGSVth)2(1+λVDS)I_D \approx \frac{1}{2} \mu_n C_{ox} \frac{W}{L} (V_{GS} - V_{th})^2 (1 + \lambda V_{DS}). Additionally, ID=VDDVDSRDI_D = \frac{V_{DD} - V_{DS}}{R_D}, where RDR_D is the drain . This approach offers good and supply stability due to the fixed VGV_G, but it requires more components and can lead to variations in VGSV_{GS} if resistor values are not precisely matched to the device. Self-bias employs an unbypassed source resistor RSR_S to provide negative feedback for enhanced stability. Here, VS=IDRSV_S = I_D R_S, so VGS=VGVS=VGIDRSV_{GS} = V_G - V_S = V_G - I_D R_S, with VGV_G often zero for simplicity or set by a gate divider. The drain current is given by ID=VDDVDSRDI_D = \frac{V_{DD} - V_{DS}}{R_D}. The RSR_S prevents thermal runaway by raising VSV_S as IDI_D increases with temperature, thereby reducing VGSV_{GS} and limiting current growth. This method is simpler and uses fewer components than voltage divider bias, promoting single-supply operation, but the unbypassed RSR_S introduces degeneration that lowers the small-signal gain. Drain-feedback bias connects a from drain to , establishing the through loop feedback. Applying Kirchhoff's voltage law yields VDD=IDRD+VGSV_{DD} = I_D R_D + V_{GS}, solving for IDI_D based on the device curve. This configuration achieves thermal stability via the feedback mechanism, similar to self-bias, and minimizes component count for compact designs. However, it provides less direct control over the exact VGSV_{GS} compared to methods, potentially complicating precise point selection.

Operating Principles

Small-Signal Analysis

Small-signal analysis of the common source amplifier employs a linearized model to evaluate the circuit's response to small AC perturbations around the DC bias point, assuming the transistor operates in its saturation region. This approach facilitates the prediction of amplification characteristics without considering nonlinear effects. The point, established through appropriate DC biasing arrangements, serves as the reference for these linear approximations. The hybrid-π model is the standard small-signal equivalent circuit for the MOSFET in this configuration. It represents the device with a voltage-controlled current source characterized by the transconductance parameter gm=IDVGSQg_m = \frac{\partial I_D}{\partial V_{GS}} \big|_{Q}
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