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Bi-quinary coded decimal
Bi-quinary coded decimal
Bi-quinary coded decimal
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Biquinary code example[1]
Reflected biquinary code
Japanese abacus. The right side represents 1,234,567,890 in bi-quinary: each column is one digit, with the lower beads representing "ones" and the upper beads "fives".

Bi-quinary coded decimal is a numeral encoding scheme used in many abacuses and in some early computers, notably the Colossus.[2] The term bi-quinary indicates that the code comprises both a two-state (bi) and a five-state (quinary) component. The encoding resembles that used by many abacuses, with four beads indicating the five values either from 0 through 4 or from 5 through 9 and another bead indicating which of those ranges (which can alternatively be thought of as +5).

Several human languages, most notably Fula and Wolof also use biquinary systems. For example, the Fula word for 6, jowi e go'o, literally means five [plus] one. Roman numerals use a symbolic, rather than positional, bi-quinary base, even though Latin is completely decimal.

The Korean finger counting system Chisanbop uses a bi-quinary system, where each finger represents a one and a thumb represents a five, allowing one to count from 0 to 99 with two hands.

One advantage of one bi-quinary encoding scheme on digital computers is that it must have two bits set (one in the binary field and one in the quinary field), providing a built-in checksum to verify if the number is valid or not. (Stuck bits happened frequently with computers using mechanical relays.)

Examples

[edit]

Several different representations of bi-quinary coded decimal have been used by different machines. The two-state component is encoded as one or two bits, and the five-state component is encoded using three to five bits. Some examples are:

IBM 650

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The IBM 650 uses seven bits: two bi bits (0 and 5) and five quinary bits (0, 1, 2, 3, 4), with error checking.

Exactly one bi bit and one quinary bit is set in a valid digit. The bi-quinary encoding of the internal workings of the machine are evident in the arrangement of its lights – the bi bits form the top of a T for each digit, and the quinary bits form the vertical stem.

Value 05-01234 bits[1]
IBM 650 front panel while running, with active bits just discernible
Close-up of IBM 650 indicators while running, with active bits visible
0 10-10000
1 10-01000
2 10-00100
3 10-00010
4 10-00001
5 01-10000
6 01-01000
7 01-00100
8 01-00010
9 01-00001

Remington Rand 409

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The Remington Rand 409 has five bits: one quinary bit (tube) for each of 1, 3, 5, and 7 - only one of these would be on at the time. The fifth bi bit represented 9 if none of the others were on; otherwise it added 1 to the value represented by the other quinary bit. The machine was sold in the two models UNIVAC 60 and UNIVAC 120.

Value 1357-9 bits
0 0000-0
1 1000-0
2 1000-1
3 0100-0
4 0100-1
5 0010-0
6 0010-1
7 0001-0
8 0001-1
9 0000-1

UNIVAC Solid State

[edit]

The UNIVAC Solid State uses four bits: one bi bit (5), three binary coded quinary bits (4 2 1)[4][5][6][7][8][9] and one parity check bit

Value p-5-421 bits
0 1-0-000
1 0-0-001
2 0-0-010
3 1-0-011
4 0-0-100
5 0-1-000
6 1-1-001
7 1-1-010
8 0-1-011
9 1-1-100

UNIVAC LARC

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The UNIVAC LARC has four bits:[9] one bi bit (5), three Johnson counter-coded quinary bits and one parity check bit.

Value p-5-qqq bits
0 1-0-000
1 0-0-001
2 1-0-011
3 0-0-111
4 1-0-110
5 0-1-000
6 1-1-001
7 0-1-011
8 1-1-111
9 0-1-110

See also

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References

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Further reading

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Revisions and contributorsEdit on WikipediaRead on Wikipedia

Bi-quinary coded decimal

View on Grokipedia
from Grokipedia
Bi-quinary coded decimal (BQCD) is a seven-bit numeral encoding scheme for representing digits from 0 to 9, combining a two-bit "bi" section to indicate the presence or absence of a value of 5 (with exactly one bit set) and a five-bit "" section to encode the units value from 0 to 4 (also with exactly one bit set), enabling built-in error detection through parity-like on bit activation. This structure ensures that invalid digit representations—such as multiple or zero bits set in either section—can be flagged, enhancing reliability in mechanical and electronic systems. The scheme draws its name from "bi" (binary, for the 0/5 distinction) and "quinary" (base-5, for the remainder), mirroring the physical layout of traditional abacuses where beads in upper rows represent multiples of 5 and lower rows handle 1 through 4. Originating in electromechanical computing, BQCD was employed in relay-based calculators developed at in the 1930s and 1940s, where it facilitated unattended operation by halting on representation errors to prevent faulty arithmetic. It appeared in wartime machines like the British Colossus code-breaking computer (1943–1945), which used it for decimal handling in its specialized cryptographic tasks. In commercial computing, BQCD found prominent use in the (1954), IBM's first mass-produced computer, where it encoded both data and addresses on its magnetic drum memory, requiring seven bits per digit compared to four for standard (BCD). This choice stemmed from the era's emphasis on decimal arithmetic for business applications like and , where BQCD's error-checking reduced hardware failures in vacuum-tube circuits, though it consumed more storage than BCD. Later systems, such as the Solid State and LARC, adopted variants, but BQCD largely faded with the shift to binary architectures in the , surviving primarily in historical and restoration contexts today.

Overview

Definition

Bi-quinary coded decimal is a numeral encoding scheme that represents each digit from 0 to 9 by integrating binary (two-state) and (five-state) components, allowing for efficient arithmetic in digital systems. This hybrid approach encodes digits as the sum of a binary-weighted "five" component (either 0 or 5) and a quinary-weighted "unit" component (0 through 4), mimicking the structure of traditional counting methods while adapting them to binary hardware. The term "bi-quinary" originates from the Latin prefix "bi-" denoting the two possible states for the five's value and "" referring to the base-five representation of the units, highlighting the code's dual foundational elements. This underscores its conceptual roots in balanced numeral systems that prioritize human-readable output over pure binary efficiency. Inspired by physical devices like the , bi-quinary coding replicates the positioning of beads: lower beads track units in groups of five (0-4), while upper beads indicate multiples of five (0 or 5), enabling intuitive counting that translates directly to electronic bit patterns. In implementation, each digit occupies a fixed number of bits—typically 5 to 7 bits across variants—with specific bits allocated to the binary five's indicator and the quinary units selector, facilitating error detection and validation without full binary conversion.

Encoding Scheme

Bi-quinary coded decimal (BQCD) employs a 7-bit encoding scheme in its classic variant, utilizing two binary ("bi") bits to indicate the major group (0-4 or 5-9) and five bits to specify the offset within that group (0 through 4). The bi bits function in a manner: one bit, often labeled as the "0" indicator, is set for digits 0-4, while the other, labeled as the "5" indicator, is set for digits 5-9. The bits, also , select exactly one of the five positions corresponding to values 0-4. This results in precisely two bits being set per digit: one from the bi pair and one from the set. The bit assignments follow a straightforward pattern. For a digit dd where 0≤d≤40 \leq d \leq 4, the "0" bi-bit is asserted along with the quinary bit corresponding to dd (e.g., for d=3d = 3, the "0" bi-bit and the third bit are set). For dd where 5≤d≤95 \leq d \leq 9, the "5" bi-bit is asserted along with the quinary bit corresponding to d−5d - 5 (e.g., for d=8d = 8, the "5" bi-bit and the third bit are set). The following table illustrates the standard 7-bit patterns, assuming bit positions ordered as 5 (MSB), 0, 4, 3, 2, 1, 0 (LSB):
DigitBinary Representation (5 0 4 3 2 1 0)
00 1 0 0 0 0 1
10 1 0 0 0 1 0
20 1 0 0 1 0 0
30 1 0 1 0 0 0
40 1 1 0 0 0 0
51 0 0 0 0 0 1
61 0 0 0 0 1 0
71 0 0 0 1 0 0
81 0 0 1 0 0 0
91 0 1 0 0 0 0
This structure incorporates a built-in for error detection, as the encoding mandates exactly two set bits per digit. Validation involves verifying that the (number of 1s across all seven bits) equals 2; any deviation—such as zero, one, or more than two set bits—indicates an invalid digit, detectable via simple parity checks or bit-counting logic. Mathematically, for a 7-bit vector b=(b5,b0,b4,b3,b2,b1,bq0)\mathbf{b} = (b_5, b_0, b_4, b_3, b_2, b_1, b_{q0}), validity requires: ∑bi=2\sum b_i = 2 ensuring one bi and one quinary bit are active. Variations exist in bit count for different implementations, trading redundancy for efficiency. Some systems omit the by using a minimal 5-bit encoding (two bi bits and three quinary bits, covering only necessary combinations without full one-hot quinary), eliminating error detection. Minimal variants use 4 or 5 bits (e.g., 1-2 bits for bi and 3 bits for binary-encoded 0-4), forgoing the one-hot for efficiency, though lacking built-in error detection.

Historical Development

Origins in Abacuses

The bi-quinary coded decimal system finds its primary conceptual roots in the Japanese abacus, a calculating tool that employs a structure directly analogous to bi-quinary logic for representing digits. In the , each vertical rod or column features one upper valued at 5 and four lower s each valued at 1, allowing users to form any digit from 0 to 9 by combining these elements—such as the upper alone for 5 or the upper plus one lower for 6. This configuration simulates a system through a bi-quinary (base-5 and base-2) approach, where the upper handles multiples of 5 and the lower s manage the remainder in binary-like increments. The , derived from the Chinese suanpan and imported to in the mid-15th century, became widely standardized and prevalent among merchants and educators by the , facilitating efficient arithmetic operations without beyond the rod's place value. Similar bi-quinary patterns appear in other traditional counting practices, underscoring the system's intuitive appeal across cultures for decimal computation. In Korean chisanbop, a method developed in the mid-20th century but rooted in abacus-like principles, the thumb of each hand represents 5 while the four fingers represent 1 each, enabling rapid tallying up to 99 by combining hand positions—mirroring the soroban's bead arrangement for units and tens. Likewise, the Roman numeral system exhibits proto-bi-quinary characteristics, with the symbol denoting 5 and repetitions of I for 1s used to build numbers up to 4 before transitioning to the next multiple of 5, as seen in notations like IIII for 4 or VI for 6; this non-positional encoding influenced early European counting boards and abacuses. These examples highlight how bi-quinary logic leveraged human cognition for grouping in fives and ones, promoting error-resistant arithmetic in pre-digital eras. The 's bi-quinary framework extended its influence into mechanical calculators during the 19th and early 20th centuries, where designers drew on principles for reliable handling in gear-based devices, though explicit bi-quinary encoding emerged more prominently later. By the , this transitioned to early electromechanical computers, such as the relay machines, which adopted abacus-inspired bi-quinary coding—using groups of relays weighted like soroban beads (fives and ones)—to represent digits efficiently in vacuum-tube and relay circuits, ensuring compatibility with human arithmetic while minimizing errors in electronic switching. This adoption bridged traditional tools to digital systems, laying groundwork for bi-quinary's role in mid-20th-century .

Adoption in Early Computers

The first electromechanical implementations of bi-quinary coded decimal appeared in the 1940s within relay-based computing machines, with electronic adoption following in systems like the Colossus, marking a transition from mechanical abacus-inspired methods to digital processing. Notable among these was the Colossus, developed between 1943 and 1945 by British engineer for wartime code-breaking at , which incorporated bi-quinary representation to handle decimal data streams efficiently in its cryptanalytic operations. Similarly, Bell Laboratories' relay computers, such as Models II through VI (completed from 1943 to 1949), employed bi-quinary encoding using seven relays per decimal digit for reliable arithmetic in applications like ballistic calculations and error detection. These early adoptions drew inspiration from the bi-quinary structure of traditional abacuses, adapting it to electromechanical s for practical decimal . By the 1950s, bi-quinary coding gained widespread use in vacuum-tube computers, particularly for commercial where decimal accuracy was paramount. The , introduced in 1953 as one of the first mass-produced business computers, utilized bi-quinary representation internally to align with decimal-based punched-card systems, facilitating seamless integration with existing tabulating equipment in industries like and inventory management. This era's adoption stemmed from the need for compatibility with decimal-oriented business applications, which dominated corporate workflows, and the relative simplicity of bi-quinary arithmetic in vacuum-tube circuitry compared to full binary operations that required frequent decimal-binary conversions. The influence of these 1940s designs extended to post-war commercial machines, where bi-quinary's error-checking properties—built into its two-out-of-five or tube configuration—supported unattended operation in early data centers. However, by the , bi-quinary began to phase out as pure binary architectures and more compact (BCD) schemes dominated, driven by efficiency improvements in integrated circuits that favored binary's denser storage and faster processing over decimal variants. The shift was evident in systems like the (1964), which abandoned bi-quinary for binary compatibility across scientific and business tasks, rendering the older encoding obsolete in mainstream computing.

Implementations

IBM 650

The , introduced in 1954, was a pioneering commercial computer that employed bi-quinary coded decimal for representing all decimal digits throughout its magnetic and arithmetic units, enabling efficient decimal arithmetic tailored to applications. This encoding scheme utilized seven bits per digit: two "bi" bits to indicate either 0 or 5, and five "quinary" bits to represent 0 through 4, with exactly one bit set in each group to form digits 0-9 by (e.g., digit 0 as bi-0 + quinary-0, digit 9 as bi-5 + quinary-4). The system's words consisted of 10 such digits plus a separate , allowing representation of signed 10-digit numbers or five alphabetic characters (each encoded as two digits), while memory addresses were also decimal for direct compatibility with punched-card data formats. Hardware implementation in the leveraged vacuum-tube logic specifically optimized for bi-quinary operations, including serial addition and subtraction circuits that processed digits from least to most significant. The magnetic , with capacities ranging from 10,000 to 40,000 digits depending on configuration, stored data and instructions in bi-quinary format and was addressed decimally, facilitating straightforward indexing without binary conversion. On the operator panel, bi-quinary encoding was directly visible through indicator lights—two for the bi bits and five for the quinary bits per digit—allowing diagnostics of individual digit states and validity to detect errors like multiple or missing bit activations during transmission. This self-checking feature, inherent to the two-out-of-seven code, enhanced reliability in the vacuum-tube environment by halting operations on detected anomalies. The choice of bi-quinary in the IBM 650 stemmed from its alignment with IBM's established punched-card systems, such as 80-column cards used in tabulating machines, ensuring seamless decimal data handling without the need for extensive recoding in business environments. Over 2,000 units were sold by 1962, making it the most successful computer of its era and solidifying bi-quinary's role in early commercial computing. In arithmetic operations, the addition circuit exploited bi-quinary structure for carry detection; for instance, adding 4 (bi-0 + quinary-4) and 1 (bi-0 + quinary-1) sums the quinary parts to 5, triggering a carry to the bi section (resetting quinary to 0 and flipping bi from 0 to 5), yielding 5 (bi-5 + quinary-0) without complex binary-like ripple effects.

Remington Rand 409

The 409, designed in 1949, was an early that employed bi-quinary coded decimal for its internal representation. Introduced commercially in 1952 as the 60 and later the UNIVAC 120, it served business and scientific needs, such as and engineering calculations. Unlike fully redundant bi-quinary schemes, the 409 used a streamlined 5-bit encoding in its storage, consisting of 6 words with 10 decimal digits plus sign each for the UNIVAC 60 model (doubled for the 120), to balance efficiency and reliability in transitional hardware. The encoding scheme featured four quinary bits dedicated to the odd digits 1, 3, 5, and 7—one bit active per digit—and a fifth bi-bit activated specifically for the digit 9. Even digits (0, 2, 4, 6, 8) were represented with all quinary bits off, enabling simplified relay-based arithmetic where operations like and exploited the absence of signals to handle carries and borrows efficiently. This approach reduced complexity in the arithmetic unit, which operated synchronously, including time for card I/O and calculations. Hardware implementation centered on memory for the bi-quinary digits, with each digit column using five tubes to light one (or none) based on the value. Electromechanical relays managed via readers and punches at 150 cards per minute, ensuring seamless integration with existing business data formats. The design emphasized modularity, with accumulators holding up to 22 digits, and supported three-address instructions for sequential operations. Error checking relied on partial checksums inherent to the encoding, where the limited number of set bits per digit (at most one quinary or the bi-bit) allowed detection of anomalies, using fewer bits overall than the IBM 650's 7-bit bi-quinary variant with dedicated check bits. This facilitated basic self-verification in computations without additional parity hardware.

UNIVAC Systems

The UNIVAC Solid State computer, introduced in the late 1950s, employed a compact 4-bit bi-quinary coded decimal scheme for each digit, consisting of one bi-bit to indicate values of 5 or 0, three quinary bits weighted 4-2-1, and an additional odd parity bit for error detection during data transmission. This configuration allowed representation of decimal digits 0-9 with built-in parity checking, where the processor verified an odd number of "ones" across the five bits per digit to ensure integrity. The encoding was integrated into an 11-digit word format, comprising 10 decimal digits plus a sign bit, stored in magnetic drum memory for efficient decimal arithmetic in scientific and data processing tasks. Building on this approach, the LARC (Livermore Advanced Research Computer), delivered in , utilized a similar 5-bit bi- per digit, featuring one bi-bit for the binary component and three quinary bits encoded via a Johnson counter to support 15 valid combinations (including digits 0-9, plus, minus, space, period, and ignore). The fifth bit served as a parity check, enforcing odd parity except in specific cases like the ignore symbol, to maintain reliability in high-speed operations. Designed specifically for advanced scientific computing at , the LARC incorporated this scheme into 12-digit word formats for , supporting single-precision formats with a sign, base-10 exponent, and 10-digit mantissa, or double-precision across two words with 20 digits. Both systems leveraged transistor-based solid-state logic to achieve faster processing speeds compared to earlier vacuum-tube designs, enabling reliable execution of complex decimal operations without the bulk of electromechanical components. In the LARC, this hardware facilitated addition operations in approximately 4 microseconds, contributing to its status as one of the era's fastest computers with performance up to around 0.25 MIPS for decimal tasks. The choice of bi-quinary encoding was particularly suited to nuclear simulations at Livermore, where precise minimized errors in hydrodynamic and weapons-related computations. A key efficiency in these UNIVAC designs was the reduction to 4 data bits per digit (plus parity), compared to the standard 7-bit bi-quinary scheme, which optimized storage and logic circuitry in the emerging solid-state era while preserving decimal accuracy.

Advantages and Limitations

Benefits

Bi-quinary coded decimal provides inherent error detection through its encoding structure, where each decimal digit is represented by exactly two set bits—one in a 2-bit binary field (indicating 0 or 5) and one in a 5-bit quinary field (indicating 0-4)—out of seven total bits, allowing simple validation without additional circuitry. This self-checking property detects all single errors and adjacent transpositions with 100% reliability, as well as a significant portion of twin and jump errors, making it particularly effective for ensuring data integrity during internal transmission in early computing systems. In machines like the IBM 650, this mechanism enabled straightforward relay or vacuum-tube validation, reducing the need for complex parity checks and minimizing undetected errors in digit processing. The scheme's natural alignment with decimal arithmetic offered strong compatibility for business and commercial applications, where human-readable decimal data predominated, thereby avoiding the conversion errors common when using pure binary representations. By directly mapping to base-10 operations without intermediate binary translations, bi-quinary facilitated accurate handling of financial and computations, preserving the precision required for such tasks in the absence of modern floating-point standards. Hardware implementation benefited from the code's simplicity, which echoed the bi-quinary logic of traditional abacuses—using beads weighted in groups of 1 and 5—easing the transition from mechanical to electronic designs by requiring fewer for and digit manipulation compared to denser binary schemes. This approach lent itself to relatively straightforward technical realization in vacuum-tube circuits, where resource constraints favored encodings that minimized wiring complexity and gate delays. In the unreliable environment of vacuum-tube computers, bi-quinary's redundancy enhanced overall system reliability by providing built-in checks that detected faults early, thereby reducing downtime and maintenance needs in noisy electrical conditions prone to tube failures. Additionally, its structure supported visual diagnostics on operator panels, as seen in the , where indicator lights directly displayed the bi-quinary states—two illuminated lamps per digit clearly signaling valid values and aiding troubleshooting without specialized tools.

Drawbacks

One significant limitation of bi-quinary coded decimal is its inefficiency in storage and bandwidth usage, requiring 7 bits to represent each decimal digit compared to 4 bits in standard (BCD) or approximately 3.32 bits on average for pure binary representation. This overhead became increasingly problematic in scaling systems during the late and , where and transmission costs were critical constraints. The quinary component's one-hot encoding also introduces complexity in arithmetic operations, as it demands specialized logic for , , and division that is harder to optimize than binary or even standard BCD circuits. For instance, early implementations like the Bell Telephone Computing Machine required additional table-based mechanisms for operations, resulting in slower performance—such as multiplication taking up to one second—compared to binary alternatives. By the , bi-quinary proved unsuitable for the emerging era of integrated circuits, which favored binary logic due to simpler, more reusable gate designs and lower counts. Its reliance on custom hardware for the mixed binary-quinary structure limited scalability and compatibility, as transistors became inexpensive and reliable enough to eliminate the need for bi-quinary's era-specific optimizations. In comparison, BCD provided comparable decimal accuracy and human-readable benefits with significantly less overhead, accelerating bi-quinary's replacement; by 1970, systems like IBM's System/360 had fully adopted BCD for decimal operations, rendering bi-quinary obsolete in mainstream computing.

References

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  32. https://bitsavers.trailing-edge.com/pdf/ibm/360/princOps/A22-6821-0_360PrincOps.pdf
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