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RP2040 microcontroller
RP2040 die shot
A PhobGCC, an open-source motherboard replacement for the GameCube controller designed for competitive Super Smash Bros. Melee, powered by the RP2040

RP2040 is a 32-bit dual-core ARM Cortex-M0+ microcontroller designed by Raspberry Pi Ltd. In January 2021, it was released as part of the Raspberry Pi Pico board.[1] Its successor is the RP2350 series.[2]

Overview

[edit]

Announced on 21 January 2021, the RP2040 is the first microcontroller designed by Raspberry Pi Ltd.[1][3] The microcontroller is low cost, with the Raspberry Pi Pico being introduced at US$4 and the RP2040 itself costing US$1. The microcontroller can be programmed in assembly, C, C++, Forth,[4] Swift,[5] Free Pascal, Rust,[6] Go,[7] MicroPython, CircuitPython,[1][8] PicoRuby,[9] Ada,[10] TypeScript[11] and Zig.[12] It is powerful enough to run TensorFlow Lite.[1]

At announcement time, four other manufacturers (Adafruit, Pimoroni, Arduino, SparkFun) were at advanced stages of their product design, awaiting the widespread availability of chips to be put into production.[13]

Hackaday notes the benefits of the RP2040 as being from Raspberry Pi, having a good feature set, and being released in low-cost packages.[14]

Multiple stepping levels of the chip have been produced.[15]

Features

[edit]

The RP2040 chip is a 7-by-7-millimetre (0.28 in × 0.28 in) QFN-56EP surface-mount device (SMD) package manufactured by TSMC using its 40 nm process.[16]

  • Key features:[17]
    • Dual ARM Cortex-M0+ cores (ARMv6-M instruction set), Originally run at 133 MHz,[2] but later certified at 200 MHz[18]
      • Each core has an integer divider peripheral and two interpolators
    • 264 KB SRAM in six independent banks (four 64 KB, two 4 KB)
    • No internal flash or EEPROM memory (after reset, the boot-loader loads firmware from either external flash memory or USB into internal SRAM)
    • QSPI bus controller supports up to 16 MB of external flash memory
    • DMA controller, 12 channel, 2 IRQ
    • AHB crossbar, fully-connected
    • On-chip programmable low-dropout regulator (LDO) to generate core voltage
    • Two on-chip PLLs to generate USB and core clocks
    • 30 GPIO pins, of which four can optionally be used as analog inputs
  • Peripherals:
    • One USB 1.1 (LS & FS) controller and PHY, host and device support, 1.5 Mbit/s (Low Speed) and 12 Mbit/s (Full Speed)
    • Two UART controllers
    • Two SPI controllers
    • One QSPI (quad SPI) controller (SSI), supports 1 / 2 / 4-bit SPI transfers, 1 chip select
    • Two I²C controllers
    • Eight PIO (programmable input–output) state machines
    • 16 PWM channels
    • 4-channel 12-bit 500-ksps SAR ADC, extra channel is connected to internal temperature sensor

For comparison with the RP2350, see RP2350 § Family comparison.

Boards

[edit]

A number of manufacturers have announced their own boards using the RP2040. A selection of the growing number is here:

Board name Manufacturer Size (mm) Header pins Debug connection Number of pads USB connector Other connectors Flash size GPIO pins ADC pins Buttons Other features Image
Pico[19] Raspberry Pi Ltd 51×21 40+3 via headers 6 micro-USB 2 MB 26 3 BOOTSEL
Pico W[20] Raspberry Pi Ltd 51×21 40+3 via headers 6 micro-USB 2 MB 26 3 BOOTSEL Wi-Fi, Bluetooth
XIAO RP2040[21] Seeed Studio 20×17.5×3.5 14 Reset Button/ Boot Button USB Type-C interface 2 MB BOOTSEL + RESET
Nano RP2040 Connect[22] Arduino 45×18 30 via pads 5+4+2 micro-USB 16 MB 1 Wi-Fi, Bluetooth, 9-axis IMU, microphone
Tiny 2040[23] Pimoroni 22.9×18.2×6 8+3 via headers USB-C 8 MB 12 4 BOOTSEL + RESET
Keybow 2040[24] Pimoroni 76x76x30 0 (USB only) USB-C 2 MB 16 keys
PicoSystem[25] Pimoroni 96.6×42.7×15.5 0 (self contained) USB-C 16 MB 4 + joypad Color 240×240 LCD, onboard battery
Feather RP2040[26] Adafruit 51×23×7 28 via pins USB-C STEMMA QT, lipo battery 8 MB 21 4 BOOTSEL + RESET Battery charger
ItsyBitsy RP2040[27] Adafruit 36×18×4 33 via headers micro-USB 4 MB 23 4 BOOTSEL + RESET
Metro RP2040[28] Adafruit 71x53×13 32 SWD + 3 pin JST SH compatible USB Type-C DC jack for 6-12VDC / STEMMA QT / SWD / pico probe 16 MB 24 4 BOOTSEL + RESET NeoPixel LED, Micro SD
QT Py RP2040[29] Adafruit 22×18×6 14 Reset Button/ Boot Button USB-C STEMMA QT 8 MB 13 4 BOOTSEL + RESET 3.3vdc regulator, NeoPixel LED
Pro Micro – RP2040[30] Sparkfun 36×18 24 4+2 USB-C QWIIC 16 MB 20 4 BOOTSEL + RESET
Thing Plus RP2040[31] Sparkfun 59×23 28 JTAG pins USB-C QWIIC, lipo battery 16 MB 18 4 BOOTSEL + RESET Battery charger
MicroMod RP2040[32] Sparkfun 22×22 0 edge connector edge connector 16 MB 29 3 none
Müsli USB Pmod[33] Lone Dynamics 45×20.32 12 SWD USB Type-A female 12-pin male PMOD, SWD 256 KB 8 0 BOOTSEL USB host, 5V boost converter
Werkzeug USB Multi-Tool[34] Lone Dynamics 50×50 32 USB-C 12-pin female PMOD, USB Type-A female 1 MB 24 4 BOOTSEL USB device/host, PMOD
RP2040[35] WeAct Studio 53x21.52 40+4 via headers USB-C 2 MB,
4 MB,
8 MB,
16 MB 		26 4 BOOTSEL + RESET
RP2040-Zero[36] Waveshare Electronics 23×18 23 USB-C 10-pad connector 2 MB 29 4 BOOTSEL + RESET RGB LED (WS2812)
Pico2040 zeankun.dev 51x18 40+3 (2mm and 2.54mm variants are available) SWD 4 micro-USB 16 MB,
32 MB,
64 MB,
128 MB 		28 4 BOOTSEL + RESET
Bus Pirate 5 Where Labs, LLC 60x37 10+9 SWD USB-C 16MB
W5100S-EVB-Pico[37] WIZnet Co., Ltd. 75x21 40+3 via headers Micro-USB RJ45 2 MB 26 3 BOOTSEL + RESET Ethernet WIZnet W5100S-EVB-Pico
W5500-EVB-Pico[38] WIZnet Co., Ltd. 75x21 40+3 via headers Micro-USB RJ45 2 MB 26 3 BOOTSEL + RESET Ethernet W5500-EVB-Pico
W6100-EVB-Pico[39] WIZnet Co., Ltd. 75x21 40+3 via headers Micro-USB RJ45 2 MB 26 3 BOOTSEL + RESET Ethernet W6100-EVB-Pico
WizFi360-EVB-Pico[40] WIZnet Co., Ltd. 75×21 40+3 via headers Micro-USB 2 MB 26 3 BOOTSEL + RESET Wi-Fi WizFi360-EVB-Pico
0xCB-Helios[41] 0xCB 36×18 40+3 via headers USB-C 16 MB 29 BOOTSEL + RESET default off red power LED, blue user LED, level shifter to drive 5V components. ESD protection chip onboard
Picopad[42] Pájeníčko s.r.o. 129x53 12 via headers micro-USB microSD, external connector 2 MB 6 BOOTSEL + RESET on-off, Wi-Fi, micro SD card, external connector, IPS screen, speaker, battery
MUREX ANYESC[43] MUREX Robotics 78×35 3 via headers USB-C edge connector 8 MB 3 0 BOOTSEL + RESET commercial ESC connector, 3 user LEDs
RP2040-PICO30[44] OLIMEX Ltd 51×21 40+3 via headers USB-C Optional UEXT (pUEXT) 2 MB 30 4 BOOTSEL + RESET 3.3V 2A (3A peak) DCDC, All 30 GPIOs available to the user, Optional status LED
RP2040-PICO30-16[44] OLIMEX Ltd 51×21 40+3 via headers USB-C Optional UEXT (pUEXT) 16 MB 30 4 BOOTSEL + RESET
PicoUSB[45] VoltMake[46] 45×12x4 0 (USB only) Dual sided USB-A 2 MB BOOTSEL + MODE status LED PicoUSB

See also

[edit]
  • Arduino – a popular microcontroller board family
  • ESP32 – a series of low-cost, low-power system on a chip microcontrollers with integrated Wi-Fi and dual-mode Bluetooth.
  • STM32 – a family of 32-bit microcontroller integrated circuits
  • Raspberry Pi – Raspberry Pi's series of small single board computers
  • Thumby (console) – a thumb-sized micro-console powered by the RP2040

References

[edit]
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RP2040

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The RP2040 is a 32-bit dual-core Arm Cortex-M0+ microcontroller designed and manufactured by Raspberry Pi Limited in the United Kingdom.[1] It features 264 KB of on-chip SRAM, a flexible system clock running up to 133 MHz, and support for up to 16 MB of external QSPI flash memory with execute-in-place (XIP) capability.[2] A standout element is its Programmable I/O (PIO) subsystem, comprising two blocks with eight state machines total, enabling custom digital protocols and hardware interfaces without burdening the CPU cores.[1] Released on January 21, 2021, as the heart of the low-cost Raspberry Pi Pico microcontroller board, the RP2040 became available as a standalone chip in June 2021, priced at $1 in volume.[3][4] The RP2040's architecture emphasizes efficiency and versatility for embedded systems, with each Cortex-M0+ core supporting the ARMv6-M instruction set and including features like single-cycle I/O access, hardware multipliers, and nested vectored interrupts.[1] Memory management is handled via a multi-bank SRAM configuration (four 64 KB banks and two 4 KB banks) and an optional 16 KB instruction cache that doubles as additional SRAM when XIP is disabled, yielding up to 284 KB total usable RAM.[1] It integrates a 12-channel DMA controller for high-throughput data transfers, 32 hardware spinlocks for core synchronization, and eight 32-bit inter-processor FIFOs to facilitate communication between the dual cores.[1] A 16 KB boot ROM provides essential startup code, including a USB bootloader supporting UF2 file format for drag-and-drop programming.[1] Connectivity options are robust, including 30 multi-function GPIO pins (plus six dedicated QSPI pins), two UARTs, two SPI controllers with 8-deep FIFOs, two I2C buses, 16 PWM channels across eight slices, and a full-speed USB 1.1 device/host controller compatible with USB 2.0.[1] An integrated 12-bit ADC with four channels (up to 500 ksps) includes a built-in temperature sensor, while the PIO blocks allow emulation of protocols like WS2812 LEDs, VGA output, or custom serial interfaces.[1] Power efficiency is prioritized with an on-chip LDO regulator, low-power modes (down to 0.18 mA in dormant state), and flexible voltage supplies: core at 1.1 V (up to 1.15 V for 200 MHz overclocking), I/O from 1.8 V to 5.5 V, and typical active consumption around 10 mA at 3.3 V.[1] Housed in a compact QFN-56 package with a body size of 7 mm × 7 mm and 0.4 mm pin pitch, featuring a reduced-size central exposed GND pad (ePad) compared to standard QFN-56 packages to allow easier PCB routing between the pad and peripheral pins, the RP2040 is designed for cost-sensitive applications like IoT devices, robotics, and hobbyist projects, with full open-source SDK support via the Raspberry Pi Pico SDK on GitHub.[1][2]

Development and Release

Background and Design

The Raspberry Pi Foundation developed the RP2040 microcontroller to address the need for an affordable, high-performance chip tailored for hobbyists, educators, and embedded developers, emphasizing ease of use in GPIO-intensive applications without dependence on third-party silicon vendors. This initiative stemmed from the Foundation's long-standing mission to democratize computing, extending their single-board computer expertise into the microcontroller domain to enable low-cost prototyping and educational projects focused on physical interfacing. By designing the chip in-house, the team aimed to incorporate signature values of high performance, low cost, and accessibility, filling a gap for a versatile device optimized for custom peripherals and real-time control tasks.[1][5] Development of the RP2040 began in the summer of 2017, led by a team of Raspberry Pi engineers who prioritized a dual-core ARM Cortex-M0+ architecture for its balance of simplicity, low power, and cost-effectiveness in implementation. The design process involved extensive use of Verilog for hardware description, with rigorous verification through software simulators and FPGA prototypes to ensure reliability before tape-out. Key phases included synthesizing the design for target performance, integrating design-for-test (DFT) features, and iterating on layout to meet area and power constraints, culminating in initial silicon validation on bring-up boards with separate power supplies to monitor and limit current draw during testing.[5][6] The RP2040 was fabricated using TSMC's 40LP (40 nm low-power) process node, selected for its optimal trade-off between performance, dynamic power efficiency, and leakage control, enabling operation at a nominal system clock speed of 125 MHz (up to 133 MHz maximum). Power consumption targets emphasized sub-100 mW active operation, achieved through efficient clocking options, low-power modes, and on-chip regulation, with typical figures around 0.4–0.6 mW per MHz under load. To facilitate prototyping, the RP2040 provides 30 GPIO pins, allowing for board designs with 0.1-inch pin spacing compatibility for standard breadboard setups, as seen in the reference Raspberry Pi Pico board, alongside open-source hardware elements such as KiCad reference schematics and layout guidelines to encourage community-driven board designs.[1][5][7]

Announcement and Production

The RP2040 microcontroller was publicly unveiled by the Raspberry Pi Foundation on January 21, 2021, in conjunction with the launch of the Raspberry Pi Pico development board, marking Raspberry Pi's entry into in-house silicon design for microcontrollers.[3] The chip was positioned as an affordable option for embedded applications, with the Pico board priced at $4, while the standalone RP2040 became available for purchase at $1 per unit starting June 1, 2021, through approved resellers.[3][4] Production of the RP2040 began ramping up in early 2021 at TSMC's facilities using a 40 nm process, but faced significant delays due to the global semiconductor shortages that intensified that year, resulting in widespread backorders for the Pico board and related products.[8] Despite these challenges, Raspberry Pi produced over 10 million RP2040 chips in 2021 alone, demonstrating robust scaling once supply stabilized. By 2025, annual production continues at scale, with projections of around 10 million units shipped that year.[8][9] The chip is offered in a QFN-56 package for standard integration or as a bare die for custom multi-chip modules, with its full datasheet released under a Creative Commons Attribution-NoDerivatives 4.0 International license to facilitate broad adoption.[1][10] Subsequent silicon revisions, including steppings B1 and B2 following the initial B0, introduced fixes to the boot ROM and other minor enhancements to improve reliability and manufacturing yields, with B2 becoming the standard by mid-2021.[1] As of 2025, the RP2040 remains in active production with a guaranteed lifespan until at least January 2041, widely available through major distributors such as Digi-Key and Mouser Electronics in both single-unit and bulk quantities.[1][11][12][13]

Architecture

Processor Cores

The RP2040 microcontroller integrates two ARM Cortex-M0+ processor cores, designed for low-power embedded applications with a focus on efficiency and simplicity. Each core implements the ARMv6-M architecture, supporting a 32-bit Thumb and Thumb-2 instruction set for compact code density and deterministic execution. Operating at a nominal clock frequency of 133 MHz, the cores can be officially overclocked to 200 MHz when supplied with a core voltage of at least 1.15 V, enabling higher performance in demanding tasks while maintaining compatibility with the device's thermal and power constraints.[1][14] The Cortex-M0+ cores lack a hardware floating-point unit (FPU), relying instead on software-based floating-point operations provided by a fast library in the RP2040's boot ROM to handle single-precision arithmetic efficiently. This design choice prioritizes die area and power savings over native floating-point hardware, aligning with the microcontroller's cost-sensitive profile. Each core delivers approximately 0.95 DMIPS/MHz in performance, offering balanced integer processing suitable for real-time control and signal processing without the overhead of more complex architectures.[1][15] Inter-core communication is facilitated through the Single-cycle I/O (SIO) block, which includes two 32-bit, 8-entry FIFO buffers—one for each direction—allowing efficient data transfer between cores at up to four words per cycle. Synchronization is managed via 32 hardware mutexes (spinlocks), enabling lock-free parallel task execution across the cores without requiring a memory management unit (MMU), which is absent in the Cortex-M0+ design. This setup supports asymmetric multiprocessing, where one core can handle system tasks while the other runs application code, promoting scalability in multi-threaded firmware.[1][14] Power management for the cores is optimized through separate voltage domains: the digital core operates at a nominal 1.1 V (DVDD, range 1.05–1.16 V), while I/O interfaces use 3.3 V (IOVDD, range 1.8–3.6 V). Dynamic clock gating at the core level, controlled via registers like SLEEP_EN and WAKE_EN, allows individual cores to be powered down or slowed independently, reducing energy consumption during idle periods or when only one core is active. This granular control, combined with the PLL-based clock system, ensures the RP2040 achieves low quiescent current, making it ideal for battery-powered devices.[1][7] The cores can offload repetitive I/O operations to the Programmable I/O (PIO) subsystem for enhanced parallelism, though without dedicated vector extensions or SIMD instructions on the processors themselves.[1]

Memory System

The RP2040 microcontroller features 264 kB of on-chip static random-access memory (SRAM), organized into six independent banks comprising four 64 kB banks and two 4 kB banks.[1] This architecture enables high-bandwidth access by allowing parallel reads and writes across banks, with the SRAM logically appearing as a contiguous block but physically striped for improved performance in multi-master scenarios.[1] The memory can be configured flexibly, such as as a single 264 kB block for unified use or split into two 128 kB regions (one per core) plus an 8 kB shared region, often achieved through the Memory Protection Unit (MPU) or by direct bank allocation to support dual-core operation without contention.[1] The RP2040 lacks a dedicated external memory controller for general-purpose DRAM; however, it includes hardware support for execute-in-place (XIP) access to up to 16 MB of off-chip QSPI flash memory via a dedicated interface, with additional flexibility provided by the Programmable I/O (PIO) subsystem for custom flash protocols if needed.[1] The RP2040 employs a 32-bit address space spanning 4 GB (from 0x00000000 to 0xFFFFFFFF), facilitating straightforward memory mapping for its components.[1] The shared SRAM is mapped to 0x20000000–0x20041FFF, accessible by both processor cores, DMA controllers, and peripherals over the AHB-Lite bus fabric.[1] An 16 kB boot ROM, containing the initial bootloader and utility functions, resides at 0x00000000–0x00003FFF and executes automatically on reset to handle system initialization.[1] External QSPI flash for code storage is mapped to 0x10000000–0x10FFFFFF, enabling direct execution without mandatory copying to SRAM, though the boot sequence typically loads initial code into RAM for faster operation.[1] Other regions include peripheral registers at 0x40000000 (APB) and 0x50000000 (AHB-Lite), ensuring isolation from system memory.[1] Error handling in the memory system relies primarily on software mechanisms, as the hardware does not include built-in parity or error correction code (ECC) for SRAM; developers can implement optional ECC in software for critical applications.[1] The boot process begins in the ROM, which checks the external flash via the QSPI interface: it loads the first 256 bytes of flash into SRAM bank 5, verifies integrity using CRC32, and jumps to execution if valid, otherwise falling back to USB bootloader mode after a timeout.[1] This sequence ensures reliable code loading into RAM, supporting stateless operation where the device boots from external flash without internal non-volatile storage.[1] The SRAM supports dual-port access, permitting simultaneous reads by both cores or other masters without arbitration delays in most cases, thanks to the banked structure and dedicated AHB-Lite paths.[1] Operating at the system clock speed of up to 133 MHz, it provides zero-wait-state, single-cycle 32-bit access, yielding effective bandwidths of up to 133 MB/s per port or higher aggregate throughput (e.g., 2 GB/s peak for interleaved accesses).[1] This design prioritizes low-latency data movement for real-time tasks, with core access patterns leveraging the shared mapping to enable efficient inter-core communication via SRAM.[1]

Key Features

Programmable I/O (PIO)

The RP2040 microcontroller incorporates a dedicated Programmable I/O (PIO) subsystem consisting of two independent PIO blocks, each equipped with four state machines, for a total of eight state machines that enable parallel execution of custom assembler programs tailored to bit-banging protocols and other specialized digital interfaces.[1] This architecture allows the state machines to operate autonomously, offloading the dual-core Arm Cortex-M0+ processors from timing-critical I/O tasks while providing deterministic behavior essential for protocols requiring precise pulse widths or synchronization.[1] Each PIO block shares a 32 × 16-bit instruction memory space, permitting flexible program allocation across its state machines, which can run concurrently to handle multiple independent I/O streams.[1] The PIO instruction set comprises compact 16-bit instructions designed for efficient I/O manipulation, including primitives such as IN and OUT for shifting data to and from GPIO pins, JMP for conditional or unconditional branching to implement loops and control flow, and WRAP directives in the execution control registers to define program boundaries for seamless cycling without CPU intervention.[1] Additional instructions like MOV, SET, WAIT, PUSH, PULL, DELAY, and IRQ support data movement, pin setting, synchronization on GPIO or IRQ conditions, FIFO transfers, timing adjustments, and interrupt generation, enabling the creation of complex behaviors within a minimal footprint of up to 32 instructions per block.[1] Each state machine executes these instructions in a single cycle relative to its clock domain, with clock speeds derived from the system clock (up to 133 MHz by default) via programmable 16.8 fixed-point dividers, allowing independent operation at frequencies from approximately 2 kHz to the full system rate for high-throughput applications.[1] Buffering is handled through 4 × 32-bit TX and RX FIFOs per state machine, which can be joined into 8 × 32-bit single-direction FIFOs using shift control configuration, facilitating efficient data staging between the PIO and the rest of the system with minimal latency.[1] Autopull and autopush mechanisms, configurable with bit-width thresholds from 1 to 32, automate transfers between FIFOs and the 32-bit input/output shift registers, while DMA request (DREQ) signals enable chaining with the RP2040's DMA controller for sustained, low-CPU-overhead data transfers across peripherals.[1] This integration supports burst transfers at up to one word per clock cycle, as detailed in the microcontroller's peripheral documentation.[1] PIO's flexibility shines in practical implementations, such as driving WS2812 addressable LEDs, where a compact program (often 3-4 instructions) generates the required 800 kHz serial protocol with precise 400 ns and 800 ns high-time pulses per bit, using a single state machine to control an arbitrary number of LEDs in a chain via DMA-fed FIFO data. Similarly, VGA output can be achieved by configuring state machines for parallel digital pixel interface (DPI) signaling, outputting 16-bit RGB-565 video data across 18 GPIOs with resistor-based DAC conversion for analog sync and color levels, demonstrating PIO's capability for video timing without dedicated hardware.[7] State machines support on-the-fly reconfiguration through core-initiated commands to execution control registers, allowing dynamic shifts in pin mappings, program loading, or operational modes—such as pausing one machine to repurpose GPIOs for a different protocol—while maintaining overall system responsiveness.[1] PIO is also commonly used to implement I²S audio output for interfacing with external DACs, such as the PCM510xA series, in a 3-wire configuration (BCLK, LRCK, DATA) without requiring an external master clock since many DACs have internal PLLs that lock from BCK. A popular efficient approach uses a single PIO state machine with .side_set 2 to control both BCLK (side-set bit 0) and LRCK (side-set bit 1) alongside the DATA pin via out pins. The program shifts out bits MSB-first, using the X register as a bit counter in loops for each channel. Example PIO assembly for 32-bit per channel (64-bit stereo frame): 
.side_set 2

bitloop_left:
    out pins, 1       side 0b10   ; BCLK high, LRCK low (left channel)
    jmp x-- bitloop_left  side 0b11
    out pins, 1       side 0b00
    set x, 30         side 0b01

bitloop_right:
    out pins, 1       side 0b00   ; BCLK low, LRCK low (transition)
    jmp x-- bitloop_right  side 0b01
    out pins, 1       side 0b10
    set x, 30         side 0b11     ; LRCK high for right channel
To adjust for 16-bit per channel, change set x, 30 to set x, 14. The program assumes autopull with pull_threshold(32), shifting left (MSB-first), and TX FIFO fed with one 32-bit word per channel. Clock configuration is critical for standard audio rates. For example, to achieve 96 kHz sample rate with 64× BCK (6.144 MHz BCLK), set the PIO clock divider to 10 when the system clock is configured to 61.44 MHz (61.44 MHz / 10 = 6.144 MHz). Many DACs like PCM510xA support 32× or 64× BCK per LRCK; refer to the datasheet for PLL locking ranges (e.g., 3.072 MHz or 6.144 MHz at 96 kHz). This PIO method offloads audio generation entirely to hardware, allowing sustained high-quality playback with DMA feeding the FIFO from memory buffers, making it ideal for embedded audio applications on the RP2040.

Integrated Peripherals

The RP2040 microcontroller integrates a variety of fixed-function peripherals designed for efficient handling of communication, analog input, timing, and data transfer tasks, all accessible via the ARM bus and configurable through dedicated registers. These peripherals operate from the peripheral clock domain (clk_peri, up to 133 MHz) and support direct memory access (DMA) for offloading CPU involvement in data movement. Electrical characteristics include support for IOVDD supplies from 1.8 V to 3.3 V, with GPIO drive strengths configurable up to 12 mA.[1]

Communication Interfaces

The RP2040 features two UART controllers (UART0 and UART1), each supporting 5- to 8-bit data words, 1 or 2 stop bits, optional parity (odd, even, or none), and hardware flow control via RTS/CTS signals. They include 32-entry transmit FIFOs and 32-entry receive FIFOs, with programmable baud rates derived from the peripheral clock (clk_peri) up to approximately 7.8 Mbaud at 125 MHz system clock. Interrupt sources include receive/transmit FIFO level thresholds and overrun conditions, mapped to IRQ 20 (UART0) and IRQ 21 (UART1).[1] Two SPI controllers (SPI0 and SPI1) provide master and slave modes compatible with Motorola SPI, Texas Instruments SSP, and Microwire formats, including dual/quad data modes for up to 32-bit frames. Each has 8-deep transmit and receive FIFOs, with clock rates up to 62.5 Mbps in master mode or 11 Mbps in slave mode at 133 MHz clk_peri. Configuration options include programmable clock polarity/phase and data size, with interrupts for FIFO events on IRQ 18 (SPI0) and IRQ 19 (SPI1). DMA channels can be paced by dedicated request signals for efficient burst transfers.[1] Additionally, two I2C buses (I2C0 and I2C1) support standard (100 kHz), fast (400 kHz), and fast-plus (1 MHz) modes in both master and slave configurations, using 7- or 10-bit addressing. Each includes 16-deep transmit/receive FIFOs, clock stretching for slave synchronization, and spike suppression filters, with external pull-up resistors required on SDA/SCL lines. Interrupts cover FIFO thresholds and arbitration loss, assigned to IRQ 23 (I2C0) and IRQ 24 (I2C1), and baud rates are programmable up to the system clock limit of 133 MHz.[1]

Analog and Timing

The analog subsystem centers on a single 12-bit successive approximation register (SAR) ADC with four external channels multiplexed to GPIO26–29, plus an internal temperature sensor channel, achieving up to 500 ksps conversion speed from a dedicated 48 MHz CLK_ADC. It delivers 8.7 effective number of bits (ENOB) with differential nonlinearity (DNL) peaks at specific codes, optimized for input voltages up to 3.3 V under ADC_AVDD of 1.8–3.3 V; an 8-entry FIFO buffers results, with DMA support via IRQ 22.[1] For pulse-width modulation, the RP2040 provides eight PWM slices, each generating two independent 16-bit channels (A and B) for a total of 16 outputs, supporting arbitrary duty cycles from 0–100% with phase-correct operation and fractional clock division (up to 8.4 fixed-point precision). Counters derive from clk_peri, enabling high-resolution control for motor drives or LED dimming, with DMA pacing and a shared interrupt (IRQ 4).[1] Timing functions include a 64-bit system timer with four independent alarm comparators, clocked by the reference clock (clk_ref, 12 MHz default) for resolutions down to 1 µs and maximum intervals up to approximately 4295 seconds, generating interrupts on IRQ 0–3. A dedicated 24-bit watchdog timer, extendable to 64-bit via software, provides system reset on underflow and non-maskable interrupt (NMI) support, with a maximum timeout of about 8.3 seconds at 1 µs ticks; it includes scratch registers for state preservation.[1]

USB Controller

The integrated USB 1.1 controller operates at full speed (12 Mbps) with an on-chip PHY, supporting device mode natively and host mode through software implementation. It manages up to 32 endpoints (8 addressable) with 60 × 64-byte buffers in 4 kB of dedicated DPRAM, handling control, bulk, interrupt, and isochronous transfers; low-speed (1.5 Mbps) host operation is possible via an external hub. The 48 MHz USB clock (CLK_USB) requires clk_sys > 48 MHz, with interrupts on IRQ 5 for endpoint events; electrical specs include 27 Ω series resistors on D+/D- lines and VBUS sensing via GPIO. Double buffering enhances throughput, though certain endpoint abort operations require software workarounds.[1]

DMA

The direct memory access controller comprises 12 independent channels, each capable of 8-, 16-, or 32-bit transfers with scatter-gather support via chaining and programmable priority levels. It facilitates burst transfers to/from peripherals like UART, SPI, I2C, ADC, and PWM using dedicated data request (DREQ) signals, with pacing timers and optional CRC computation for integrity. Sequences can handle up to 2^32 - 1 transfers, generating interrupts on completion (IRQ 11 for channels 0–5, IRQ 12 for 6–11); address incrementing and wrapping modes are configurable, though certain read/write address behaviors during non-incrementing transfers necessitate using transfer count registers instead.[1]

Package

The RP2040 microcontroller is housed in a QFN-56 (Quad Flat No-leads) package with a body size of 7 mm × 7 mm and a pin pitch of 0.4 mm. The central exposed GND pad (ePad) measures 3.2 mm × 3.2 mm and is reduced in size compared to standard QFN-56 packages to facilitate easier PCB routing between the pad and the peripheral pins.[1] Recommended PCB footprint dimensions include an overall size of 7.75 mm × 7.75 mm, with pad width 0.20 mm, inner pad length 0.875 mm, and outer pad length 1.175 mm.[1] The RP2040 is Pb-free with matte tin finish (minimum 8 µm over CuFe2P). It has Moisture Sensitivity Level 1 (MSL1) per J-STD-020E. The recommended reflow profile includes: preheat 150–200°C for 60–120 s, peak temperature 260°C for 30 s, ramp-up ≤3°C/s, time above 217°C 60–150 s, ramp-down ≤6°C/s, total time ≤8 min. Adjust for actual board assembly.[7]

Programming and Development

Software Development Kit (SDK)

The Raspberry Pi Pico SDK, also known as pico-sdk, is the official open-source software development kit for programming the RP2040 microcontroller in C and C++. Released on January 21, 2021, alongside the Raspberry Pi Pico board, it provides a comprehensive framework for embedded development, emphasizing simplicity and direct hardware access while abstracting low-level details. The SDK is actively maintained, with version 2.2.0 released in July 2025, including bug fixes, documentation improvements, and new features such as enhanced board support.[16][17] The SDK is built on ARM's Cortex Microcontroller Software Interface Standard (CMSIS) for core functionality and supports optional integration with FreeRTOS for real-time operating system capabilities. It includes hardware abstraction layers with APIs for key RP2040 features, such as general-purpose input/output (GPIO) control via gpio_init() and related functions, Programmable I/O (PIO) state machines for custom protocols, and peripherals like timers, UART, SPI, I2C, PWM, and ADC. These APIs enable developers to configure and interact with hardware registers without manual bit manipulation in most cases, promoting portable and maintainable code.[18][17][16] The build system is CMake-based (version 3.13 or later), facilitating cross-compilation for the ARM Cortex-M0+ architecture using the GNU ARM Embedded Toolchain (GCC). Developers clone the SDK repository, set the PICO_SDK_PATH environment variable, and generate build files with commands like cmake -B build followed by make in the build directory; board-specific configurations, such as for the Pico or Pico W, are specified via -DPICO_BOARD flags. The SDK incorporates a bootloader called boot2, which supports USB mass storage (UF2 files) and UART-based flashing for drag-and-drop or scripted deployment without additional hardware.[18][17][16] Debugging is facilitated through the RP2040's Serial Wire Debug (SWD) interface, compatible with tools like the official Raspberry Pi Debug Probe or a secondary Pico configured as a Pico Probe via USB. The SDK supports GDB integration for breakpoints and stepping, along with printf redirection over USB serial output and hardware trace capabilities using the ARM CoreSight components for performance analysis.[19][18][17] The SDK ships with a repository of pre-built examples in the companion pico-examples project, demonstrating core concepts such as a basic LED blinker using GPIO, PIO-based animations like VGA signal generation, and USB device classes including Human Interface Device (HID) for keyboard or mouse emulation. These examples serve as starting points for custom applications and highlight the SDK's versatility for both simple bare-metal programs and more complex multicore designs.[20][18]

Supported Languages and Ecosystems

The RP2040 microcontroller supports a variety of programming languages and ecosystems beyond its primary C/C++ SDK, enabling rapid prototyping and accessibility for developers from diverse backgrounds. These include interpreted languages like Python variants, as well as support for Rust, Go, and JavaScript through community-driven ports and libraries. Such ecosystems emphasize ease of use, interactive development, and integration with popular tools, fostering widespread adoption in education, hobbyist projects, and embedded applications.[21][22][23] MicroPython provides an official port for the RP2040, offering a lightweight Python 3 implementation optimized for microcontrollers. It includes a REPL (Read-Eval-Print Loop) accessible over USB for immediate interactive coding, along with the machine.Pin module for GPIO control and the rp2 module for accessing RP2040-specific features like Programmable I/O (PIO) state machines. This setup supports rapid prototyping by allowing developers to script hardware interactions without compilation, such as LED blinking or sensor reading, directly on the device. The firmware is built daily and available for download, with extensive documentation covering RP2040 peripherals.[21][24][25] CircuitPython, developed by Adafruit as a user-friendly fork of MicroPython, extends support to RP2040 boards with enhanced file system access. Users can edit code files directly on the device, which appears as a USB mass storage drive (CIRCUITPY) upon connection, simplifying deployment without specialized tools. It includes a rich library ecosystem for common peripherals, such as sensors (e.g., via adafruit_dht for temperature/humidity) and displays (e.g., adafruit_ssd1306 for OLED screens), promoting circuit-building and experimentation. Official UF2 firmware images are provided for various RP2040-based boards like the Raspberry Pi Pico and Adafruit Feather RP2040.[26][27][28] For the Seeed Studio XIAO RP2040 board, CircuitPython installation involves downloading the latest UF2 firmware file from the official CircuitPython downloads page. Users hold the BOOT button while connecting the board to a USB port, causing it to appear as the "RPI-RP2" mass storage drive. Dragging the UF2 file onto this drive initiates the installation, after which the board reboots and mounts as the "CIRCUITPY" drive for direct file editing and code execution.[29][30] Additional languages broaden the RP2040's appeal through community efforts. Rust integration is facilitated by the rp-hal crate, an embedded-HAL implementation providing safe, high-level abstractions for peripherals like timers, UART, and PIO, enabling memory-safe embedded development. TinyGo, a Go compiler for microcontrollers, supports RP2040 with multi-core execution and PIO access as of September 2025, including enhancements for concurrency in tasks like networking on the Pico W. For JavaScript, the Kaluma runtime (version 1.2 as of February 2025) offers a tiny engine tailored for RP2040, supporting Node.js-like APIs for event-driven scripting and hardware control. Arduino IDE compatibility is achieved via community cores, such as the Earle Philhower RP2040 core, which ports the Arduino framework to enable sketch-based programming with familiar libraries like Servo and Wire.[22][31][23][32][33] These languages integrate with broader ecosystems for streamlined workflows. PlatformIO provides comprehensive RP2040 support, including board definitions, library management, and build tools compatible with MicroPython, CircuitPython, and Arduino frameworks, allowing project configuration via a unified IDE. Visual Studio Code extensions, such as the official Raspberry Pi Pico VS Code extension, offer debugging, flashing, and serial monitoring tailored for RP2040 development across languages. The SDK underpins these runtimes by exposing low-level hardware access.[34][35][36][37]

Hardware Platforms

Official Raspberry Pi Boards

The Raspberry Pi Pico is the flagship official board featuring the RP2040 microcontroller, measuring 21 mm by 51 mm with a 1 mm thick PCB. It integrates 2 MB of on-board QSPI flash memory and provides 26 multifunction GPIO pins operating at 3.3 V logic levels, enabling flexible interfacing with external components. An onboard LED connected to GPIO25 serves as a simple status indicator, while the drag-and-drop UF2 bootloader allows programming via USB mass storage without additional tools.[38][39] The Raspberry Pi Pico W, introduced in 2022, extends the base Pico design with wireless connectivity in the same compact form factor. It incorporates the Infineon CYW43439 chip for 2.4 GHz 802.11n Wi-Fi and Bluetooth 5.2 support, using an onboard antenna for compact integration. This includes Bluetooth Low Energy (BLE) capabilities, enabling low-power device-to-device communication, such as in remote control setups between multiple Pico W boards. This addition increases power consumption, with a recommended maximum draw of up to 300 mA on the 3.3 V rail under full load, compared to the standard Pico's lower baseline.[40][2][41] The RP2040 on these boards supports 30 total GPIO pins, including dedicated power and ground connections, allowing extensive multiplexing for various peripherals. Analog-to-digital conversion is handled on pins GP26 through GP29, providing four 12-bit channels at up to 500 ksps, while USB 1.1 full-speed communication is assigned to GP0 (D-) and GP1 (D+), facilitating host or device modes via the onboard micro-USB port. Official variants like the Pico H and Pico WH include pre-soldered 2.54 mm headers for easier prototyping, serving as key accessories alongside breadboard-compatible packs with sensors for introductory projects.[7][38][2]

Third-Party Implementations

The RP2040 microcontroller has inspired a range of third-party boards from various manufacturers, offering customized form factors, integrated peripherals, and ecosystem compatibility to suit diverse applications such as wearables, embedded systems, and prototyping. These implementations leverage the core RP2040's dual Cortex-M0+ processors, 264 KB SRAM, and programmable I/O while adding features like enhanced power management, compact designs, and standardized connectors for easier integration. The Adafruit Feather RP2040 is a compact development board measuring 50.8 mm × 22.8 mm × 7 mm, designed for the Adafruit Feather ecosystem with built-in support for LiPo battery charging at 200 mA and a STEMMA QT connector for quick I2C sensor connections. It includes 8 MB of SPI flash memory, 21 GPIO pins supporting 4 ADCs, 16 PWM channels, 2 I2C, 2 SPI, and 2 UART interfaces, along with an RGB NeoPixel LED and a 12 MHz crystal oscillator for stable clocking. This board emphasizes portability and modularity, making it suitable for battery-powered projects with easy USB-C programming.[42] SparkFun's Pro Micro RP2040 serves as an Arduino-compatible drop-in replacement for the legacy AVR-based Pro Micro, maintaining the same 18-pin layout for seamless upgrades in existing designs. It features 16 MB of external QSPI flash, a Qwiic connector for I2C peripherals, and access to 20 of the RP2040's multifunction GPIO pins, including support for USB device/host modes and hardware serial UART. The board's minimalist footprint (approximately 33 mm × 18 mm) and exposed pads for soldering headers prioritize compatibility with keyboard, robotics, and HID applications without requiring redesigns.[43] The Pimoroni Pico LiPo is a battery-focused board optimized for portable and wearable projects, incorporating an MCP73831 charger circuit supporting 215 mA for LiPo/LiIon batteries via a 2-pole JST PH connector and USB-C for recharging and programming. Available with 4 MB or 16 MB QSPI flash, it includes an onboard RGB LED for status indication and a Qwiic/STEMMA QT connector to facilitate sensor attachments, with all 26 RP2040 GPIO pins broken out on a 53 mm × 21 mm form factor. Its power button and battery voltage monitoring pin (GP29) enhance usability in mobile scenarios.[44] Among open-source and minimalist designs, the Waveshare RP2040-Zero adopts a Pico-like castellated module format for surface-mount applications, providing a low-profile alternative with 2 MB NOR flash and 20 edge-accessible GPIO pins plus 9 additional solder points for full RP2040 connectivity, including 2 SPI, 2 I2C, 2 UART, 4 ADCs, and 16 PWM channels. This compact board emphasizes cost-effectiveness and integration into custom PCBs without unnecessary add-ons.[45] Similarly, the Seeed Studio XIAO RP2040 represents an ultra-tiny implementation at 21 mm × 17.5 mm × 3.5 mm, featuring 2 MB onboard flash, 11 digital GPIO pins (with 11 PWM-capable), 4 analog inputs, and interfaces for 1 I2C, 1 SPI, and 1 UART, all powered via USB Type-C. Its breadboard-friendly SMD design and support for Arduino, MicroPython, and CircuitPython—with installation via UF2 bootloader by holding the BOOT button while connecting to USB and dragging the file to the appearing drive, as detailed in the Programming and Development section—make it ideal for space-constrained IoT and prototyping tasks.[46][29]

Applications and Adoption

Typical Use Cases

The RP2040 microcontroller finds widespread application in hobbyist projects, leveraging its programmable I/O (PIO) for efficient bit-banging protocols, PWM capabilities for precise control, and integrated peripherals for sensor interfacing. For instance, enthusiasts use PIO state machines to drive LED matrices, such as displaying images on a 128x64 HUB75 RGB LED panel by generating the required timing signals without CPU overhead.[20] In robotics, the RP2040's PWM channels enable smooth motor speed control, as demonstrated in projects connecting DC motors via drivers like the L298N, where duty cycle variations adjust velocity for differential drive mechanisms.[47] Wireless communication is also facilitated on RP2040-based boards like the Raspberry Pi Pico W using Bluetooth Low Energy (BLE), supporting remote control applications such as transmitting joystick data from a controller Pico W (acting as central) to a model boat Pico W (as peripheral) for motor control via characteristic writes, with direct pairing and power efficiency for battery-powered setups.[41] Sensor data logging is another common use, employing the built-in ADC for analog readings from devices like temperature probes and I2C for digital sensors such as accelerometers, allowing real-time capture and storage on SD cards or transmission via USB.[48][49] In educational settings, the RP2040 serves as an accessible platform for teaching digital logic and embedded programming, with kits like the Raspberry Pi Pico facilitating hands-on experiments in university courses. Students at institutions such as Cornell University have developed projects including emulators for retro computers like the BBC Micro and simulations of solar system mechanics using RTC modules, which illustrate concepts in timing, interrupts, and peripheral integration.[50] Interactive exhibits, such as those in museums, employ the RP2040 to create responsive installations that demonstrate logic gates through LED feedback or basic algorithms via simple button inputs.[51] For industrial prototypes, the RP2040 supports custom protocol bridges, exemplified by implementations of Modbus RTU over UART for interfacing legacy industrial sensors with modern systems, enabling reliable data exchange in automation testbeds.[52] It also excels in USB gadget development, acting as host or device for peripherals like custom keyboards via USB HID protocols or MIDI controllers that process note data for musical interfaces, as seen in projects with mechanical switches and RGB feedback.[53] The RP2040's performance shines in demanding I/O tasks, with PIO state machines capable of generating signals up to 133 MHz by aligning with the system clock, useful for high-frequency clock outputs in signal processing prototypes.[54] Additionally, combining PIO with DMA allows handling over 1000 WS2812 addressable LEDs simultaneously, as in parallel string controllers where multiple channels drive extensive lighting arrays for displays or effects without interrupting the main cores.[55]

Community and Commercial Impact

The RP2040 microcontroller has cultivated a robust open-source community since its release, evidenced by over 1,200 public GitHub repositories dedicated to projects, libraries, and tools as of late 2025.[56] Active engagement occurs on platforms like the official Raspberry Pi forums, which host dedicated sections for RP2040-based boards and peripherals, and Hackaday, where numerous tutorials, hardware modifications, and deep-dive analyses drive innovation and knowledge sharing.[57][58] These resources have accelerated adoption among hobbyists, educators, and developers, fostering a ecosystem of shared code and hardware designs. Commercially, the RP2040 has seen integration into various products, particularly in input devices, connectivity modules, and compact development boards. For instance, it powers custom mechanical keyboards like Adafruit's KB2040, which leverages the chip's GPIO capabilities for key matrix scanning.[59] In audio applications, the RP2040 enables USB sound interfaces through its PIO and DMA features, as demonstrated in commercial-grade prototypes for digital audio processing.[60] For IoT, it underpins devices such as the Arduino Nano RP2040 Connect, which combines the MCU with Wi-Fi and Bluetooth for connected applications.[61] Partnerships with manufacturers like Seeed Studio, a Raspberry Pi Approved Design Partner, and Pimoroni have expanded availability, with products including the Seeed XIAO RP2040—a thumb-sized board for embedded projects—and Pimoroni's RP2040 offerings.[62][63] The RP2040's impact lies in its role as a low-cost, high-performance entry point to advanced microcontroller design, often described as a "microcontroller for the masses" due to its dual-core architecture and open-source tools at under $1 per chip in volume.[64] This has democratized access to sophisticated features like programmable I/O, enabling flexible GPIO handling that rivals or exceeds the ESP32 in custom protocol support without dedicated hardware.[65] Microcontroller unit sales incorporating the RP2040 rose 81% in fiscal year 2024 to 5.7 million units, contributing to Raspberry Pi's broader ecosystem growth amid strong demand for affordable embedded solutions.[66] While praised for performance, the RP2040 faced initial criticism for lacking integrated wireless connectivity on the base model, limiting its appeal for immediate IoT deployments—a gap filled by the Raspberry Pi Pico W, which adds Wi-Fi via an Infineon CYW43439 chip for just $6.[67] The chip remains unrated for automotive or safety-critical environments, as it targets general commercial and hobbyist use rather than industrial-grade qualifications like AEC-Q100.

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