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Widlar current source
Widlar current source
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Diagram from Widlar's original patent

A Widlar current source is a modification of the basic two-transistor current mirror that incorporates an emitter degeneration resistor for only the output transistor, enabling the current source to generate low currents using only moderate resistor values.[1][2][3]

The Widlar circuit may be used with bipolar transistors, MOS transistors, and even vacuum tubes. An example application is the 741 operational amplifier,[4] and Widlar used the circuit as a part in many designs.[5]

This circuit is named after its inventor, Bob Widlar, and was patented in 1967.[6][7]

DC analysis

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Figure 1: A version of the Widlar current source using bipolar transistors.

Figure 1 is an example Widlar current source using bipolar transistors, where the emitter resistance R2 is connected to the output transistor Q2, and has the effect of reducing the current in Q2 relative to Q1. The key to this circuit is that the voltage drop across the resistance R2 subtracts from the base-emitter voltage of transistor Q2, thereby turning this transistor off compared to transistor Q1. This observation is expressed by equating the base voltage expressions found on either side of the circuit in Figure 1 as:

where β2 is the beta-value of the output transistor, which is not the same as that of the input transistor, in part because the currents in the two transistors are very different.[8] The variable IB2 is the base current of the output transistor, VBE refers to base-emitter voltage. This equation implies (using the Shockley diode equation):

Eq. 1

where VT is the thermal voltage.

This equation makes the approximation that the currents are both much larger than the scale currents, IS1 and IS2; an approximation valid except for current levels near cut off. In the following, the scale currents are assumed to be identical; in practice, this needs to be specifically arranged.

Design procedure with specified currents

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To design the mirror, the output current must be related to the two resistor values R1 and R2. A basic observation is that the output transistor is in active mode only so long as its collector-base voltage is non-zero. Thus, the simplest bias condition for design of the mirror sets the applied voltage VA to equal the base voltage VB. This minimum useful value of VA is called the compliance voltage of the current source. With that bias condition, the Early effect plays no role in the design.[9]

These considerations suggest the following design procedure:

  • Select the desired output current, IO = IC2.
  • Select the reference current, IR1, assumed to be larger than the output current, probably considerably larger (that is the purpose of the circuit).
  • Determine the input collector current of Q1, IC1:
  • Determine the base voltage VBE1 using the Shockley diode law
where IS is a device parameter sometimes called the scale current.
The value of base voltage also sets the compliance voltage VA = VBE1. This voltage is the lowest voltage for which the mirror works properly.
  • Determine R1:
  • Determine the emitter leg resistance R2 using Eq. 1 (to reduce clutter, the scale currents are chosen equal):

Finding the current with given resistor values

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The inverse of the design problem is finding the current when the resistor values are known. An iterative method is described next. Assume the current source is biased so the collector-base voltage of the output transistor Q2 is zero. The current through R1 is the input or reference current given as,

Rearranging, IC1 is found as:

Eq. 2

The diode equation provides:

Eq. 3

Eq.1 provides:

These three relations are a nonlinear, implicit determination for the currents that can be solved by iteration.

  • We guess starting values for IC1 and IC2.
  • We find a value for VBE1:
  • We find a new value for IC1:
  • We find a new value for IC2:

This procedure is repeated to convergence, and is set up conveniently in a spreadsheet. One simply uses a macro to copy the new values into the spreadsheet cells holding the initial values to obtain the solution in short order.

Note that with the circuit as shown, if VCC changes, the output current will change. Hence, to keep the output current constant despite fluctuations in VCC, the circuit should be driven by a constant current source rather than using the resistor R1.

Exact solution

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The transcendental equations above can be solved exactly in terms of the Lambert W function.

Output impedance

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Figure 2: Small-signal circuit for finding output resistance of the Widlar source shown in Figure 1. A test current Ix is applied at the output, and the output resistance is then RO = Vx / Ix.

An important property of a current source is its small signal incremental output impedance, which should ideally be infinite. The Widlar circuit introduces local current feedback for transistor . Any increase in the current in Q2 increases the voltage drop across R2, reducing the VBE for Q2, thereby countering the increase in current. This feedback means the output impedance of the circuit is increased, because the feedback involving R2 forces use of a larger voltage to drive a given current.

Output resistance is found using a small-signal model for the circuit, shown in Figure 2. Transistor Q1 is replaced by its small-signal emitter resistance rE because it is diode connected.[10] Transistor Q2 is replaced with its hybrid-pi model. A test current Ix is attached at the output.

Using the figure, the output resistance is determined using Kirchhoff's laws. Using Kirchhoff's voltage law from the ground on the left to the ground connection of R2:

Rearranging:

Using Kirchhoff's voltage law from the ground connection of R2 to the ground of the test current:

or, substituting for Ib:

Eq. 4

According to Eq. 4, the output resistance of the Widlar current source is increased over that of the output transistor itself (which is rO) so long as R2 is large enough compared to the rπ of the output transistor (large resistances R2 make the factor multiplying rO approach the value (β + 1)). The output transistor carries a low current, making rπ large, and increase in R2 tends to reduce this current further, causing a correlated increase in rπ. Therefore, a goal of R2rπ can be unrealistic, and further discussion is provided below. The resistance R1rE usually is small because the emitter resistance rE usually is only a few ohms.

Current dependence of output resistance

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Figure 3: Design trade-off between output resistance and output current.
Top panel: Circuit output resistance RO vs. DC output current IC2 using the design formula of Eq. 5 for R2 ;
Center panel: Resistance RO2 in output transistor emitter leg;
Bottom panel: Feedback factor contributing to output resistance. Current in the reference transistor Q1 is held constant, thereby fixing the compliance voltage. Plots assume IC1 = 10 mA, VA = 50 V, VCC = 5 V, IS = 10 fA, β1, = 100 independently of current.

The current dependence of the resistances rπ and rO is discussed in the article hybrid-pi model. The current dependence of the resistor values is:

and

is the output resistance due to the Early effect when VCB = 0 V (device parameter VA is the Early voltage).

From earlier in this article (setting the scale currents equal for convenience): Eq. 5

Consequently, for the usual case of small rE, and neglecting the second term in RO with the expectation that the leading term involving rO is much larger: Eq. 6

where the last form is found by substituting Eq. 5 for R2. Eq. 6 shows that a value of output resistance much larger than rO of the output transistor results only for designs with IC1 >> IC2. Figure 3 shows that the circuit output resistance RO is not determined so much by feedback as by the current dependence of the resistance rO of the output transistor (the output resistance in Figure 3 varies four orders of magnitude, while the feedback factor varies only by one order of magnitude).

Increase of IC1 to increase the feedback factor also results in increased compliance voltage, not a good thing as that means the current source operates over a more restricted voltage range. So, for example, with a goal for compliance voltage set, placing an upper limit upon IC1, and with a goal for output resistance to be met, the maximum value of output current IC2 is limited.

The center panel in Figure 3 shows the design trade-off between emitter leg resistance and the output current: a lower output current requires a larger leg resistor, and hence a larger area for the design. An upper bound on area therefore sets a lower bound on the output current and an upper bound on the circuit output resistance.

Eq. 6 for RO depends upon selecting a value of R2 according to Eq. 5. That means Eq. 6 is not a circuit behavior formula, but a design value equation. Once R2 is selected for a particular design objective using Eq. 5, thereafter its value is fixed. If circuit operation causes currents, voltages or temperatures to deviate from the designed-for values; then to predict changes in RO caused by such deviations, Eq. 4 should be used, not Eq. 6.

See also

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References

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Further reading

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Revisions and contributorsEdit on WikipediaRead on Wikipedia
from Grokipedia
The Widlar current source is a modification of the basic (BJT) circuit that incorporates an emitter degeneration in series with the output transistor to generate precise, low-value output currents (typically in the range of 5 to 200 μA) from a larger reference current, enabling efficient biasing in integrated circuits without the need for large, space-consuming resistors. Invented by Robert J. Widlar and patented in , the circuit exploits the predictable difference in base-emitter voltages (ΔV_BE) between two transistors operating at different collector currents, where ΔV_BE = (kT/) ln(I_C1 / I_C2), with this voltage drop applied across the emitter to define the output current as I_out = ΔV_BE / R. This design provides advantages over the simple by allowing moderate values (e.g., 200 Ω to 10 kΩ) to achieve small currents, reducing die area and manufacturing costs while maintaining high through . The Widlar current source has been a foundational element in analog IC design since its introduction, notably employed in the bias generator of the μA741 to supply stable currents scaled by a fixed ratio determined by the emitter .

Introduction

Definition and Purpose

The Widlar current source is a modification of the basic two-transistor circuit, featuring an added emitter degeneration on the output to enable output currents that are substantially smaller than the current. In its typical configuration using NPN bipolar junction s (BJTs), the circuit employs a diode-connected Q1 through which the current IREFI_\text{REF} flows into the collector, with the bases of Q1 and the output Q2 connected together. The output current is drawn from Q2's collector, while an emitter RER_E is placed in series with Q2's emitter to ground, creating a small that reduces the output current relative to IREFI_\text{REF}. The primary purpose of the Widlar current source is to generate stable, low-level currents on the order of microamperes in integrated circuits, avoiding the need for large resistors that would otherwise be required to achieve such small values from a higher reference current. This makes it ideal for biasing applications in low-power analog ICs, such as providing tail currents for differential pairs in operational amplifiers. For example, it is utilized in the classic uA741 op-amp to establish precise bias conditions for internal stages. Among its key advantages, the Widlar current source offers high due to the local feedback provided by the emitter , enhancing current stability over variations in output voltage or load. Additionally, its supports compact implementation by permitting moderate values (typically 200 ohms to 10 kΩ), which minimizes die area and manufacturing complexity compared to resistor-based alternatives.

Historical Background

The Widlar current source was invented by Robert J. Widlar, an American electrical engineer, during his tenure at in the mid-1960s. Widlar, who joined Fairchild in 1963, recognized the challenges in early fabrication, particularly the difficulty of producing high-value resistors with sufficient precision and consistency in processes. His innovation addressed the need for generating small bias currents—on the order of microamperes—essential for analog circuits, without depending on such impractical passive components. This breakthrough emerged amid the rapid evolution of monolithic IC technology, where minimizing die area and improving reliability were paramount. The circuit's formal introduction came through Widlar's seminal paper, "Some Circuit Design Techniques for Linear Integrated Circuits," published in the IEEE Transactions on Circuit Theory in December 1965. In this work, Widlar detailed the as a modification to the basic , enabling output currents significantly smaller than the reference current through strategic resistor placement. The invention was subsequently patented as U.S. Patent 3,320,439, filed on May 26, 1965, and granted on May 16, 1967, solidifying its place in analog design history. This publication and patent not only described the topology but also highlighted its practical advantages in linear ICs, marking a pivotal advancement in circuitry. The Widlar current source profoundly influenced operational amplifier design, facilitating stable biasing in integrated op-amps and enabling the production of commercially viable devices like the μA741, introduced by Fairchild in 1968. Its ability to provide precise, low-level currents without large resistors reduced power consumption and improved performance in early linear ICs, inspiring a lineage of current source variations. Initially centered on bipolar junction transistors (BJTs) to leverage their exponential current characteristics, the topology saw adaptations to metal-oxide-semiconductor field-effect transistors (MOSFETs) in the 1980s, coinciding with the rise of complementary metal-oxide-semiconductor (CMOS) processes for cost-effective analog and mixed-signal integration. These extensions maintained the core principle of current scaling while accommodating the square-law behavior of MOSFETs, broadening its applicability in modern ICs.

Fundamentals

Basic Current Mirror

A basic current mirror is a simple circuit that uses two matched bipolar junction transistors (BJTs) to replicate a reference input current IREFI_\text{REF} at its output as IOUTIREFI_\text{OUT} \approx I_\text{REF}. This configuration serves as a prerequisite building block for more advanced current sources in analog integrated circuits, such as those used for biasing amplifiers. The schematic employs two identical NPN BJTs, denoted Q1 and Q2, with their emitters connected to ground (or a common low-voltage rail). The bases of Q1 and Q2 are tied together, and the collector of Q1 is shorted to its base, configuring Q1 as a . The reference current IREFI_\text{REF} is forced into the collector (and thus the base node) of Q1, while the output current IOUTI_\text{OUT} is drawn from the collector of Q2. In operation, the diode-connected Q1 establishes a base-emitter voltage VBE1V_\text{BE1} determined by IREFI_\text{REF}, which is applied equally to Q2 via the connected bases. For matched transistors with equal emitter areas, this equal VBEV_\text{BE} results in the same in Q2 as in Q1, assuming identical operating conditions. In the ideal case of infinite current gain β\beta and no , the output current exactly matches the reference: IOUT=IREF.I_\text{OUT} = I_\text{REF}. This equality holds because the exponential relationship between VBEV_\text{BE} and collector current in BJTs ensures precise replication under matched conditions. However, practical limitations arise from device non-idealities. The circuit struggles to generate IOUTIREFI_\text{OUT} \ll I_\text{REF} because the identical VBEV_\text{BE} values necessitate similar current densities in the matched transistors, preventing significant current reduction without modifications. Additionally, the is moderate, approximately equal to the output resistance ror_o of Q2, given by roVA/IOUTr_o \approx V_A / I_\text{OUT} where VAV_A is the Early voltage, leading to some dependence of IOUTI_\text{OUT} on the output voltage.

Widlar Modification

The Widlar current source modifies the basic circuit by incorporating a , denoted as RER_E, in series with the emitter of the output Q2Q_2, while the emitter of the reference Q1Q_1 connects directly to ground. This addition creates a voltage drop across RER_E to the output current flowing through it, which reduces the base-emitter voltage VBE2V_{BE2} of Q2Q_2 relative to the base-emitter voltage VBE1V_{BE1} of Q1Q_1. The primary rationale for this modification is to enable the generation of an output current IOUTI_{OUT} that is significantly smaller than the reference current IREFI_{REF}, often by a factor much greater than 1, without relying on mismatched transistor areas or excessively large resistors that would consume substantial integrated circuit area. By forcing a differential base-emitter voltage through the emitter resistor, the circuit achieves precise current scaling suitable for low-current applications in integrated circuits. This approach was particularly valuable in early integrated circuit design, where minimizing passive component sizes was critical. In the circuit, the reference transistor Q1Q_1 establishes VBE1V_{BE1} based on IREFI_{REF}, which is approximately set by a resistor RREFR_{REF} connected to the supply voltage VCCV_{CC}, providing a stable bias for the bases of both transistors. The output transistor Q2Q_2 then mirrors this bias but with its effective VBE2V_{BE2} lowered by the drop across RER_E, resulting in a reduced collector current. The resistor RER_E thus plays the key role in current attenuation, while the shared base connection ensures the transistors operate with correlated characteristics. Non-ideal effects, such as finite current gain β\beta in the s or mismatches in their areas and thermal coupling, can introduce errors in the , though the Widlar design primarily depends on RER_E for scaling rather than matching alone. These factors may cause slight deviations from ideal , particularly at very low currents. Typical values for RER_E range from hundreds of ohms to several kilohms, depending on the desired current scaling; for example, values around 6–10 kΩ are used to achieve output currents in the 10 μA range from a reference of about 1 mA.

Circuit Analysis

DC Operating Point

The DC of the Widlar current source relies on several key assumptions to simplify the steady-state calculations. The transistors are assumed to be matched, sharing the same ISI_S, with high current gain β1\beta \gg 1, allowing base currents to be neglected. Additionally, the operates under conditions with no AC signals present, employing the basic Ebers-Moll model for the base-emitter junction, where the collector current relates exponentially to the base-emitter voltage: IC=ISeVBE/VTI_C = I_S e^{V_{BE}/V_T}, with thermal voltage VT26V_T \approx 26 mV at . Applying Kirchhoff's voltage law to the loop involving the second transistor Q2 yields the relation VBE1=VBE2+IOUTREV_{BE1} = V_{BE2} + I_{OUT} R_E, where VBE1V_{BE1} and VBE2V_{BE2} are the base-emitter voltages of Q1 and Q2, respectively, IOUTI_{OUT} is the output current, and RER_E is the emitter degeneration . This equation arises because the bases of Q1 and Q2 are connected, establishing a common base voltage VBV_B. The reference current IREFI_{REF} is approximated as IREF(VCCVBE1)/RREFI_{REF} \approx (V_{CC} - V_{BE1}) / R_{REF}, neglecting the small base currents due to high β\beta. At the key nodes, the collector current of Q1 equals the reference current, IC1=IREFI_{C1} = I_{REF}, while the collector current of Q2 is the output current, IC2=IOUTI_{C2} = I_{OUT}. These relations hold under the operation of both transistors. Solving for the involves determining VBE1V_{BE1} and VBE2V_{BE2} iteratively or graphically, as the exponential dependence in the Ebers-Moll model introduces a transcendental relationship between currents and voltages. The exact solution for IOUTI_{OUT} is deferred to detailed derivations, but this setup highlights the circuit's sensitivity to the voltage differences. To avoid saturation of Q2, the output voltage must satisfy VOUT>VBE2+IOUTREV_{OUT} > V_{BE2} + I_{OUT} R_E.

Output Current Derivation

The derivation of the output current in a Widlar current source begins with the application of Kirchhoff's voltage law (KVL) to the base-emitter loop of the two bipolar junction transistors (BJTs), assuming identical devices with matched saturation currents ISI_S. The base-emitter voltage of the reference transistor Q1 is VBE1=VTln(IREF/IS)V_{BE1} = V_T \ln(I_{REF}/I_S), where VT=kT/qV_T = kT/q is the thermal voltage, kk is Boltzmann's constant, TT is the absolute temperature, and qq is the . Similarly, for the output transistor Q2, VBE2=VTln(IOUT/IS)V_{BE2} = V_T \ln(I_{OUT}/I_S). The KVL relation yields VBE1=VBE2+IOUTREV_{BE1} = V_{BE2} + I_{OUT} R_E, where RER_E is the emitter degeneration on Q2, leading to VTln(IREF/IOUT)=IOUTREV_T \ln(I_{REF}/I_{OUT}) = I_{OUT} R_E under the assumptions that collector currents approximate emitter currents (ICIEI_C \approx I_E) and base currents are negligible (high β\beta). This simplifies to the IOUTRE/VT=ln(IREF/IOUT)I_{OUT} R_E / V_T = \ln(I_{REF} / I_{OUT}), or equivalently IOUT=IREFexp(IOUTRE/VT)I_{OUT} = I_{REF} \exp(-I_{OUT} R_E / V_T), which cannot be solved algebraically in elementary functions but highlights the logarithmic dependence of the output current on the reference current, enabling IOUTIREFI_{OUT} \ll I_{REF} for appropriate RER_E. An exact closed-form solution exists using the , the inverse of f(w)=wexp(w)f(w) = w \exp(w). Let z=IOUTRE/VTz = I_{OUT} R_E / V_T; then zexp(z)=IREFRE/VTz \exp(z) = I_{REF} R_E / V_T, so z=W(IREFRE/VT)z = W(I_{REF} R_E / V_T) and IOUT=(VT/RE)W(IREFRE/VT)I_{OUT} = (V_T / R_E) W(I_{REF} R_E / V_T), where WW is the principal branch of the . This solution is particularly useful for precise numerical evaluation or simulation, though it requires computational implementation of WW. For practical cases where IOUTI_{OUT} is small relative to IREFI_{REF} (large RER_E), an approximation is IOUT(VT/RE)ln(IREFRE/VT)I_{OUT} \approx (V_T / R_E) \ln(I_{REF} R_E / V_T), derived by neglecting the ln(IOUT)\ln(I_{OUT}) term in the transcendental equation. A first-order linear approximation for cases where the voltage drop across RER_E is small compared to VTV_T (i.e., IOUTIREFI_{OUT} \approx I_{REF}) is IOUTIREF/(1+qIREFRE/kT)I_{OUT} \approx I_{REF} / (1 + q I_{REF} R_E / kT). These approximations facilitate hand calculations but introduce errors that increase with the current ratio. This derivation neglects the Early effect (base-width modulation), which modulates transistor current gain and output impedance but is secondary for DC current computation here; inclusion would require iterative small-signal corrections. Additionally, VTV_T exhibits temperature dependence through TT, affecting the logarithmic scaling and requiring compensation in temperature-stable designs.

Design Procedures

Specifying Reference and Output Currents

In designing a Widlar current source, the reference current IREFI_{\text{REF}} and output current IOUTI_{\text{OUT}} are specified first based on the application's requirements, such as power consumption and voltage headroom constraints. Typically, IREFI_{\text{REF}} is chosen to be larger than IOUTI_{\text{OUT}} to enable the generation of small output currents without requiring impractically large resistors; for instance, a value of 100 μA might be selected for moderate power budgets in integrated circuits operating from a 5 V supply. This choice ensures sufficient drive for the reference transistor while minimizing overall dissipation, as described in the foundational techniques for linear ICs. With IREFI_{\text{REF}} and IOUTI_{\text{OUT}} defined, the emitter RER_E is selected using the approximate relationship derived from the base-emitter voltage difference: REVTln(IREFIOUT)IOUT,R_E \approx \frac{V_T \ln\left(\frac{I_{\text{REF}}}{I_{\text{OUT}}}\right)}{I_{\text{OUT}}}, where VT=kT/[q](/page/Q)26V_T = kT/[q](/page/Q) \approx 26 mV is the thermal voltage at (300 K). This formula arises from equating the voltage drop across RER_E to the logarithmic difference in collector currents for matched transistors, assuming identical saturation currents and neglecting base currents. For precision in low-current designs, an iterative calculation may be employed to solve the , with the basic case (infinite beta) solvable exactly using the ; finite beta (β\beta) effects, which introduce small corrections to the current ratio, require further numerical refinement or simulation. The reference resistor RREFR_{\text{REF}} is then determined to set IREFI_{\text{REF}} accurately, given by RREF=VCCVBEIREF,R_{\text{REF}} = \frac{V_{\text{CC}} - V_{\text{BE}}}{I_{\text{REF}}}, where VCCV_{\text{CC}} is the supply voltage and VBE0.7V_{\text{BE}} \approx 0.7 V is the base-emitter of the reference at typical operating currents. This ensures the reference branch biases correctly without excessive . As an illustrative example, consider IREF=10I_{\text{REF}} = 10 μA and IOUT=1I_{\text{OUT}} = 1 μA at room temperature. Substituting into the formula for RER_E yields RE0.026ln(10)1×10660kΩ,R_E \approx \frac{0.026 \cdot \ln(10)}{1 \times 10^{-6}} \approx 60 \, \text{k}\Omega, since ln(10)2.3\ln(10) \approx 2.3. For VCC=5V_{\text{CC}} = 5 V, RREF(50.7)/105=430kΩR_{\text{REF}} \approx (5 - 0.7)/10^{-5} = 430 \, \text{k}\Omega. Simulations or SPICE analysis can refine these values by iterating for beta dependence and temperature variations. Key considerations include verifying that the output transistor Q2 remains out of saturation, requiring its collector-emitter voltage VCE2>VBEV_{\text{CE2}} > V_{\text{BE}} under minimum load conditions to maintain high . Additionally, IOUTI_{\text{OUT}} has a practical minimum limited by reverse leakage currents (e.g., collector-substrate leakage in ICs), which can dominate below 1 μA and degrade current stability; thus, designs should target IOUTI_{\text{OUT}} well above the transistor's specified leakage.

Determining Resistor Values

When the resistor values RREFR_{\text{REF}} and RER_E are specified in a Widlar current source, the reference current IREFI_{\text{REF}} is first approximated as IREFVCCVBERREFI_{\text{REF}} \approx \frac{V_{CC} - V_{BE}}{R_{\text{REF}}}, where VCCV_{CC} is the supply voltage and VBEV_{BE} is the base-emitter voltage drop of the reference (typically around 0.7 V for BJTs). This approximation assumes negligible base currents and , providing a starting point for calculating the output current IOUTI_{\text{OUT}}. To find IOUTI_{\text{OUT}}, the IOUTRE=VTln(IREFIOUT)I_{\text{OUT}} R_E = V_T \ln\left( \frac{I_{\text{REF}}}{I_{\text{OUT}}} \right) must be solved, where VTV_T is the thermal voltage (approximately 26 mV at ). An iterative can be employed: begin with a suitable initial guess (e.g., from the approximate formula IOUTVTln(IREFRE/VT)REI_{\text{OUT}} \approx \frac{V_T \ln(I_{\text{REF}} R_E / V_T)}{R_E}), then repeatedly substitute into until convergence, such as IOUT(n+1)=VTREln(IREFIOUT(n))I_{\text{OUT}}^{(n+1)} = \frac{V_T}{R_E} \ln\left( \frac{I_{\text{REF}}}{I_{\text{OUT}}^{(n)}} \right). This approach is straightforward for hand calculations or simple simulations. For an exact closed-form solution, the Lambert W principal branch function is used. Define x=IOUTREVTx = \frac{I_{\text{OUT}} R_E}{V_T}, leading to x=W(IREFREVT)x = W\left( \frac{I_{\text{REF}} R_E}{V_T} \right), so IOUT=VTREW(IREFREVT)I_{\text{OUT}} = \frac{V_T}{R_E} W\left( \frac{I_{\text{REF}} R_E}{V_T} \right), where W()W(\cdot) satisfies W(z)eW(z)=zW(z) e^{W(z)} = z for z0z \geq 0. This expression accounts for the exponential transistor characteristics precisely and is implementable in mathematical software supporting the Lambert W function. As a numerical example, consider RE=10kΩR_E = 10 \, \mathrm{k}\Omega, IREF=100μAI_{\text{REF}} = 100 \, \mu\mathrm{A}, and VT=26mVV_T = 26 \, \mathrm{mV}. The argument is IREFREVT38.46\frac{I_{\text{REF}} R_E}{V_T} \approx 38.46, and W(38.46)2.71W(38.46) \approx 2.71, yielding IOUT0.026×2.7110×1037.0μAI_{\text{OUT}} \approx \frac{0.026 \times 2.71}{10 \times 10^3} \approx 7.0 \, \mu\mathrm{A} (note: approximate value using for W; precise computation may vary slightly with software). This illustrates how the Widlar configuration generates a much smaller output current than the . Due to the logarithmic dependence in the equations, the output current exhibits high sensitivity to variations in RER_E; small percentage changes in RER_E can cause disproportionately large relative changes in IOUTI_{\text{OUT}}, often exceeding unity sensitivity in practical designs for low currents. This log sensitivity necessitates precise matching and in implementation.

Performance Characteristics

Output Impedance

The output impedance of the Widlar current source, taken at the collector of the output transistor Q2, is analyzed using a small-signal hybrid-pi model to highlight its advantage over the basic current mirror. In this model, the intrinsic output resistance ro2r_{o2} of Q2 (due to the Early effect) appears in parallel with the resistance looking into the base terminal, but the emitter degeneration resistor RER_E provides negative feedback that substantially increases the overall effective resistance. This configuration ensures high impedance, essential for applications requiring stable current delivery with minimal loading effects. The small-signal output resistance ROUTR_{OUT} can be approximated as ROUTro2+(1+gm2RE)(re2+RE),R_{OUT} \approx r_{o2} + (1 + g_{m2} R_E)(r_{e2} + R_E), where gm2=IOUT/VTg_{m2} = I_{OUT} / V_T is the of Q2, re2=VT/IOUTr_{e2} = V_T / I_{OUT} is the small-signal emitter resistance (with VTV_T the voltage, approximately 26 mV at ), and IOUTI_{OUT} is the output current. For cases assuming high current gain β\beta, a simplified form is ROUT(RE+re2)(1+gm2ro2)+ro2.R_{OUT} \approx (R_E + r_{e2})(1 + g_{m2} r_{o2}) + r_{o2}. Here, ro2=VA/IOUTr_{o2} = V_A / I_{OUT}, with VAV_A the Early voltage of the process. The degeneration by RER_E boosts the output impedance by the factor (1+gm2RE)(1 + g_{m2} R_E), which is typically much greater than 1, resulting in ROUTro2R_{OUT} \gg r_{o2} compared to the basic where no such resistor is present. This enhancement arises from the local feedback that opposes changes in collector current due to variations in collector-emitter voltage. However, finite β\beta introduces base current effects that reduce the effective impedance by a factor approximately (1+1/β)(1 + 1/\beta), as the base resistance rπ2=β/gm2r_{\pi 2} = \beta / g_{m2} influences the feedback loop. In implementations using bipolar transistors, the output impedance for microampere-level currents often reaches 1–10 MΩ, scaling with VAV_A (typically 50–100 V) and inversely with IOUTI_{OUT}, though exact values depend on device parameters and resistor sizing.

Effects of Current Dependence

In the Widlar current source, the output resistance ROUTR_{OUT} exhibits a strong dependence on the operating output current IOUTI_{OUT}. As IOUTI_{OUT} decreases, the transconductance of the output gm2=IOUT/VTg_{m2} = I_{OUT} / V_T diminishes, where VTV_T is the voltage. However, the emitter degeneration factor (1+gm2RE)(1 + g_{m2} R_E), with RER_E being the emitter , tends to increase because RER_E is scaled larger to achieve lower IOUTI_{OUT} for a fixed reference current IREFI_{REF}, often reaching a peak value around the logarithmic term in the current equation. Concurrently, the intrinsic output resistance of the ro2=VA/IC2r_{o2} = V_A / I_{C2} rises inversely with the collector current IC2IOUTI_{C2} \approx I_{OUT}, where VAV_A is the Early voltage. Overall, these effects lead to improved ROUTR_{OUT} at lower IOUTI_{OUT} levels, primarily driven by the higher ro2r_{o2}, making the Widlar source particularly effective for sub-milliampere applications. Typical analyses show ROUTR_{OUT} scaling proportionally to 1/IOUT1 / I_{OUT} in the low-current regime, where the dominates over degeneration, potentially exceeding 1 MΩ for IOUTI_{OUT} in the tens of microamperes. However, this enhancement comes at the cost of degraded performance and increased susceptibility to device mismatch, as thermal and 1/f currents become relatively larger compared to the small bias signal, and process variations amplify percentage errors in output current . Temperature variations further influence performance by shifting VTV_T, which directly alters the logarithmic term in the output current relation VTln(IREF/IOUT)=IOUTREV_T \ln(I_{REF} / I_{OUT}) = I_{OUT} R_E, introducing a proportional-to-absolute-temperature (PTAT) component with a temperature coefficient typically around 0.3% to 1% per degree Celsius without compensation. Supply voltage fluctuations primarily impact IREFI_{REF}, but the high ROUTR_{OUT} renders IOUTI_{OUT} far less sensitive, with dependence reduced compared to simple current mirrors. Mismatch sensitivity is exacerbated at small IOUTI_{OUT}, where variations in transistor emitter area or RER_E tolerance lead to greater spread in IOUTI_{OUT}; for instance, a 10% error in RER_E can propagate to approximately 8% error in IOUTI_{OUT} due to the partial sensitivity R_E / (R_E + V_T / I_{OUT}) < 1 in the logarithmic derivation. Emitter degeneration mitigates some mismatch effects, but precision suffers at low currents from amplified relative errors in saturation currents and base-emitter voltages. To address these issues, design practices include trimming of , employing larger geometries for improved matching, and incorporating startup circuits for reliable low-current operation. In modern implementations of the Widlar source, process advancements yield better intrinsic matching (e.g., threshold voltage variations below 10 mV) and reduced sensitivity to current levels, though tolerances remain a key limiter without additional compensation techniques like PTAT-CTAT balancing.
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