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Human-body model
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The human-body model (HBM) is the most commonly used model for characterizing the susceptibility of an electronic device to damage from electrostatic discharge (ESD). The model is a simulation of the discharge which might occur when a human touches an electronic device.
The HBM definition most widely used is the test model defined in the United States military standard, MIL-STD-883, Method 3015.9, Electrostatic Discharge Sensitivity Classification. This method establishes a simplified equivalent electrical circuit and the necessary test procedures required to model an HBM ESD event.
An internationally widely used standard is JEDEC standard JS-001.
HBM is used primarily for manufacturing environments to quantify an integrated circuit to survive the manufacturing process. A similar standard, IEC 61000-4-2, is used for system level testing and quantifies protection levels for a real world ESD event in an uncontrolled environment.
Model
[edit]In both JS-001-2012 and MIL-STD-883H the charged human body is modeled by a 100 pF capacitor and a 1500 ohm discharging resistance. During testing, the capacitor is fully charged to several kilovolts (2 kV, 4 kV, 6 kV and 8 kV are typical standard levels) and then discharged through the resistor connected in series to the device under test.
See also
[edit]References
[edit]External links
[edit]Human-body model
View on GrokipediaIntroduction
Definition
The human-body model (HBM) is a standardized electrical circuit used to simulate the electrostatic discharge (ESD) event that occurs when a charged human body discharges to an electronic device, typically through contact at a single point such as a pin or terminal.[1] This model represents the most common ESD scenario in electronics manufacturing and handling environments, where static charge accumulated on a person's body is rapidly transferred to a sensitive component.[4] At its core, the HBM consists of a 100 pF capacitor, which models the capacitance of the human body, charged to a specified voltage and then discharged through a 1.5 kΩ series resistor that approximates the resistance of human skin and internal body pathways.[1] These parameters are defined in the ANSI/ESDA/JEDEC JS-001 standard, ensuring reproducibility in ESD susceptibility testing.[5] The circuit generates a high-current, short-duration pulse that mimics the transient stress on semiconductor devices during discharge.[1] In practice, the HBM emulates the discharge from a human finger, where the fingertip acts as the contact point, delivering the stored charge in a way that parallels real-world handling of integrated circuits and other electrostatic discharge sensitive (ESDS) items.[4] This simulation focuses on the energy transfer from the charged body to the grounded device, providing a benchmark for assessing component robustness without replicating the full complexity of human physiology.[1]Purpose
The human-body model (HBM) primarily serves to classify the electrostatic discharge (ESD) sensitivity of integrated circuits and electronic components, enabling the assessment and prevention of damage during manufacturing and assembly processes.[6] By simulating the discharge of static electricity from a charged human body to a device, the model replicates real-world scenarios where personnel inadvertently transfer charge, thereby identifying vulnerability thresholds for components.[1] Key benefits of employing the HBM include the prediction of failure thresholds, which informs the design of on-chip ESD protection circuits to enhance device robustness.[1] It also facilitates comparisons between devices and ensures compliance with industry reliability standards, such as those outlined by the ESD Association and JEDEC, promoting standardized ESD control programs in production environments.[6] These advantages help mitigate risks associated with handling in electrostatic-protected areas, where human contact is a primary ESD vector.[1] In the broader context of ESD risks, the HBM targets human-induced discharges that represent a significant portion of field failures in semiconductors; HBM and CDM models often reproduce over 99% of observed failure signatures from practical applications.[1] This focus underscores its role in addressing personnel-related events, such as fingertip contact with device leads, which are prevalent in both factory and consumer settings.[1]Historical Development
Origins
The human-body model (HBM) for electrostatic discharge (ESD) testing traces its conceptual foundations to 19th-century investigations into sparks generated by the human body igniting explosive gas mixtures in coal mines, which first modeled the body's capacitance and discharge to assess ignition risks.[1] The conceptual and experimental foundations of the HBM further advanced through early efforts to quantify the electrostatic properties of the human body, particularly its capacitance and discharge behavior. In 1962, the U.S. Bureau of Mines conducted one of the first systematic measurements of human body capacitance, testing 22 individuals and reporting values ranging from 95 to 398 pF, with an average of 240 pF. These findings provided essential empirical data on how the human body acts as a capacitor, capable of storing charge from environmental interactions and discharging it rapidly upon contact with conductive objects.[7] During the 1960s and 1970s, ESD became a critical concern as semiconductor technology advanced, leading to frequent failures in sensitive electronics due to human handling. The U.S. Department of Defense pioneered the adoption of ESD testing in military applications, particularly for missile and avionics systems, to simulate operator-induced discharges and ensure reliability in high-stakes environments. This period marked the initial development of HBM-like simulations, driven by observed damage in metal-oxide-semiconductor (MOS) devices and the need to protect against static charges generated during assembly and operation.[8][9] A foundational contribution to the HBM came from early publications that analyzed human discharge events to define model parameters. Notably, the 1980 paper by P.R. Bossard, R.G. Chemelli, and B.A. Unger, titled "ESD Damage from Triboelectrically Charged IC Pins," detailed ESD damage from triboelectrically charged integrated circuit pins, deriving key HBM characteristics—such as capacitance and resistance values—from direct measurements of human-body discharges, which informed subsequent ESD susceptibility assessments.[10]Standardization
The standardization of the human-body model (HBM) for electrostatic discharge (ESD) testing marked a pivotal shift from ad hoc experimental approaches to formalized protocols, ensuring consistent evaluation of microcircuit susceptibility across industries. A key early milestone was the inclusion of the HBM in MIL-STD-883 Method 3015 in 1975, which established it as a required test for military-grade devices, emphasizing uniform procedures for assessing ESD damage thresholds.[1] In 1995, the Electronic Industries Alliance (EIA) and JEDEC Solid State Technology Association formalized the HBM through JESD22-A114, positioning it as the prevailing industry standard for component-level ESD sensitivity testing and classification. This document outlined precise simulator circuits and testing methodologies, replacing varied practices with a reproducible framework that became foundational for commercial semiconductor qualification.[11] The ESD Association (ESDA), established in 1982 as a professional body dedicated to ESD advancement, further drove HBM evolution by developing ANSI/ESD STM5.1 in 1998, which refined testing parameters for greater precision in replicating human-induced discharges. Subsequent revisions to STM5.1, extending through 2019, introduced verifier circuits to validate simulator performance and waveform fidelity, enhancing test reliability and reducing variability in results. The harmonized ANSI/ESDA/JEDEC JS-001 standard, first published in 2011, has continued to evolve with revisions in 2023 and 2024 (latest as of October 2024).[12] A landmark collaboration occurred in 2011 with the joint ESDA-JEDEC update to ANSI/ESDA/JEDEC JS-001, which harmonized prior standards like STM5.1-2007 and JESD22-A114F into a unified global protocol, incorporating advanced compliance verification to align practices across international manufacturing and testing ecosystems.[13]Model Components
Electrical Circuit
The Human Body Model (HBM) circuit is an engineered electrical setup designed to replicate the electrostatic discharge from a charged human body to an electronic device under test (DUT). It consists of a high-voltage source that charges a 100 pF capacitor, which is then discharged through a 1.5 kΩ resistor directly to the DUT pins or package leads.[6] As per the current ANSI/ESDA/JEDEC JS-001-2023 standard, this configuration ensures a controlled, repeatable discharge event to assess ESD vulnerability.[1] In modern HBM standards, a verifier circuit is incorporated to validate the tester's performance and waveform integrity. This verifier includes a 500 Ω load resistor connected across calibration points, allowing measurement of the discharge current to confirm compliance with specified parameters such as rise time and peak current.[6] The 500 Ω load simulates a typical device impedance and helps detect parasitic effects in the test system, ensuring fidelity to the HBM waveform.[1] The peak current in the HBM discharge can be approximated by the equation where is the voltage to which the 100 pF capacitor is charged (typically ranging from 100 V to 8 kV depending on the sensitivity class), and is the 1.5 kΩ resistor.[6] This initial current surge represents the instantaneous discharge at the moment of contact, providing a key metric for evaluating the circuit's output.[1]Human Body Simulation
The Human Body Model (HBM) in electrostatic discharge (ESD) testing simulates the electrostatic properties of the human body through empirically derived parameters that reflect typical physiological conditions during discharge events. The capacitance component of 100 pF serves as an approximation of the average human body capacitance to ground, based on measurements taken from the fingertip of a person in a standing position.[1] This value captures the body's ability to store charge relative to a grounded surface, accounting for the distributed capacitance of the torso, limbs, and extremities in an upright posture.[14] Variations in body size, posture, and environmental factors can lead to capacitances ranging from 50 pF to 250 pF, but 100 pF has been standardized as a representative average for ESD vulnerability assessment.[15] The resistance parameter of 1.5 kΩ models the contact resistance at the skin interface during discharge, particularly under dry skin conditions that represent a conservative scenario for ESD stress.[16] Skin resistance can fluctuate significantly with humidity levels—decreasing in moist environments due to enhanced conductivity and increasing in low-humidity settings—yet the 1.5 kΩ value is fixed to simulate worst-case dry conditions, where resistance is elevated but still allows for a realistic discharge current profile.[17] This standardization ensures the model emphasizes scenarios prone to higher charge accumulation and slower discharge rates, which can exacerbate damage to sensitive electronics. Physiologically, the HBM represents the scenario of a person who has accumulated electrostatic charge—often reaching 15-20 kV through everyday activities such as walking on carpet in low-humidity environments—discharging that charge via the fingertip to a grounded electronic device.[18] Such voltages arise from triboelectric charging between clothing, shoes, and flooring materials, with the body acting as a capacitor that stores the potential until contact initiates the spark.[19] These parameters are implemented in a simple RC circuit to replicate the discharge dynamics, as detailed in the Electrical Circuit section.Discharge Characteristics
Waveform Properties
The current waveform into the device under test (DUT) in the Human Body Model (HBM) is characterized by a double-exponential form, approximating the discharge dynamics of the equivalent circuit. Here, represents the initial charging voltage on the model capacitor, , ns corresponds to the slower decay time constant, and ns governs the rapid initial rise.[20] The rise time of this waveform, measured from 10% to 90% of the peak value, ranges from 2 to 10 ns, ensuring a fast onset that simulates abrupt human-induced discharge. The overall pulse duration extends to approximately 300 ns until the current decays to 1% of its peak, capturing the sustained energy delivery phase.[1] The energy in the HBM waveform arises predominantly from the capacitive discharge of the 100 pF storage element, with the total charge transferred quantified as , where pF and is the applied voltage.Current Pulse Profile
The current pulse profile in the Human Body Model (HBM) for electrostatic discharge (ESD) testing is defined by a rapid rise to a peak value followed by an exponential decay, simulating the discharge from a charged human body through a device under test (DUT). This profile is essential for evaluating the thermal and electrical stress imposed on semiconductor components during ESD events.[1] The peak current is calculated as , yielding approximately 0.67 A for a charging voltage of 1 kV, with a tolerance of ±10% to ensure waveform compliance in standardized testing.[1][21] The current decay is approximated by the equation , where and , resulting in a time constant ; the current typically reaches 50% of its peak value by approximately 150 ns, though the full waveform exhibits double-exponential characteristics with an overall decay width of 200 ns.[1][21][22] During testing, the current is monitored at the DUT pins using high-bandwidth current probes to verify that the applied pulse adheres to the specified profile and tolerances, particularly for the peak value and decay behavior.[1]Testing Procedure
Equipment and Setup
The equipment for Human Body Model (HBM) electrostatic discharge (ESD) testing consists of an ESD simulator featuring a 100 pF capacitor charged to the test voltage and discharged through a 1.5 kΩ resistor to mimic the human body's electrical characteristics.[23] This simulator includes a high-voltage relay to initiate the discharge and ensure precise timing, a current probe with a bandwidth of at least 200 MHz and rise time of ≤1 ns for capturing the pulse profile, and an oscilloscope with ≥350 MHz bandwidth and ≥1 GS/s sampling rate for waveform analysis and verification.[23] The device under test (DUT) is prepared by mounting it on a conductive test fixture board using sockets that minimize parasitic effects and ensure reliable pin connections.[23] All relevant pin combinations are stressed, with each non-supply pin zapped to all other pins while supply pins are grounded, and both positive and negative polarities applied to cover comprehensive discharge scenarios.[23] Prior to testing, the system undergoes calibration using a 500 Ω ±1% low-inductance resistor rated for at least 4000 V, connected across the probe terminals.[23] Pulses are applied at 1000 V and 4000 V, and the resulting waveform is measured to confirm parameters such as peak current (0.37–0.55 A at 1000 V and 1.5–2.2 A at 4000 V) and 10%–90% rise time (5–25 ns) fall within ±15% of the specified limits.[23] The HBM's 100 pF capacitance and 1.5 kΩ resistance parameters, as defined in the model components, are verified through this process.[23]Step-by-Step Methodology
The step-by-step methodology for conducting a Human Body Model (HBM) electrostatic discharge (ESD) test on a semiconductor device follows a structured sequence to apply controlled stresses and assess susceptibility, as defined in the ANSI/ESDA/JEDEC JS-001 standard. The process utilizes automated testing equipment to ensure repeatability, beginning with the preparation of the HBM circuit where a 100 pF capacitor is charged to the initial test voltage of 250 V through a high-voltage supply and a current-limiting resistor. Specific pin pairs are then selected for stressing, typically involving all input/output pins to ground (VSS) or power supply pins (VDD), with other pins configured as floating, tied to supplies, or grounded according to the standard's pin combination tables to cover relevant stress paths without redundancy.[24] For each selected pin pair, the charged capacitor discharges through the 1.5 kΩ series resistor directly to the stressed pin on the device under test (DUT), simulating the human body discharge path. This discharge is repeated for one pulse of positive polarity followed by one pulse of negative polarity, with a minimum 300 ms interval between pulses to allow device recovery and avoid cumulative heating effects. Following the pulses for a pin pair, the DUT is immediately inspected for functional failure via electrical testing, which includes DC parametric measurements such as input leakage currents, output voltages, and threshold levels, alongside comprehensive functional verification against the device's datasheet specifications.[1] If the DUT passes, the sequence proceeds to the next pin pair at the same voltage level; completion of all pairs without failure advances the test. Stress levels are escalated incrementally starting from 250 V, increasing by 500 V steps (to 500 V, 1000 V, 1500 V, 2000 V, 4000 V, and up to 8000 V if required), using three devices per level to account for variability, until either the target voltage is achieved or failure is observed in two or more devices at a given level. Upon detecting a failure during electrical testing, post-test evaluation intensifies with detailed parametric recharacterization to identify specific degraded parameters and microscopic analysis, including optical microscopy or scanning electron microscopy (SEM), to examine physical damage such as gate oxide breakdown, metallization voids, or junction disruptions.[26]Standards and Classifications
Governing Standards
The primary international and industry standards governing the Human Body Model (HBM) for electrostatic discharge (ESD) sensitivity testing are established by organizations such as the ESD Association (ESDA), JEDEC Solid State Technology Association, and the International Organization for Standardization (ISO) to ensure uniform procedures for component evaluation. These standards define the HBM circuit parameters, testing protocols, verification methods, and sensitivity classifications. The ANSI/ESDA/JEDEC JS-001-2024 standard, a joint effort by ESDA and JEDEC, provides the harmonized framework for HBM ESD sensitivity testing and classification at the component level. It supersedes previous standards such as ANSI/ESD STM5.1 and JEDEC JESD22-A114F, establishing procedural uniformity for device-level evaluations and supporting interoperability in the semiconductor industry.[27] This standard outlines requirements for ESD simulators, waveform verifiers, and calibration techniques to ensure accurate replication of human-body-induced discharges on electronic devices and maintain consistency across laboratories. In the automotive sector, ISO 10605:2023 addresses ESD testing for road vehicle electronic modules, incorporating HBM with adaptations such as modified discharge networks to account for vehicle-specific environmental factors like seating and component mounting. This standard ensures HBM-derived methods are tailored for automotive reliability without altering core HBM principles.[28]Sensitivity Classifications
The sensitivity of electronic components to electrostatic discharge (ESD) under the Human Body Model (HBM) is categorized into classes based on the highest voltage level at which the device withstands the test without functional degradation or damage, as specified in the ANSI/ESDA/JEDEC JS-001-2024 standard.[27] These classifications, detailed in Table 3 of the standard, provide a standardized framework for assessing ESD robustness and informing handling requirements.[1] Class 0 encompasses the most sensitive devices, while higher classes denote progressively greater tolerance to HBM pulses. The following table summarizes the HBM ESD component classification levels:| Classification | Voltage Range (V) |
|---|---|
| 0Z | < 50 |
| 0A | 50 to < 125 |
| 0B | 125 to < 250 |
| 1A | 250 to < 500 |
| 1B | 500 to < 1000 |
| 1C | 1000 to < 2000 |
| 2 | 2000 to < 4000 |
| 3A | 4000 to < 8000 |
| 3B | ≥ 8000 |
Applications and Limitations
Industrial Applications
The Human Body Model (HBM) plays a critical role in semiconductor qualification, serving as a mandatory reliability test for integrated circuits (ICs) in automotive and consumer electronics applications. In the automotive sector, AEC-Q100 qualification requires all ICs to undergo HBM electrostatic discharge (ESD) testing per the specified levels—typically 500 V, 1000 V, and 2000 V—to verify robustness against human-induced ESD events during manufacturing and use, ensuring compliance with stringent reliability standards.[31] For consumer electronics, HBM testing follows the ANSI/ESDA/JEDEC JS-001-2024 standard, which establishes procedures for classifying IC susceptibility to ESD damage, enabling manufacturers to certify devices for market deployment without performance degradation.[6] HBM results directly inform the integration of ESD protection mechanisms in IC design, particularly the placement of diodes and clamps to divert discharge currents and limit voltage spikes. Designers use HBM stress data to position these components near I/O pads, optimizing for low capacitance and rapid response. This approach has proven effective in enhancing overall circuit resilience. With recent updates to standards like JS-001-2024, HBM testing continues to adapt to advanced semiconductor nodes for reliable qualification.Limitations and Alternatives
While the Human Body Model (HBM) effectively simulates ESD events from human handling, it overestimates the discharge current in scenarios involving slower human body discharges, as the fixed 1.5 kΩ resistance in the HBM circuit assumes a lower impedance than the actual human body resistance, which can range from 500 Ω to 10 kΩ depending on skin moisture and contact conditions.[15] This discrepancy leads to a more severe test waveform than what might occur in real-world slow discharge events. Additionally, the HBM ignores faster ESD phenomena, such as those modeled by the Charged Device Model (CDM), where devices discharge rapidly upon contact with grounded surfaces, producing rise times under 1 ns that the HBM's slower 2–10 ns waveform cannot replicate.[1] Furthermore, the HBM is not representative of ESD risks in automated manufacturing environments, where human intervention is minimized and device self-discharge or machine-tool interactions predominate.[32] To address these gaps, alternative models like the Charged Device Model (CDM) have been developed to simulate device self-discharge events, characterized by faster discharge profiles with rise times of less than 1 ns and no series resistance, resulting in higher peak currents (up to several amperes) compared to HBM.[5] The CDM, standardized in ANSI/ESDA/JEDEC JS-002-2025, better captures ESD vulnerabilities in modern automated handling and assembly processes. Another alternative is the Machine Model (MM), which models ESD from tools or machines with low contact resistance (typically 0–5 Ω) and a smaller capacitance (200 pF), producing even sharper current pulses than HBM to represent industrial equipment-induced stresses.[5] Although the MM has been deprecated by JEDEC since 2009 in favor of CDM, it remains relevant for specific low-impedance scenarios. Industry trends reflect a growing emphasis on system-level ESD validation over isolated component testing like HBM, with the IEC 61000-4-2 standard gaining prominence for end-product assessment due to its simulation of real-world contact and air discharges in assembled systems, including higher energy levels and multiple strikes.[1] This shift, driven by the need to evaluate ESD robustness in operational environments, complements HBM by addressing interactions at the board or system level rather than individual devices, especially as advancements in technology lower device sensitivity thresholds to 20 V or below as of 2024.[33][34]References
- https://nepp.[nasa](/page/NASA).gov/docs/tasks/EEE-Parts-Bulletin/EEE-Parts-Bltn_2020Vol11-No2-201113-CL20-6000.pdf