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S3 Trio
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The S3 Trio range were popular video cards for personal computers and were S3's first fully integrated graphics accelerators. As the name implies, three previously separate components were now included in the same ASIC: the graphics core, RAMDAC and clock generator. The increased integration allowed a graphics card to be simpler than before and thus cheaper to produce.
Variants
[edit]The Trio64 and 64V+, first appeared in 1995, are essentially fully integrated solutions based upon the earlier Vision 864 and 868 accelerator chipsets. Like the 868, the 64V+ has a video acceleration engine that can perform YUV to RGB color space conversion and horizontal linear filtered scaling. Unlike the Vision964/968, the Trio chips do not support VRAM, and are limited to FPM DRAM and EDO DRAM only. The 2D graphics hardware was later used in the ViRGE.
The Trio32 is a low-cost version of the Trio64 with a narrower 32-bit DRAM interface (vs. 64-bit).
The Trio64V2 improved on the 64V+ by including vertical bilinear filtering. The 2D graphics core was later used in the ViRGE/DX and ViRGE/GX. Like the corresponding ViRGE chips, the 64V2 also came in /DX and /GX variants, with the latter supporting more modern SDRAM or SGRAM. The final version, called the Trio3D, was effectively the 128-bit successor to the ViRGE/GX2.
The various Trio chips were used on many motherboards. Because of the popularity of the series and the resulting compatibility advantages, they are used in various PC emulation and virtualization packages such as DOSBox, Microsoft Virtual PC, PCem and 86Box.
Specifications
[edit]- Motherboard interface: VLB, PCI, AGP (Trio3D only)
- Video Connector: 15-pin VGA connector
- VRAM: 1 to 2 megabyte of FPM/EDO DRAM (for the 2D cards)
External links
[edit]S3 Trio
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Introduction
Overview
The S3 Trio is a family of 2D graphics accelerator chips, with later extensions incorporating 3D capabilities, developed and produced by S3 Graphics from 1994 to 1998.[3] These chips represented a significant advancement in PC graphics hardware, debuting with the Trio64 in 1994 and evolving through models like the Trio3D by 1998, targeting the growing demand for efficient visual processing in personal computing.[3] Primarily designed for accelerating graphical user interfaces (GUIs) and basic multimedia tasks, the series became a staple in entry-level systems during the mid-1990s Windows era.[4] A key innovation of the S3 Trio family was its status as the first fully integrated application-specific integrated circuit (ASIC) to combine the graphics core, random access memory digital-to-analog converter (RAMDAC), and clock generator on a single chip.[3] This integration reduced manufacturing complexity and costs for graphics card vendors, facilitating broader adoption in consumer hardware by minimizing the need for multiple discrete components.[1] Building on the foundational S3 Vision 864 and 868 architectures, which provided earlier 2D acceleration, the Trio series optimized these designs for higher efficiency and compatibility with emerging PC standards like PCI buses.[3] The primary target market for the S3 Trio was budget-oriented personal computers, where it excelled in accelerating Windows-based GUIs and supporting rudimentary multimedia features such as video playback.[4] By offering cost-effective performance without the overhead of premium 3D-focused competitors, the family enabled widespread integration into OEM systems and add-in cards from manufacturers like STB and Diamond Multimedia.[3] Later iterations introduced limited 3D extensions, but the core emphasis remained on accessible 2D acceleration for everyday computing needs.[1]Development History
S3 Graphics was founded in January 1989 as a fabless semiconductor company specializing in PC graphics accelerators, established by Dado Banatao and Ronald Yara to address performance bottlenecks in PC architecture during the transition from text-based to graphical user interfaces.[2][5] The company initially focused on developing single-chip solutions for SuperVGA GUI acceleration, releasing its first product, the 86C911 chip, in mid-1991, which provided 16/256-color and high-color support for emerging Windows environments.[2][6] This was followed by the 86C924 in early 1993, enhancing true-color capabilities, and the Vision series, including the 86C864 (Vision864) in 1992 and the 86C868 (Vision868) in 1994, which introduced 64-bit framebuffers and MPEG-1 video acceleration but relied on modular designs combining separate graphics cores, RAMDACs, and clock generators, leading to higher costs and complexity for manufacturers.[3][7] The development of the Trio family was motivated by the explosive growth of Windows 3.x and the impending Windows 95, which increased demand for affordable 2D GUI acceleration to handle bitmapped graphics and multitasking efficiently, positioning S3 to compete directly with rivals like Cirrus Logic's GD54xx series and Chips & Technologies' accelerated chips in the budget-to-midrange PC market.[1][8] Prioritizing integration to reduce component count and costs, S3 aimed to deliver cost-effective cards suitable for original equipment manufacturers (OEMs) building consumer PCs, shifting from the Vision series' multi-chip approach to a unified ASIC design.[7] Key milestones in the Trio's development began with the announcement of the Trio64 (86C764) in late 1994, S3's first fully integrated 64-bit 2D accelerator incorporating a graphics core, RAMDAC, and clock generator on a single chip, supporting VLB and PCI buses.[7] This was followed by the Trio64V+ (86C765) in mid-1995, which added multimedia extensions like hardware YUV-to-RGB conversion for video playback.[7][9] The lineup progressed with the Trio64V2 (86C775) in 1996, refining 2D performance, still on PCI.[7] Culminating the initial 2D-focused evolution, the Trio3D (86C365) arrived in late 1997, marking S3's entry into consumer 3D with basic Direct3D support and the adoption of the AGP bus for improved bandwidth.[7][10] Internally, the Trio series reused the proven 2D acceleration engine from the Vision chips, leveraging existing intellectual property for line drawing, polygon filling, and bit-block transfers to accelerate development while focusing innovations on integration and bus compatibility, starting with VLB and PCI before transitioning to AGP in later models.[11] One notable challenge was the early lack of VRAM support, restricting the chips to slower FPM and EDO DRAM interfaces, which was partially mitigated in advanced variants through optimized DRAM controllers but limited high-refresh-rate performance compared to VRAM-equipped competitors.[7]Technical Architecture
Core Components
The S3 Trio family features a highly integrated ASIC design that combines a 2D graphics engine, a 24-bit true-color RAMDAC capable of dot clocks from 135 MHz in early models to up to 220 MHz in later variants, and a programmable clock generator into a single chip, enabling compact and cost-effective graphics solutions suitable for both add-in cards and motherboard integration.[12][3] This single-chip architecture reduces component count and board space while supporting efficient video output and timing control.[12] Bus interfaces in the S3 Trio chips include support for VLB in early models and PCI in most implementations as 32-bit host buses; the Trio3D variant introduces AGP 1x compatibility for improved system memory access. The internal memory interface supports 64-bit data paths in configurations of early models.[12][3] These interfaces facilitate direct connection to the host CPU bus, allowing for high-bandwidth data transfer in 2D acceleration tasks. The memory controller provides a 64-bit interface in early models optimized for FPM or EDO DRAM, with capacities ranging from 1 MB to 4 MB for frame buffer and texture storage; while early models rely on standard DRAM without native VRAM support, later variants like the Trio3D incorporate a 128-bit interface with compatibility for SGRAM and SDRAM to enhance performance in graphics-intensive applications.[12][3] This controller handles efficient memory arbitration between the graphics engine and display output, minimizing latency in rendering operations. At the heart of the pixel processing pipeline is a hardware blitter for bit-block transfers, line drawing, and polygon fill capabilities, with core clock speeds progressing from approximately 40-50 MHz in initial chips to 66-100 MHz in advanced models, enabling accelerated 2D operations such as screen-to-screen copies and vector graphics.[12][3] Fabricated on process nodes ranging from 0.8 microns in early implementations to 0.35 microns in later ones, the S3 Trio chips exhibit low power consumption of 1.5-5 W, making them ideal for energy-efficient designs in integrated motherboard graphics.[12][3] This combination of shrinking process technology and optimized power management contributed to their widespread adoption in mid-1990s personal computers.Graphics Capabilities
The S3 Trio series provided robust 2D acceleration tailored for graphical user interface (GUI) operations, including hardware support for bitmap-to-screen blits using BitBLT commands with raster operation (ROP) mixes such as source copy, XOR, AND, and OR.[12] These chips also accelerated pattern fills with programmable 8x8 pixel patterns stored in off-screen memory and vector drawing through short stroke vectors (up to 15 pixels) and polylines.[12] Optimized for Windows 3.1 and 95 GDI acceleration, the accelerators handled 2-point line draws via Bresenham algorithms and trapezoidal polygon fills, enhancing performance for rectangle fills and clipped GUI elements.[12] Multimedia enhancements in the S3 Trio lineup, particularly the V+ models, included YUV-to-RGB color space conversion via the S3 Streams Processor for efficient video data handling.[13] These chips supported MPEG-1 playback through hardware-assisted decoding compatibility with external processors like the S3 Scenic/MX2, enabling smooth full-motion video.[13] Hardware scaling with linear interpolation allowed arbitrary resizing of video streams up to 1024x768 at 16 bits per pixel, while overlay planes facilitated blending of secondary YUV or RGB streams onto primary graphics with chroma keying and double-buffering for tear-free display.[13] Filtering and effects capabilities evolved across variants, with the Trio64V2 introducing vertical bilinear filtering to improve image resizing quality in video and 2D operations beyond the horizontal filtering of prior models.[3] The introduction of 3D features came with the Trio3D variant, offering basic support for Direct3D 5.0 and OpenGL 1.1 through driver implementations.[14] Key functionalities included texture mapping with perspective correction and bilinear filtering, Z-buffering for depth handling, and alpha blending for transparency effects, though limited to 16-bit color depth.[14] Output capabilities supported true-color (24-bit) display modes, achieving resolutions up to 1600x1200 with high-end external DACs in certain configurations.[15] Some setups incorporated TV-out via external DACs for analog video output, compatible with NTSC/PAL standards at reduced resolutions like 640x480.[16]Variants
Initial Releases
The S3 Trio family debuted with the Trio64 (86C764) in late 1994, marking S3's shift toward highly integrated, cost-effective graphics solutions for mainstream PCs. Announced in September 1994 and first appearing in add-in cards like the STB PowerGraph 64 PCI by December of that year, the Trio64 featured a 64-bit DRAM interface configurable for 1, 2, or 4 MB of memory, a core clock around 45-50 MHz, and support for both VLB and PCI buses.[7][12] It provided basic 2D acceleration capabilities, including hardware support for BitBLTs, line draws, polygon fills, and a 64x64 hardware cursor, but omitted multimedia features to prioritize affordability and integration of components like the RAMDAC and clock synthesizer on a single chip.[12] Building incrementally on S3's prior Vision864 and 868 accelerators, the Trio64 emphasized reduced manufacturing costs through its all-in-one design while maintaining VGA compatibility and enhanced 2D performance for Windows environments.[12] This focus on integration made it suitable for OEM implementations in entry-level systems. In mid-1995, the Trio64V+ (86C765) followed as an enhanced variant, introducing hardware YUV to RGB color space conversion and horizontal linear filtered scaling via its Streams Processor to support basic video overlay and playback.[17] Retaining a similar 50 MHz core clock and DRAM interface to the Trio64, it supported up to 4 MB of memory in PCI configurations and became a common choice for integrated graphics in budget PCs due to its improved multimedia handling without venturing into 3D.[17] The Trio32 (86C732), launched in early 1995, served as a low-end counterpart with a 32-bit DRAM bus limited to 1-2 MB of memory, targeting slower entry-level OEM motherboards.[12][18] Like its siblings, it focused solely on 2D acceleration and cost reduction, sharing the same integrated architecture but with narrower bandwidth for basic GUI tasks. Across these initial models, the emphasis remained on 2D-only functionality without 3D support or advanced filtering, enabling widespread early adoption in affordable consumer systems such as Compaq Presario series PCs.[7]Advanced Models
The S3 Trio64V2, released in 1996 and based on the 86C775 chipset, represented an incremental upgrade over earlier 2D-focused models by incorporating vertical bilinear filtering to enhance video upscaling quality, particularly for multimedia applications. This feature allowed for smoother interpolation during vertical stretching of video content, improving playback clarity on displays. The card supported 2 to 4 MB of memory and came in subvariants: the /DX version, which added compatibility with SDRAM for faster access times compared to traditional DRAM, and the /GX variant, which utilized SGRAM and operated at a 66 MHz core clock for better bandwidth efficiency in graphics-intensive tasks.[7][3] In late 1997, S3 introduced the Trio3D (86C365), marking the series' shift toward hybrid 2D/3D acceleration with a 128-bit architecture that integrated a dedicated 3D engine alongside robust 2D capabilities. Standard configurations included 4 MB of SGRAM, an AGP 1x interface for improved data transfer over PCI, and support for advanced rendering effects such as subtractive blending, which enabled more realistic lighting simulations in early 3D scenes. The design emphasized multimedia enhancements, including hardware-accelerated video processing via the Video Interface Port (VIP), making it suitable for emerging applications in Windows 98 environments.[7][14][19] The Trio3D/2X, a 1999 refresh using the 86C368 chipset, built on its predecessor by introducing dual-texture processing capabilities—effectively doubling texture units for modest gains in 3D throughput—and a 100 MHz memory clock to handle higher-resolution textures more efficiently. It maintained backward compatibility with PCI buses while adding AGP 2x support, allowing for up to 8 MB of memory in some implementations, and focused on refining DirectX compatibility for early games like those under DirectX 5. This model prioritized cost-effective 3D entry for budget systems, though its single-pixel pipeline limited it to basic polygon rendering.[7][14][19] Overall, these advanced models signified S3's transition from pure 2D accelerators to hybrid solutions, integrating 3D engines to address the growing demand for immersive graphics in Windows 98 and initial DirectX titles, while retaining strong multimedia and video acceleration roots.[7][14]Performance and Specifications
Hardware Specifications
The S3 Trio family of graphics accelerators featured memory configurations ranging from 1 MB to 2 MB of FPM or EDO DRAM in the Trio32, and up to 4 MB in early models like the Trio64, expanding to up to 4 MB in variants such as the Trio64V+ and Trio3D, and reaching 8 MB of SDRAM or SGRAM in the Trio3D/2X.[20][12][21] Memory bandwidth varied by model and clock speed, achieving 400–528 MB/s in early configurations with 64-bit interfaces at 50–66 MHz, and up to 800 MB/s in later models like the Trio3D/2X operating at 100 MHz.[21] All models supported 24-bit color depth through an integrated RAMDAC.[20][12] Display outputs were standardized with a 15-pin VGA analog connector across the series, enabling maximum 2D resolutions of 1600×1200 at 60 Hz and 3D resolutions up to 1024×768 at 60 Hz, depending on memory size and mode.[20][21] Bus interfaces included VLB and PCI 2.0 at 33 MHz for initial releases, with advanced models like the Trio3D adding AGP 1x at 66 MHz or AGP 2x at 133 MHz.[12][21] Power consumption remained low at up to 2 W for the chip, contributing to typical add-in card dimensions of approximately 150×100 mm in PCI or AGP form factors.[12] The following table compares key specifications across representative models:| Model | Core Clock (MHz) | Memory Type/Size | Bus Interface | Max 2D Fill Rate (Mpixels/s) | Max 3D Fill Rate (Mpixels/s) |
|---|---|---|---|---|---|
| Trio64 | 135 | FPM/EDO, 1–4 MB | VLB/PCI 2.0 (33) | 135 | N/A |
| Trio64V+ | 135 | FPM/EDO, 1–4 MB | VLB/PCI 2.0 (33) | 135 | N/A |
| Trio3D | 100 | EDO/SGRAM, 2–4 MB | PCI 2.0 (33)/AGP 1x (66) | 230 | 50 |
| Trio3D/2X | 100 | SDRAM, 4–8 MB | PCI 2.0 (33)/AGP 2x (133) | 230 | 100 |