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Universal Software Radio Peripheral
Universal Software Radio Peripheral
Universal Software Radio Peripheral
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A rev 3 USRP1 platform, serial #140, with an attached TVRX daughterboard

Universal Software Radio Peripheral (USRP) is a range of software-defined radios designed and sold by Ettus Research and its parent company, National Instruments. Developed by a team led by Matt Ettus, the USRP product family is commonly used by research labs, universities, and hobbyists.[1]

Most USRPs connect to a host computer through a high-speed link, which the host-based software uses to control the USRP hardware and transmit/receive data. Some USRP models also integrate the general functionality of a host computer with an embedded processor that allows the USRP device to operate in a stand-alone fashion.

The USRP family was designed for accessibility, and many of the products are open source hardware. The board schematics for select USRP models are freely available for download; all USRP products are controlled with the open source UHD driver, which is free and open source software.[2] USRPs are commonly used with the GNU Radio software suite to create complex software-defined radio systems.

Design

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The USRP product family includes a variety of models that use a similar architecture. A motherboard provides the following subsystems: clock generation and synchronization, FPGA, ADCs, DACs, host processor interface, and power regulation. These are the basic components that are required for baseband processing of signals. A modular front-end, called a daughterboard, is used for analog operations such as up/down-conversion, filtering, and other signal conditioning. This modularity permits the USRP to serve applications that operate between DC and 6 GHz.

In stock configuration the FPGA performs several DSP operations, which ultimately provide translation from real signals in the analog domain to lower-rate, complex, baseband signals in the digital domain. In most use-cases, these complex samples are transferred to/from applications running on a host processor, which perform DSP operations. The code for the FPGA is open-source and can be modified to allow high-speed, low-latency operations to occur in the FPGA.

Software

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The USRP hardware driver (UHD) is the device driver provided by Ettus Research for use with the USRP product family.[3] It supports Linux, MacOS, and Windows platforms. Several frameworks including GNU Radio, LabVIEW, MATLAB and Simulink use UHD. The functionality provided by UHD can also be accessed directly with the UHD API, which provides native support for C++. Any other language that can import C++ functions can also use UHD. This is accomplished in Python through SWIG, for example.

UHD provides portability across the USRP product family. Applications developed for a specific USRP model will support other USRP models if proper consideration is given to sample rates and other parameters.

Several software frameworks support UHD:

  • GNU Radio is a Free/Libre toolkit that can be used to develop software-defined radios. This framework uses a combination of C++ and Python to optimize DSP performance while providing an easy-to-use application programming environment. GNU Radio Companion is a graphical programming environment provided with GNU Radio.[4]
  • National Instruments sells the NI USRP 292x series, which is functionally equivalent to the Ettus Research USRP N210. NI also offers LabVIEW support for this device with the NI-USRP Driver.[5]
  • USRP N210 and USRP2 are supported by MATLAB and Simulink.[6] This package includes plug-ins and several examples for use with both the devices.
  • OpenLTE is an open source implementation of the 3GPP LTE specifications as a SDR.[7][circular reference]
  • Many users develop with their own, custom frameworks. In this case, the USRP device can be accessed with the UHD API.[8] There are also examples provided with UHD that show how to use the API.[9]

Products

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Networked series

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The USRP N200 and USRP N210 are high-performance USRP devices that provide higher dynamic range and higher bandwidth than the bus series. Using a Gigabit Ethernet interface, the devices in the Networked Series can transfer up to 50 MS/s of complex, baseband samples to/from the host. This series uses a dual, 14-bit, 100 MS/s ADC and dual 16-bit, 400 MS/s DAC. This series also provides a MIMO expansion port which can be used to synchronize two devices from this series. This is the recommended solution for MIMO systems.

The X300 and X310 are third-generation USRPs that feature two full-duplex daughterboard slots and feature full 200 MS/s DACs and ADCs. As network interface, 10GBase over SFP+ allows full 200 MS/s on both channels in full-duplex operation.

The N300, N310, N320 and N321 are current dual-channel models offering SFP+ connectivity, up to 200 MS/s and optionally sharing of local oscillators and TPM modules for verifiable software deployments.

Bus series

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All products in Ettus Research Bus Series use a USB 2.0 or USB 3.0 interface to transfer samples to and from the host computer. Models include the USRP B206mini-i, B205mini-i, B200mini-i, and B200mini.[10] Board-only versions without the outer protective case are also available.

Embedded series

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The Embedded Series combines the same functionality of other USRP devices with an OMAP 3 embedded processor. The E310, released in November 2014, utilizes the Zynq SoC platform and the Analog Devices AD9361 RFIC for a very compact, embedded USRP. The devices in this family do not need to be connected to an external PC for operation. The Embedded Series is designed for applications that require stand-alone operation.

Discontinued models

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The USRP2 was developed after the USRP and was first made available in September 2008. It has reached end of life and has been replaced by the USRP N200 and USRP N210. The USRP2 was not intended to replace the original USRP, which continued to be sold in parallel to the USRP2. This first generation USRP is also no longer available publicly.

The E100 series of embedded USRPs is no longer available.

Daughterboard modules

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Basic RX and Basic TX daughterboards

The original USRP, USRP2, USRP E1xx, USRP N2xx and X3xx families feature a modular architecture with interchangeable daughterboard modules that serve as the RF front end. Several classes of daughterboard modules exist: Receivers, Transmitters and Transceivers.

  • Transmitter daughterboard modules can modulate an output signal to a higher frequency
  • Receiver daughterboard modules can acquire an RF signal and convert it to baseband
  • Transceiver daughterboard modules combine the functionality of a Transmitter and Receiver.

The USRP B2xx and E3xx do not feature exchangeable daughterboards. The N3xx series has a JESD204B-attached daughterboard featuring the AD9371 frontend, but currently, no alternative daughterboards are commercially available.

See also

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References

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Revisions and contributorsEdit on WikipediaRead on Wikipedia

Universal Software Radio Peripheral

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from Grokipedia
The Universal Software Radio Peripheral (USRP) is a family of software-defined radio (SDR) hardware platforms developed by Ettus Research, an NI () brand, serving as tunable transceivers that combine processors, field-programmable gate arrays (FPGAs), and (RF) front-ends to enable the design, prototyping, and deployment of wireless communication systems across frequencies from DC to 8 GHz. Invented by Matt Ettus in 2004 as a personal project inspired by his involvement in the GNU Radio open-source initiative, the USRP originated from efforts to lower barriers to SDR experimentation, initially funded by the through the ; this led to the founding of Ettus Research and the commercial release of the first USRP1 model in 2005, which featured a with daughterboard interfaces for customizable RF capabilities. By , Ettus Research was acquired by , expanding the platform's integration with tools like for accelerated development, and subsequent milestones included the introduction of RFNoC (RF Network-on-Chip) architecture in 2014 to simplify FPGA-based signal processing extensions. Key features of the USRP family include support for wide instantaneous bandwidths up to 1.6 GHz per channel, multi-channel (multiple-input multiple-output) configurations ranging from 2x2 to 8x8, and synchronization options such as GPS-disciplined oscillators (GPSDO) and Ethernet for precise timing in distributed systems. Models vary by form factor and performance, such as the compact USB-powered USRP-2901 (70 MHz–6 GHz, 56 MHz bandwidth, 2x2 ) for portable applications and the high-end USRP X440 (30 MHz–4 GHz, 1.6 GHz bandwidth, 8x8 with RFSoC integration) for advanced prototyping. Programming flexibility is provided through open-source drivers like UHD (USRP Hardware Driver), compatibility with , , and Python, as well as graphical environments like for rapid algorithm deployment without deep hardware expertise. The USRP has become a for labs, universities, and industry, powering applications in wireless communications (e.g., LTE, , and testbeds), electronic warfare (EW), (SIGINT), radar systems, spectrum monitoring, and even hobbyist projects like and . Its low-cost, open architecture has democratized SDR, enabling innovations such as massive demonstrations and drone defense solutions while supporting global deployments in rugged, weatherproof enclosures for field use.

Overview

Definition and Purpose

The Universal Software Radio Peripheral (USRP) is a family of open-source, modular hardware platforms designed for (SDR) applications, developed by Ettus Research to interface analog (RF) signals with digital processing systems. It functions as a tunable peripheral that connects to host computers or embedded systems through high-speed interfaces like USB, Ethernet, or , enabling the conversion of RF signals into digital data streams for software-based manipulation. This architecture allows users to perform tasks such as signal reception, transmission, modulation, and in a flexible, reconfigurable manner without relying on fixed hardware implementations. Originating as a project led by Matt Ettus in 2004, the USRP was created to lower the for SDR experimentation by providing an affordable alternative to expensive, proprietary military-grade equipment. Its primary purpose is to democratize access to SDR technology, offering cost-effective hardware for prototyping and deploying communication systems across a broad frequency spectrum from DC to 8 GHz. By supporting modular daughterboards for various RF front-ends, the USRP enables rapid reconfiguration for diverse applications, from research in protocols to educational demonstrations of radio principles. At its core, the USRP shifts traditional RF functionality—such as filtering, amplification, and frequency synthesis—from dedicated hardware circuits to software algorithms running on general-purpose processors, thereby allowing real-time adaptability without the need for custom application-specific integrated circuits (). This software-centric approach facilitates innovation in fields like and spectrum sensing, where dynamic adjustments to are essential, while maintaining compatibility with ecosystems for broader accessibility.

Key Features

The Universal Software Radio Peripheral (USRP) incorporates FPGA-based digital processing to enable real-time and customization directly on the device, supporting high-throughput operations in applications. This architecture allows users to implement digital downconverters, upconverters, and other DSP functions on the programmable FPGA fabric, with recent models integrating RFSoC for enhanced performance. USRP devices feature high-resolution analog-to-digital (ADC) and digital-to-analog (DAC) converters, typically offering 12-16 bit resolution for precise signal capture and generation. Sample rates reach up to 2 GS/s across various series, enabling bandwidths suitable for RF signals, while coverage extends up to 8 GHz to support diverse protocols and systems. Modularity is achieved through interchangeable daughterboards that configure the device for receive (RX), transmit (TX), or operations, allowing adaptation to specific RF front-end requirements without hardware redesign. The FPGA implementation utilizes open-source code in or , facilitating user modifications and extensions. The RFNoC (RF Network-on-Chip) framework further enhances this by providing a modular for integrating custom FPGA blocks into the signal processing chain, promoting reusability and . Connectivity options include for portable setups, Gigabit or 10G Ethernet for high-speed data transfer, and standalone embedded modes for deployed systems. USRP hardware emphasizes power efficiency with low size, weight, power, and cost (SWaP-C) designs, alongside form factors ranging from credit-card-sized boards for embedded use to rack-mountable units for scalable deployments.

History

Founding and Early Development

The Universal Software Radio Peripheral (USRP) originated from the efforts of Matt Ettus, who founded Ettus Research in August 2004 as a self-funded venture initially supported by a grant through the . This endeavor began as a garage-based project stemming from Ettus's hobbyist interests in radio technology dating back to 2001, when he joined the emerging open-source software project. The primary motivation was to democratize (SDR) development by creating low-cost hardware that could complement , enabling experimentation, education, and research in RF without the prohibitive expenses associated with or military-grade systems. At the time, traditional SDR platforms often exceeded tens of thousands of dollars, limiting access to well-resourced institutions. The first USRP device, known as USRP1, was released in 2005, marking a pivotal milestone in affordable SDR hardware. Priced at approximately $700 to $1,000 including basic daughterboards, it featured a USB 2.0 interface for host connectivity, an onboard FPGA for , and support for modular daughterboards that allowed flexibility in frequency ranges and transceiver configurations. This design emphasized openness and extensibility, with the FPGA handling tasks like digital downconversion and the daughterboards enabling coverage from DC to 6 GHz depending on the selected modules. Early adoption was driven by its integration with , fostering initial collaborations within the open-source community and academic laboratories for prototyping systems and validating SDR concepts. A key advancement came in 2008 with the release of USRP2, which addressed bandwidth limitations of the original model by introducing a interface for higher data throughput and an upgraded Spartan-3 XC3S2000 FPGA with significantly more logic resources. This supported up to 100 MS/s sampling rates and 25 MHz of RF bandwidth at 16-bit resolution, enhancing real-time processing capabilities while maintaining the modular daughterboard . These developments solidified USRP's role in promoting accessible RF through ongoing ties with the GNU Radio ecosystem.

Acquisition and Evolution

Following the acquisition of Ettus Research by (NI) on February 5, 2010, the Universal Software Radio Peripheral (USRP) platform was integrated into NI's broader test and measurement portfolio, enabling expanded resources for development and distribution. This move leveraged NI's established infrastructure to support the growing demand for (SDR) solutions in research and industry applications. Post-acquisition, the USRP evolved through enhanced manufacturing processes and deeper software integrations, such as compatibility with NI's environment via the NI-USRP driver, which facilitated graphical programming for SDR prototyping. Product expansions included the release of the X300 and X310 series in early 2014, introducing high-performance, modular designs with connectivity for advanced wireless research. In the 2020s, the N3xx series, starting with the N310 in March 2018, brought networked capabilities with SFP+ interfaces, supporting fault-tolerant deployments in distributed systems up to 100 MHz bandwidth per channel. More recent advancements encompassed NI-USRP driver updates in the fourth quarter of 2024, improving compatibility with Ettus-branded hardware like the X410 for FPGA-based projects, and the announcement of the compact USB-powered B206mini-i in September 2025, targeting 70 MHz to 6 GHz applications in a business-card-sized form factor. These developments have boosted enterprise adoption by aligning USRP with NI's commercial tools for scalable testing, while preserving the open-source ethos through continued support for the UHD driver under GPLv3 licensing and the Ettus brand. However, NI has navigated challenges in balancing hobbyist accessibility—via affordable, modular Ettus offerings—with commercial scalability demands, such as preassembled NI variants for enterprise integration. This dual approach has sustained the platform's versatility across academic, open-source communities, and industrial sectors.

Design Principles

Overall Architecture

The Universal Software Radio Peripheral (USRP) features a modular that integrates a host computer or embedded processor with the USRP through high-speed interfaces such as USB or Ethernet. The serves as the central hub, incorporating digital up/down conversion capabilities and an FPGA for initial , while interchangeable daughterboards handle (RF) front-end functions. This design enables flexible reconfiguration for diverse applications, from prototyping to deployment, by separating analog RF handling from digital processing. In the receive data flow, RF signals are captured by the daughterboards, where they undergo amplification, downconversion, and filtering before being digitized via high-speed analog-to-digital converters (ADCs). The resulting digital samples are processed in the FPGA for tasks like digital downconversion (DDC), decimation, and formatting, then streamed to the host via the interface for advanced software-defined processing. Conversely, for transmission, the host generates in-phase and quadrature (I/Q) samples, which are sent to the FPGA for upconversion, , and digital-to-analog conversion (DAC), followed by analog upconversion and amplification in the daughterboards for RF output. This bidirectional flow ensures efficient handling of signals while minimizing latency in the critical path. Clocking and are critical for multi-device operations, with USRP systems supporting an external 10 MHz reference clock input to maintain phase coherence across units. This reference synchronizes sample clocks and local oscillators, enabling applications like and . Optional GPS-disciplined oscillators (GPSDO) provide a stable 10 MHz output along with a 1 pulse per second (PPS) signal, achieving timing accuracy of ±50 ns for geographically distributed setups. The FPGA, a Xilinx FPGA such as a Kintex-series device in certain networked models, plays a pivotal role in real-time , managing high sample rates up to hundreds of MS/s to filter and condition data before host transfer. It offloads the host from bandwidth-intensive operations, allowing the general-purpose processor to focus on complex algorithms like modulation or error correction. FPGA customization is supported via the RFNoC framework for modular DSP blocks. Across series, the bus variants prioritize low-latency USB connections for direct host integration, while networked variants leverage Ethernet for scalable, high-throughput data transfer in distributed environments.

Core Components

The core of the Universal Software Radio Peripheral (USRP) lies in its , which integrates key digital and analog processing elements to enable flexible signal handling. At the heart is a programmable (FPGA), such as the Spartan-6 in certain bus-connected models or the Zynq system-on-chip (SoC) in embedded variants, responsible for real-time tasks like decimation, , and custom logic implementation. High-speed analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) form another essential part, exemplified by 12-bit ADCs sampling at up to 61.44 MS/s in integrated RF models, converting analog signals to digital for FPGA processing and vice versa. Connectivity to host systems is provided through interfaces like controllers in bus series or Ethernet controllers supporting gigabit or 10-gigabit speeds in networked models, facilitating data transfer rates sufficient for wideband applications. The on the USRP supports either directly or in conjunction with modular expansions, incorporating local oscillators for frequency synthesis, mixers for up- and down-conversion, and low-noise amplifiers for receive paths along with power amplifiers for transmit. These elements enable tunable operation across broad frequency ranges, typically from tens of MHz to several GHz, with integrated or external filtering to mitigate and ensure signal integrity during digitization. In designs with onboard transceivers, such as those using AD9361 chips, the RF chain provides and direct conversion architecture for efficient interfacing. Power management in USRP motherboards accommodates various deployment scenarios through DC supply options, including USB-powered operation for portable units or external adapters delivering 6-12 V for higher-power configurations. High-performance models incorporate heat sinks and optional fan connectors to dissipate thermal load from the FPGA and RF components during sustained operation at maximum sample rates. A defining feature of the USRP platform is its design, particularly the FPGA implementation provided in , which allows users to modify gate-level logic for custom blocks such as digital filters, modulators, or error correction encoders. This code, hosted in the official repository, supports integration of user-defined RF Network-on-Chip (RFNoC) blocks for accelerated processing. Expansion capabilities on the motherboard include (GPIO) pins for external control signals, ports for precision timing via pulse-per-second (PPS) or 10 MHz reference clocks, and onboard buffers optimized for (DMA) transfers to minimize latency in data streaming. These features enable multi-device coordination and interfacing with auxiliary hardware. The motherboard also supports daughterboard integration through standardized slots for RF front-end customization.

Software Ecosystem

Drivers and APIs

The USRP Hardware Driver (UHD) serves as the foundational cross-platform library for interacting with USRP hardware, enabling device discovery, configuration, and high-performance data streaming across , Windows, and macOS operating systems. Developed by Ettus Research and now maintained by , UHD provides a unified that abstracts hardware-specific details, allowing developers to control USRP devices without deep knowledge of underlying transport protocols like USB, Ethernet, or PCIe. Since its introduction in 2007, UHD has evolved into the standard driver for the entire USRP product family, supporting seamless integration in research, prototyping, and deployment scenarios. At its core, UHD is implemented in C++ for optimal performance, with Python bindings generated using PyBind11 to facilitate scripting and . Key functions include stream setup via the uhd::usrp::multi_usrp class for initializing transmit/receive chains, gain control through methods like set_rx_gain() and set_tx_gain(), frequency tuning with set_rx_freq() and set_tx_freq(), and precise timestamping for synchronized operations using time specifiers. These features ensure low-latency data handling, with support for streaming rates up to hundreds of MS/s depending on the hardware. The also incorporates error handling mechanisms, such as exception-based reporting for issues like device timeouts or invalid configurations, promoting robust application development. Installation of UHD typically involves binary packages for ease or building from source for customization. Binary installers are available for major distributions and operating systems, while source builds require dependencies including Boost libraries for threading and filesystem operations, libusb for USB-based devices, and optionally for configuration. Versioning follows semantic guidelines, with major releases like UHD 4.x aligned to support advanced hardware series such as the N3xx networked devices, ensuring where possible. Post-installation, tools like uhd_usrp_probe allow verification of device connectivity, loading, and diagnostic reporting, helping users troubleshoot issues such as unrecognized hardware or streaming errors. Recent updates in UHD 4.9.0.0, released in September 2025, enhance compatibility with Ettus-NI hardware through support for new devices like the USRP B206mini-i and OBX daughterboards, alongside improvements in multi-device synchronization via RFNoC extensions for distributed streaming scenarios. These changes, including fixes for session management in X410 devices and new GPS interface features for X3x0 series, bolster reliability in complex, multi-USRP deployments without disrupting existing codebases.

Compatible Frameworks

The Universal Software Radio Peripheral (USRP) integrates seamlessly with , an open-source framework that has served as a primary companion tool for USRP development since its early iterations around 2005. provides dedicated blocks such as the USRP Source and , which enable real-time through flowgraphs that connect USRP hardware to modular components for tasks like modulation, filtering, and . This integration leverages the USRP Hardware Driver (UHD) for device control, allowing users to build complex radio systems without . National Instruments (NI) offers as a graphical programming environment tailored for USRP, featuring modules that simplify system design, multi-rate , and automated testing workflows. The NI-USRP software package includes LabVIEW-specific APIs and example VIs (Virtual Instruments) for applications like signal generation, acquisition, and FPGA reconfiguration on compatible USRP models. These tools support drag-and-drop development, enabling rapid prototyping of wireless systems with built-in support for conversion and hardware timing synchronization. Additional frameworks extend USRP capabilities for specialized prototyping and simulation. MATLAB and Simulink provide toolboxes that facilitate simulation-to-hardware workflows, allowing users to design single-input single-output (SISO) or multiple-input multiple-output (MIMO) systems and deploy them directly to USRP devices via UHD integration for over-the-air verification. OpenLTE, an open-source 3GPP LTE implementation, supports USRP hardware like the B210 and N-series for eNodeB and UE emulation, enabling end-to-end LTE network testing through UHD-compatible interfaces. The Python ecosystem enhances USRP accessibility for scripting and educational purposes, with the UHD Python API enabling direct control of transmission, reception, and parameterization from Python scripts. Resources like PySDR offer Jupyter notebook-based tutorials and examples for tasks such as benchmarking USRP throughput and implementing basic receivers, promoting hands-on learning in signal processing and SDR concepts. For advanced customization, RFNoC (RF Network-on-Chip) allows FPGA-accelerated processing blocks to be embedded within flowgraphs, offloading compute-intensive operations like filtering or to the USRP's onboard FPGA without requiring low-level hardware description languages. This framework supports modular via tools like the RFNoC modtool, integrating seamlessly with Companion for streamlined development of high-performance radio applications.

Hardware Series

Bus Series

The USRP Bus Series consists of USB-connected software-defined radio peripherals designed for portable, low-power applications, utilizing USB 2.0 or 3.0 interfaces to enable direct connection to a host PC for single-channel or multiple-input multiple-output (MIMO) configurations. These models integrate RF front-ends, allowing operation without external daughterboards for many use cases, and are optimized for scenarios requiring mobility, such as field testing or laptop-based systems. Key models in the series include the B200 and B210, introduced in 2015, which feature the AD9361 transceiver (B210) or AD9364 (B200) for continuous frequency coverage from 70 MHz to 6 GHz with up to 56 MHz of instantaneous bandwidth. The B200 supports 1x1 full-duplex operation, while the B210 enables 2x2 full-duplex setups, both achieving sample rates up to 61.44 MS/s via SuperSpeed USB 3.0. A compact variant, the B205mini-i, released in late 2020, maintains similar specifications with the AD9364 transceiver but in a smaller form factor measuring 83.3 x 50.8 x 8.4 mm, suitable for embedded or space-constrained portable deployments. Performance across the Bus Series emphasizes efficient USB streaming, with enabling sustained throughputs for half- or full-duplex modes, though actual rates depend on host capabilities and cable quality; for instance, benchmarks show reliable operation at the maximum 61.44 MS/s under optimal conditions. The integrated RF front-end in these models, including low-noise amplifiers and mixers, minimizes external hardware needs, supporting applications like laptop-based prototyping for signal analysis. In 2025, Ettus Research introduced the B206mini-i, a credit-card-sized evolution (85 x 55.7 x 18 mm) with enhanced Type-C connectivity for improved throughput, retaining the AD9364 , 56 MHz bandwidth, and 70 MHz to 6 GHz range in a 1x1 full-duplex configuration while adding industrial-grade tolerance (-40°C to +75°C) and a programmable Spartan-6 FPGA. This model addresses higher bandwidth demands in portable setups compared to networked series options for multi-device .

Networked Series

The Networked Series of USRP devices utilizes Ethernet interfaces, such as , , or SFP+ ports, to enable remote operation and distributed high-performance systems, making them suitable for multi-unit in applications requiring scalability. These models support external clocking via GPS-disciplined oscillators (GPSDO), pulse-per-second (PPS) signals, and reference inputs, facilitating coherent operation across multiple devices in networked deployments. Rack-mount options are available for later models, enhancing their use in or laboratory environments. Key models in the series include the N200 and N210, introduced in 2009, which provide up to 50 MS/s sample rates with a basic Spartan-3A DSP FPGA and for full-duplex streaming. The X300 and X310, released in 2014, advance capabilities with up to 200 MS/s ADC rates, 120 MHz bandwidth per channel, and a Kintex-7 FPGA, supporting dual SFP+ ports for alongside PCIe options. More recent models from the 2020s, such as the N300 (2x2 , Zynq-7035 FPGA, up to 153.6 MS/s, 100 MHz bandwidth) and N310 (4x4 , Zynq-7100 FPGA, same rates), offer integrated AD9371 transceivers covering 10 MHz to 6 GHz, while the N320 and N321 extend to 200 MS/s and 200 MHz bandwidth with enhanced LO distribution. These devices support configurations from 2x2 to 4x4, depending on the model, enabling multi-antenna systems for advanced wireless research. They are compatible with a range of daughterboards for RF frontends, though integration depends on slot availability and bandwidth constraints detailed elsewhere. Advancements in the X300/X310 and N3xx series include support via SFP+ for low-latency data streaming, improving throughput in distributed setups compared to the of earlier N200/N210 models. A notable limitation of the Networked Series is its higher power consumption relative to bus-based models, with the N310 drawing 50-80 W and the X310 around 45 W under load, necessitating robust external power supplies.

Embedded Series

The Embedded Series of Universal Software Radio Peripherals (USRPs) comprises standalone platforms designed for field-deployable applications, featuring integrated processing capabilities that enable host-free operation without reliance on external computers. These devices incorporate a system-on-chip (SoC) combining processors and FPGAs, allowing for onboard execution of tasks, with support for battery-powered variants to enhance portability. The series targets scenarios where low latency and mobility are essential, such as or autonomous wireless systems. The evolution of the Embedded Series began with prototype models like the USRP E100 and E110 in the early , which utilized a OMAP3 SoC (800 MHz processor paired with a C64x+ DSP) and ran a full distribution of Angstrom Linux for standalone operation. These early devices provided foundational embedded functionality, including 512 MB RAM and for control, but were limited in RF performance compared to later iterations. By 2014, the series advanced to the E3xx family with the introduction of Zynq SoCs, marking a shift to more powerful FPGA integration for real-time processing. The USRP E310, released in 2014, represents a key milestone in the series, featuring a Zynq-7020 SoC (dual-core at 667 MHz with a 7-series FPGA), an AD9361 transceiver for 2x2 operation, and continuous frequency coverage from 70 MHz to 6 GHz with up to 56 MHz instantaneous bandwidth. It supports sample rates up to 10 MS/s directly to the ARM processor, boots a operating system from onboard storage, and consumes 2-6 W of power in a compact 133 x 68 x 26.4 mm form factor, enabling portable, low-latency applications without an external host. The E312 variant extends this design with an integrated 3.7 V, 3200 mAh battery for approximately 2 hours of runtime at maximum settings, further emphasizing field deployability. Both models include interfaces like 10/100/1000 Ethernet and USB for , a GPS receiver, 9-axis (IMU), and RFNoC FPGA framework for customizable . Building on the E3xx foundation, the USRP E320, announced in , delivers enhanced performance with a Zynq-7045 SoC (dual-core at 800 MHz, 2 GB DDR3 RAM, and a 7-series FPGA offering four times the resources of the E31x devices), maintaining the 70 MHz to 6 GHz range, 56 MHz bandwidth, and 2x2 via AD9361. It supports higher sample rates up to 61.44 MS/s over 10 GbE SFP+ for host connectivity when needed, while prioritizing embedded use through onboard booting from SD storage and real-time processing capabilities. Additional features include a built-in GPS-disciplined oscillator (GPSDO) for with less than 8 ns timing accuracy, external PPS/10 MHz reference inputs, up to 89.8 dB TX gain and 76 dB RX gain, and power input of 10-14 V DC in lightweight form factors (board-only or enclosed). The E320's expanded FPGA resources facilitate more complex tasks, such as advanced filtering or , reducing latency in standalone deployments. These embedded USRPs offer significant advantages in portability and reduced latency for field applications, as the integrated SoC eliminates the need for tethered hosts, enabling direct execution of software like on the device for real-time edge processing. Onboard storage and low power profiles support extended autonomous operation, while Ethernet/USB interfaces allow minimal external oversight without compromising independence.

Discontinued and Recent Models

The USRP1, introduced in 2005, was the inaugural model featuring a PCI bus interface and basic analog-to-digital converters (ADCs) with 12-bit resolution and sampling rates up to 64 MS/s, serving as a foundational platform for early software-defined radio experimentation. It has since been discontinued due to its relative to modern USB-based interfaces that offer greater portability and ease of integration. The USRP2, released in September 2008, represented an advancement with connectivity as a precursor to later networked series, supporting up to 100 MS/s sampling and two daughterboard slots for expanded functionality. Like the USRP1, it was discontinued as USB and improved Ethernet technologies provided superior performance, power efficiency, and scalability in subsequent models. The E100 series comprised early embedded prototypes designed for standalone operation without a host computer, utilizing an FPGA for processing and supporting basic RF front-ends. These models were phased out owing to advancements in USB and Ethernet interfaces that enabled more versatile and higher-bandwidth embedded solutions. Discontinuation of these models stems primarily from their supersession by USB and Ethernet advancements, which deliver enhanced data throughput and reduced latency compared to PCI buses and early Ethernet implementations. End-of-life support is maintained through legacy versions of the UHD (USRP Hardware Driver), allowing limited compatibility for existing deployments but without new feature development. Among recent additions, the USRP B206mini-i, unveiled in September 2025, is a compact USB-based measuring the size of a , with a range of 70 MHz to 6 GHz, up to 56 MHz bandwidth, and an improved enclosure for rugged portable applications. In 2024, updates to the N3xx series enhanced integration with (NI) ecosystems via the NI-USRP driver release Q4, expanding support for these networked devices in LabVIEW-based prototyping environments. Backward compatibility for discontinued models is preserved through the UHD , enabling reuse of legacy code on newer hardware where feasible; however, upgrades are recommended to access modern bandwidths exceeding 100 MHz and improved RF performance. Looking ahead, NI continues to invest in USRP platforms for and prototyping, with solutions like the USRP X410 enabling over-the-air testbeds for massive and wideband applications to accelerate wireless research.

Daughterboards

Types and Functions

Daughterboards for the Universal Software Radio Peripheral (USRP) are categorized primarily into receivers, transmitters, and transceivers, each designed to handle specific radio frequency (RF) roles within the system's analog frontend. Receivers, such as the LFRX and dual-channel options like the TwinRX (10 MHz–6 GHz, 80 MHz BW per channel), focus on signal acquisition in low-frequency bands, covering DC to 30 MHz with support for real-mode or quadrature sampling modes that enable bandwidths of 33 MHz per channel or 66 MHz for complex signals. Transmitters, exemplified by the LFTX, provide output capabilities in similar low-frequency ranges (0-30 MHz) using high-speed operational amplifiers for direct interfacing with the USRP's digital-to-analog converters (DACs), often in real or quadrature configurations. Transceivers, which combine receive and transmit functionalities for full-duplex operation, include models like the WBX (50 MHz to 2.2 GHz), SBX (400 MHz to 4.4 GHz), UBX (10 MHz to 6 GHz), and OBX (10 MHz to 8.4 GHz, up to 160 MHz bandwidth), allowing independent local oscillators (LOs) for transmit and receive paths to support applications requiring simultaneous bidirectional communication. These daughterboards serve as modular analog front-ends, performing essential tasks including amplification, filtering, and frequency up/down-conversion to interface RF signals with the USRP's processing. Amplification is achieved through programmable gain amplifiers (PGAs), typically offering ranges of 0-31.5 dB for both transmit and receive paths in models, enabling dynamic adjustment to optimize signal-to-noise ratios. Filtering and conversion functions often leverage direct conversion architectures by default, with optional low (IF) modes, while specialized boards like the RFX series incorporate bandpass filters for ISM bands to suppress spurious emissions. In scenarios demanding coverage beyond the USRP motherboard's built-in RF capabilities, daughterboards bypass the core , allowing integration with external front-ends for targeted frequency bands such as low-frequency monitoring or high-power transmission. Performance characteristics emphasize low and moderate power handling to suit prototyping and needs, with noise figures generally below 5 dB—such as 2-4 dB in the 50 MHz to 1.2 GHz range for the WBX—and maximum output power up to 100 mW (20 dBm) across transceivers like the SBX and UBX, varying by frequency (e.g., 18-20 dBm up to 3 GHz). These specs establish reliable operation for applications like spectrum analysis, where the UBX's phase-coherent design supports configurations with instantaneous bandwidths up to 160 MHz. The design of USRP daughterboards promotes modularity through standardized DB connectors that interface directly with the motherboard's ADC/DAC ports, facilitating easy swapping for different RF needs. Open-source schematics, available for models including the LFRX, WBX, SBX, and UBX, enable users to customize or replicate boards for specialized applications. While versatile, daughterboards are primarily associated with legacy USRP series like the N210 and X300/X310, which feature expansion slots for these modules; newer models in the B (e.g., B200), E (e.g., E310), and certain N series (e.g., N300) incorporate integrated RF front-ends, reducing reliance on swappable daughterboards for compact, standalone deployments.

Compatibility and Integration

Daughterboards for the Universal Software Radio Peripheral (USRP) exhibit varying levels of compatibility across different hardware series, primarily determined by the presence of dedicated daughterboard (DB) ports. The USRP1, USRP2, N-series (e.g., N200/N210), and X-series (e.g., X300/X310) provide full support for interchangeable daughterboards through their DB slots, enabling users to swap RF frontends for diverse ranges and bandwidths. In contrast, the B2xx series (e.g., B200/B210), E3xx series (e.g., E310), and N3xx series (e.g., N310) offer limited or no support for swappable daughterboards due to their integrated RF components, such as the AD9361 in the B2xx and E3xx series or the AD9371 in the N3xx series, which are fixed and not designed for modular replacement. Integration of compatible daughterboards is facilitated by the USRP Hardware Driver (UHD) software, which automatically detects installed boards via their onboard , reading identifiers like serial numbers and product IDs to configure accordingly. UHD also includes built-in routines to correct for gain and phase imbalances, as well as IQ offset and DC offset, ensuring accurate ; these self-calibration utilities run during operation or can be invoked manually for specific setups. For multi-channel applications, daughterboards can be stacked in dual-slot motherboards (e.g., slots A and B on X-series) or synchronized across multiple USRPs, with UHD handling time-aligned streaming through subdevice specifications and channel mappings. Practical deployment requires compatible accessories to ensure reliable operation and protection. Ettus provides RF cables (e.g., SMA or MMCX connectors) for signal interfacing, power adapters rated for 12V DC to support high-power daughterboards, and enclosures such as rack-mount for N- and X-series to house multiple units securely. For users transitioning from older USRP models, migration options include hardware adapters like DB9 breakout boards to interface legacy daughterboards with newer compatible series, or software emulation within frameworks like to replicate daughterboard functionality on integrated RF devices without physical swaps. The Ettus Knowledge Base serves as a primary community resource, offering detailed pinouts, installation examples, and troubleshooting guides for daughterboard integration across supported series.

Applications

Research and Prototyping

The Universal Software Radio Peripheral (USRP) plays a pivotal role in academic and industrial research for advancing technologies, particularly through applications like sensing and experiments. In sensing, researchers utilize USRP devices to detect unoccupied bands in real-time, enabling networks to dynamically access resources. For instance, experimental setups with USRP hardware and have demonstrated effective energy detection methods for identifying holes, supporting investigations into efficiency. experiments leverage USRP's multi-channel capabilities to prototype adaptive antenna arrays, where algorithms adjust signal phases to enhance and mitigate interference in systems. USRP facilitates 5G and 6G waveform prototyping by integrating with open-source frameworks like GNU Radio, allowing researchers to simulate and test novel modulation schemes and multiple-access techniques on hardware. In prototyping custom protocols, USRP enables rapid iteration for applications such as IoT communications and radar systems, where developers can implement and refine bespoke signal processing without proprietary constraints. A notable case study is the OpenAirInterface (OAI) platform, which uses USRP devices like the 2974 model to prototype end-to-end LTE networks, validating 3GPP-compliant waveforms and extending to 5G non-compliant use cases for machine-to-machine interactions. For radar prototyping, USRP N320-based testbeds have been employed to create reconfigurable 8x8 MIMO radar systems with 64-element virtual arrays, demonstrating high-resolution imaging capabilities. Key advantages of USRP in research include its cost-effectiveness, with entry-level complete setups often under $5,000, contrasting with proprietary SDR systems that exceed $10,000 for similar performance. The onboard FPGA provides for computationally intensive tasks like real-time filtering and , reducing latency in prototyping workflows. University labs frequently adopt the USRP N310 for massive experiments, configuring multiple units to emulate large antenna arrays for capacity enhancement studies in contexts. (NI) integrations further support automated testing, with examples enabling scripted validation of algorithms on USRP hardware. Despite these benefits, researchers face challenges with real-time constraints on USRP platforms, where high sample rates demand optimized host code to avoid underruns and maintain . Latency in the USRP/GNU Radio pipeline, often exceeding milliseconds, necessitates custom FPGA implementations or tuning of CPU affinity and buffer sizes for reliable performance in time-critical applications like interference alignment.

Education and Commercial Uses

The Universal Software Radio Peripheral (USRP) plays a significant role in educational settings, particularly through integrated courseware and lab kits that facilitate hands-on learning in (RF) and . PySDR, an open-source guide to (SDR) and (DSP) using Python, leverages the UHD Python to enable students to control USRP devices for transmitting and receiving signals, with examples covering models like the B210 for undergraduate RF experiments such as sample capture at 1 MHz rates and 50 dB gain. Similarly, (NI) offers structured courses like "Using Open-Source Tools with USRP Hardware for SDR Applications," which teach flowgraph creation for modulation schemes (e.g., QPSK) and custom block development, alongside Python and C++ modules for USRP programming, targeting engineers and students in communications systems. The USRP B210, with its 2x2 configuration and 70 MHz to 6 GHz coverage, serves as a popular lab kit for these tutorials due to its connectivity and compatibility with for experiments. In hobbyist communities, the low-cost USRP B200mini provides an accessible entry point for and satellite tracking, offering a compact 1x1 SDR platform with up to 56 MHz bandwidth and full-duplex operation via , allowing enthusiasts to experiment with FM broadcast reception, GPS signal analysis, and band applications using . For instance, hobbyists employ the B206mini to decode key fob signals by capturing I/Q samples and processing them into , demonstrating practical RF hacking without requiring advanced infrastructure. Commercially, USRP devices support telecom testing, defense prototyping, and broadcast monitoring through scalable deployments. NI utilizes USRP platforms in validation, as seen in the Spectrum Collaboration Challenge, where they enable AI-driven spectrum sharing and real-time signal classification for vendors like and Verizon in field trials and massive prototyping. In defense applications, the USRP E310 facilitates edge device deployments for electronic warfare and C4ISR with its portable, stand-alone design. USRP devices like the X310 support high-throughput satellite (HTS) modems that handle 80% of the U.S. Department of Defense's SATCOM capacity via protocols. Companies like Parsons repackage the E310 into rugged forms (e.g., ER310) for multi-mission field use, bridging prototyping to production by informing ASIC designs for low-SWaP systems. For broadcast monitoring, USRP SDRs allow real-time RF band across 7.2 GHz coverage, aiding signal location and analysis in commercial . The ecosystem bolsters these uses with NI certifications for and community resources like the Ettus for troubleshooting USRP integrations.

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