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Metal–semiconductor junction
Metal–semiconductor junction
Metal–semiconductor junction
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In solid-state physics, a metal–semiconductor (M–S) junction is a type of electrical junction in which a metal comes in close contact with a semiconductor material. It is the oldest type of practical semiconductor device. M–S junctions can either be rectifying or non-rectifying. The rectifying metal–semiconductor junction forms a Schottky barrier, making a device known as a Schottky diode, while the non-rectifying junction is called an ohmic contact.[1] (In contrast, a rectifying semiconductor–semiconductor junction, the most common semiconductor device today, is known as a p–n junction.)

Metal–semiconductor junctions are crucial to the operation of all semiconductor devices. Usually, an ohmic contact is desired so that electrical charge can be conducted easily between the active region of a transistor and the external circuitry. Occasionally, however, a Schottky barrier is useful, as in Schottky diodes, Schottky transistors, and metal–semiconductor field effect transistors.

The critical parameter: Schottky barrier height

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Band diagram for metal-semiconductor junction at zero bias (equilibrium). Shown is the graphical definition of the Schottky barrier height, ΦB, for an n-type semiconductor as the difference between the interfacial conduction band edge EC and Fermi level EF.

Whether a given metal-semiconductor junction is an ohmic contact or a Schottky barrier depends on the Schottky barrier height, ΦB, of the junction. For a sufficiently large Schottky barrier height, that is, ΦB is significantly higher than the thermal energy kT, the semiconductor is depleted near the metal and behaves as a Schottky barrier. This is typically between 0.4 eV and 0.7 eV for a material like silicon. For lower Schottky barrier heights, the semiconductor is not depleted and instead forms an ohmic contact to the metal.

The Schottky barrier height is defined differently for n-type and p-type semiconductors (being measured from the conduction band edge and valence band edge, respectively). The alignment of the semiconductor's bands near the junction is typically independent of the semiconductor's doping level, so the n-type and p-type Schottky barrier heights are ideally related to each other by:

where Eg is the semiconductor's band gap.

In practice, the Schottky barrier height is not precisely constant across the interface, and varies over the interfacial surface.[2]

Schottky–Mott rule and Fermi level pinning

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Schottky–Mott rule: As the materials are brought together, the bands in the silicon bend such that the silicon's work function Φ matches the silver's. The bands retain their bending upon contact. This model predicts silver to have a very low Schottky barrier to n-doped silicon, making an excellent ohmic contact.
Picture showing Fermi level pinning effect from metal-induced gap states: The bands in the silicon already start out bent due to surface states. They are bent again just before contact (to match work functions). Upon contact however, the band bending changes completely, in a way that depends on the chemistry of the Ag-Si bonding.[4]
Band diagrams for models of formation of junction between silver and n-doped silicon.[3] In practice this Schottky barrier is approximately ΦB = 0.8 eV.
See also: Metal-induced gap states

The Schottky–Mott rule of Schottky barrier formation, named for Walter H. Schottky and Nevill Mott, predicts the Schottky barrier height based on the vacuum work function of the metal relative to the vacuum electron affinity (or vacuum ionization energy) of the semiconductor:

This model is derived based on the thought experiment of bringing together the two materials in vacuum, and is closely related in logic to Anderson's rule for semiconductor-semiconductor junctions. Different semiconductors respect the Schottky–Mott rule to varying degrees.[5]

Although the Schottky–Mott model correctly predicted the existence of band bending in the semiconductor, it was found experimentally that it would give grossly incorrect predictions for the height of the Schottky barrier. A phenomenon referred to as "Fermi level pinning" caused some point of the band gap, at which finite DOS exists, to be locked (pinned) to the Fermi level. This made the Schottky barrier height almost completely insensitive to the metal's work function:[5]

where Ebandgap is the size of band gap in the semiconductor.

In fact, empirically, it is found that neither of the above extremes is quite correct. The choice of metal does have some effect, and there appears to be a weak correlation between the metal work function and the barrier height, however the influence of the work function is only a fraction of that predicted by the Schottky-Mott rule.[6]: 143 

It was noted in 1947 by John Bardeen that the Fermi level pinning phenomenon would naturally arise if there were chargeable states in the semiconductor right at the interface, with energies inside the semiconductor's gap. These would either be induced during the direct chemical bonding of the metal and semiconductor (metal-induced gap states) or be already present in the semiconductor–vacuum surface (surface states). These highly dense surface states would be able to absorb a large quantity of charge donated from the metal, effectively shielding the semiconductor from the details of the metal. As a result, the semiconductor's bands would necessarily align to a location relative to the surface states which are in turn pinned to the Fermi level (due to their high density), all without influence from the metal.[3]

The Fermi level pinning effect is strong in many commercially important semiconductors (Si, Ge, GaAs),[5] and thus can be problematic for the design of semiconductor devices. For example, nearly all metals form a significant Schottky barrier to n-type germanium and an ohmic contact to p-type germanium, since the valence band edge is strongly pinned to the metal's Fermi level.[7] The solution to this inflexibility requires additional processing steps such as adding an intermediate insulating layer to unpin the bands. (In the case of germanium, germanium nitride has been used[8])

History

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The rectification property of metal–semiconductor contacts was discovered by Ferdinand Braun in 1874 using mercury metal contacted with copper sulfide and iron sulfide semiconductors.[9] Sir Jagadish Chandra Bose applied for a US patent for a metal-semiconductor diode in 1901. This patent was awarded in 1904.

English Wikisource has original text related to this article:

G.W. Pickard received a patent in 1906 on a point-contact rectifier using silicon. In 1907, George W. Pierce published a paper in Physical Review showing rectification properties of diodes made by sputtering many metals on many semiconductors.[10] The use of the metal–semiconductor diode rectifier was proposed by Lilienfeld in 1926 in the first of his three transistor patents as the gate of the metal–semiconductor field effect transistors.[11] The theory of the field-effect transistor using a metal/semiconductor gate was advanced by William Shockley in 1939.

The earliest metal–semiconductor diodes in electronics application occurred around 1900, when the cat's whisker rectifiers were used in receivers.[12] They consisted of pointed tungsten wire (in the shape of a cat's whisker) whose tip or point was pressed against the surface of a galena (lead sulfide) crystal. The first large area rectifier appeared around 1926 which consisted of a copper(I) oxide semiconductor thermally grown on a copper substrate. Subsequently, selenium films were evaporated onto large metal substrates to form the rectifying diodes. These selenium rectifiers were used (and are still used) to convert alternating current to direct current in electrical power applications. During 1925–1940, diodes consisting of a pointed tungsten metal wire in contact with a silicon crystal base, were fabricated in laboratories to detect microwaves in the UHF range. A World War II program to manufacture high-purity silicon as the crystal base for the point-contact rectifier was suggested by Frederick Seitz in 1942 and successfully undertaken by the Experimental Station of the E. I du Pont de Nemours Company.

The first theory that predicted the correct direction of rectification of the metal–semiconductor junction was given by Nevill Mott in 1939. He found the solution for both the diffusion and drift currents of the majority carriers through the semiconductor surface space charge layer which has been known since about 1948 as the Mott barrier. Walter H. Schottky and Spenke extended Mott's theory by including a donor ion whose density is spatially constant through the semiconductor surface layer. This changed the constant electric field assumed by Mott to a linearly decaying electric field. This semiconductor space-charge layer under the metal is known as the Schottky barrier. A similar theory was also proposed by Davydov in 1939. Although it gives the correct direction of rectification, it has also been proven that the Mott theory and its Schottky-Davydov extension gives the wrong current limiting mechanism and wrong current-voltage formulae in silicon metal/semiconductor diode rectifiers. The correct theory was developed by Hans Bethe and reported by him in a M.I.T. Radiation Laboratory Report dated November 23, 1942. In Bethe's theory, the current is limited by thermionic emission of electrons over the metal–semiconductor potential barrier. Thus, the appropriate name for the metal–semiconductor diode should be the Bethe diode, instead of the Schottky diode, since the Schottky theory does not predict the modern metal–semiconductor diode characteristics correctly.[13]

If a metal-semiconductor junction is formed by placing a droplet of mercury, as Braun did, onto a semiconductor, e.g. silicon, to form a Schottky barrier in a Schottky diode electrical setup – electrowetting can be observed, where the droplet spreads out with increasing voltage. Depending on the doping type and density in the semiconductor, the droplet spreading depends on the magnitude and sign of the voltage applied to the mercury droplet.[14] This effect has been termed ‘Schottky electrowetting’, effectively linking electrowetting and semiconductor effects.[15]

Between 1953-1958, Fuller and Ditzenberger's work on the diffusion of impurities into silicon.[16][17][18][19] In 1956 Miller and Savage studied the diffusion of aluminium in crystal silicon.[20]

The first silicon oxide gate transistor were invented by Frosch and Derick in 1957 at Bell Labs.[21] In 1956, Richard Baker described some discrete diode clamp circuits to keep transistors from saturating.[22] The circuits are now known as Baker clamps. One of those clamp circuits used a single germanium diode to clamp a silicon transistor in a circuit configuration that is the same as the Schottky transistor.[22]: 11, 30  The circuit relied on the germanium diode having a lower forward voltage drop than a silicon diode would have.

The Schottky diode, also known as the Schottky-barrier diode, was theorized for years, but was first practically realized as a result of the work of Atalla and Kahng during 1960–1961.[23][24] They published their results in 1962 and called their device the "hot electron" triode structure with semiconductor-metal emitter.[25] It was one of the first metal-base transistors.[26] Atalla continued research on Schottky diodes with Robert J. Archer at HP Associates. They developed high vacuum metal film deposition technology,[27] and fabricated stable evaporated/sputtered contacts,[28][29] publishing their results in January 1963.[30] Their work was a breakthrough in metal–semiconductor junction[28] and Schottky barrier research, as it overcame most of the fabrication problems inherent in point-contact diodes and made it possible to build practical Schottky diodes.[27]

In 1967, Robert Kerwin, Donald Klein and John Sarace at Bell Labs, patented a method to replaced the aluminum gate with a polycrystalline layer of silicon.[31][32]

See also

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References

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Further reading

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Revisions and contributorsEdit on WikipediaRead on Wikipedia

Metal–semiconductor junction

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A metal–semiconductor junction is the interface formed between a metal and a semiconductor material, where the alignment of their Fermi levels upon contact results in either an ohmic contact with low-resistance, bidirectional conduction or a rectifying Schottky barrier that permits current flow primarily in one direction, mimicking diode behavior. The Schottky barrier height, typically ranging from 0.3 to 0.9 eV depending on the materials, arises from the difference between the metal work function and the semiconductor's electron affinity or ionization potential, creating a potential barrier that depletes majority carriers near the interface. The physics of these junctions is governed by the Schottky-Mott model, which predicts the barrier height as the difference between the metal (ψ_M) and the (χ) for n-type semiconductors, though experimental deviations often occur due to pinning by interface states with densities around 0.02 states per atom per eV. In ohmic contacts, heavy doping (≥10¹⁹ cm⁻³) narrows the to enable tunneling, ensuring linear I-V characteristics with specific as low as 10⁻⁷ Ω cm². For Schottky contacts, current transport relies on over the barrier, yielding a current-voltage relation I = I₀ (e^(qV/nkT) - 1), where I₀ = AT² exp(-qφ_B/kT) and n ≈ 1.1–1.2 accounts for image-force lowering. Compared to p-n junctions, metal–semiconductor junctions in Schottky diodes exhibit faster switching speeds due to majority-carrier conduction without minority-carrier storage, lower forward voltage drops (≈0.3 V versus 0.6–0.8 V), but higher reverse leakage currents dominated by thermionic-field emission. Barrier height engineering, such as through surface passivation or interfacial layers, modulates these properties to mitigate pinning effects and optimize performance. These junctions are fundamental in devices, enabling applications in high-frequency rectifiers, solar cells, field-effect transistors, and sensors where rapid response and low-power operation are critical.

Fundamentals

Definition and Types

A metal–semiconductor junction is an interface formed between a metal and a material, where the intimate contact influences the flow of charge carriers and serves as a foundational element in early semiconductor devices such as diodes and transistors. These junctions are classified into two primary types based on their electrical behavior: rectifying and ohmic. Rectifying junctions exhibit asymmetric current flow, allowing significant conduction in one direction (forward bias) while blocking it in the reverse, which results in the formation of a . In contrast, ohmic junctions display linear current-voltage characteristics with low resistance, enabling efficient conduction in both directions regardless of bias polarity. The type of junction is primarily determined by the difference in work functions between the metal and the semiconductor. For an n-type semiconductor, a rectifying junction forms when the metal's work function is higher than the semiconductor's, creating a barrier to electron flow from the metal to the semiconductor under reverse bias; conversely, an ohmic junction arises when the metal's work function is lower, facilitating easy carrier injection. Similar principles apply to p-type semiconductors, with reversed work function comparisons. Examples of rectifying junctions include point-contact diodes, where the asymmetric behavior is exploited for rectification. Ohmic junctions, on the other hand, are essential for low-resistance electrical contacts in transistors, often achieved through heavy doping to enable tunneling across any potential barrier.

Energy Band Structure

In metals, the energy bands consist of overlapping valence and conduction bands, forming a continuum of allowed states where the Fermi level lies within the filled band, enabling electrons to move freely as in a classical conductor. In contrast, semiconductors feature a valence band filled with electrons at absolute zero, separated from the empty conduction band by a forbidden bandgap EgE_g, with the Fermi level positioned within this gap; doping shifts the Fermi level closer to the conduction band in n-type materials or the valence band in p-type materials. Prior to forming the junction, the band structures of the isolated metal and semiconductor are aligned relative to a common vacuum level reference. The metal work function Φm\Phi_m represents the energy required to remove an electron from the Fermi level to the vacuum level, while the semiconductor's electron affinity χ\chi is the energy difference between the vacuum level and the bottom of the conduction band. This initial alignment determines the relative positions of the Fermi levels: if the metal's Φm\Phi_m exceeds the semiconductor's effective work function, electrons tend to transfer across the interface upon contact, leading to charge redistribution. The flat-band condition illustrates the bands without net charge transfer or external bias, where the semiconductor bands remain parallel to the metal's Fermi level, serving as a reference for understanding junction formation; in practice, this requires an applied voltage to neutralize built-in fields. Upon junction formation, charge transfer establishes equilibrium by aligning the Fermi levels across the interface, inducing band bending in the semiconductor due to the space charge region. For an n-type semiconductor in a rectifying junction (where Φm>χ\Phi_m > \chi), electrons deplete from the interface, creating an upward band bend in the conduction and valence bands over the depletion width, forming a potential barrier that prevents further diffusion. In a p-type semiconductor (typically with Φm<χ+Eg−Ef\Phi_m < \chi + E_g - E_f), holes deplete near the interface, resulting in a downward band bend. These equilibrium diagrams highlight the space charge region's role in modulating carrier transport at the interface.

Theoretical Models

Schottky-Mott Rule

The Schottky-Mott rule provides the ideal theoretical framework for predicting the Schottky barrier height at a metal-semiconductor interface under equilibrium conditions, where the barrier height is determined solely by the difference between the metal work function and the semiconductor electron affinity. This model assumes a clean, abrupt interface with no defects or chemical interactions, leading to direct alignment of the vacuum levels and Fermi levels across the junction upon contact. The rule was originally developed through independent contributions by Walter Schottky and Nevill Mott in the late 1930s and early 1940s, building on early rectifier theories. For an n-type semiconductor, the Schottky barrier height ΦBn\Phi_{Bn} is given by ΦBn=Φm−χs,\Phi_{Bn} = \Phi_m - \chi_s, where Φm\Phi_m is the work function of the metal (the energy required to remove an electron from the Fermi level to the vacuum level) and χs\chi_s is the electron affinity of the semiconductor (the energy difference between the vacuum level and the conduction band minimum). For a p-type semiconductor, the barrier height ΦBp\Phi_{Bp} follows as ΦBp=Eg−(Φm−χs),\Phi_{Bp} = E_g - (\Phi_m - \chi_s), with EgE_g denoting the semiconductor bandgap energy. The derivation arises from the requirement that, in thermal equilibrium, the Fermi levels of the isolated metal and semiconductor must align after contact, resulting in band bending in the semiconductor to accommodate the initial work function mismatch Φm−χs−(Ec−EF)\Phi_m - \chi_s - (E_c - E_F), where Ec−EFE_c - E_F is the energy from the conduction band to the Fermi level in the bulk semiconductor. This bending creates a depletion region, and under the ideal assumptions of no interface states or dipoles, the barrier height directly equals the work function difference, as the vacuum level remains continuous across the interface. Mott's analysis emphasized the role of this potential barrier in rectification, while Schottky extended it to describe the space-charge layer formation quantitatively. Key assumptions include a defect-free interface, no surface states within the bandgap, negligible chemical bonding or interdiffusion between metal and semiconductor, and perfect alignment without charge redistribution. These conditions predict barrier heights that vary linearly with metal work function for both n-type and p-type semiconductors, enabling ohmic contacts when the barrier is small or negative. In practice, the rule holds reasonably well for some III-V compound semiconductors, such as GaAs with certain metals, where interface dipoles are minimal and barrier heights correlate closely with work function differences. However, it deviates significantly in covalent semiconductors like silicon, where experimental barrier heights show weak dependence on metal work function due to Fermi level pinning effects, leading to scattering around a fixed position within the bandgap.

Fermi Level Pinning

Fermi level pinning refers to the phenomenon observed at metal–semiconductor interfaces where the position of the Fermi level in the semiconductor is fixed near a specific energy within the bandgap, largely independent of the metal work function. This occurs due to the presence of a high density of interface states that accommodate charge transfer, effectively screening variations in the metal's work function and overriding the predictions of the ideal Schottky-Mott model. As a result, the Schottky barrier height becomes nearly constant regardless of the metal chosen, complicating the design of ohmic contacts and rectifying devices. The primary causes of Fermi level pinning are intrinsic surface states on the clean semiconductor or metal-induced gap states (MIGS), which arise from the evanescent tails of metallic wave functions penetrating into the semiconductor's bandgap. These states act as charge traps, enabling charge redistribution at the interface to maintain neutrality. The concept of MIGS was first theoretically described by Heine, who showed that the decay of metal electron states into the forbidden gap creates a continuum of states that can pin the . Additionally, extrinsic defects or disorder at the interface can contribute to gap states, enhancing the pinning effect. The foundational explanation for this behavior is provided by the Bardeen model, which posits that a sufficient density of interface states (typically >10^{12} cm^{-2} eV^{-1}) leads to a charge neutrality condition where the is immobilized relative to the bands. In this model, the interface states exchange charge with the metal to compensate for differences, fixing the at a position determined by the of the states. Seminal calculations demonstrate that even low densities of such states can enforce pinning, as the charge required to shift the level is minimal compared to the available state density. The consequences of Fermi level pinning include Schottky barrier heights Φ_B that typically lie between E_g/3 and E_g/2 above the valence band maximum for many semiconductors, where E_g is the bandgap . The degree of pinning is quantified by the slope parameter S = dΦ_B / dφ_m, where φ_m is the metal ; values of S close to 0 indicate strong pinning, while S = 1 signifies no pinning. For , pinning is strong with S ≈ 0.1, resulting in barrier heights around 0.6–0.8 eV nearly independent of metal. In , pinning is weaker in certain interfaces with S ≈ 0.6, allowing more tunability, though traditional metal contacts still exhibit significant pinning effects.

Schottky Barrier

Formation and Height

The formation of a Schottky barrier occurs when a metal is brought into intimate contact with a semiconductor, initiating a process of charge redistribution at the interface due to the difference in their work functions. Initially, electrons flow from the semiconductor to the metal (for an n-type semiconductor with a higher work function metal) or vice versa, leading to the accumulation of opposite charges on either side of the interface. This charge separation establishes an electric field that bends the energy bands in the semiconductor, creating a depletion layer—a region near the interface depleted of mobile charge carriers—whose width depends on the semiconductor doping concentration. At equilibrium, the Fermi levels align across the junction, resulting in a built-in potential VbiV_{bi} equal to the difference between the metal work function and the semiconductor's electron affinity (adjusted for doping), which sustains the depletion layer and defines the barrier. The height ΦB\Phi_B, a key parameter determining the junction's rectifying behavior, is defined as the energy difference between the metal's and the semiconductor's conduction band edge at the interface for n-type semiconductors (ΦBn\Phi_{Bn}), or the valence band edge for p-type semiconductors (ΦBp\Phi_{Bp}). This height represents the minimum energy that majority carriers must overcome to cross the junction. A fundamental relation arises from the conservation of the semiconductor's bandgap: ΦBn+ΦBp=Eg\Phi_{Bn} + \Phi_{Bp} = E_g, where EgE_g is the semiconductor bandgap energy, making the sum independent of the metal choice. Typical Schottky barrier heights range from 0.4 to 0.9 eV for common semiconductors; for example, ΦBn\Phi_{Bn} on n-type (Si, Eg=1.12E_g = 1.12 eV) varies from 0.65 eV (e.g., with aluminum) to 0.9 eV (e.g., with ), while on n-type (GaAs, Eg=1.42E_g = 1.42 eV), values are typically 0.7 to 1.05 eV depending on the metal. The depletion layer width, influenced by doping (higher doping narrows it), further modulates the effective barrier under bias. Current transport across the primarily occurs via , where carriers gain thermal energy to surmount ΦB\Phi_B, enabling rectification: forward reduces the barrier, increasing current exponentially, while reverse heightens it, limiting current to a small saturation value. The is given by Js=A∗∗T2exp⁡(−qΦBkT)J_s = A^{**} T^2 \exp\left( -\frac{q \Phi_B}{kT} \right), with A∗∗A^{**} the effective Richardson constant, underscoring ΦB\Phi_B's role in device performance.

Measurement Techniques

The current-voltage (I-V) method is a fundamental technique for determining the Schottky barrier height (Φ_B) in metal-semiconductor junctions by analyzing the forward-bias characteristics of the diode. Under thermionic emission theory, the saturation current density follows Js=A∗T2exp⁡(−qΦBkT)J_s = A^* T^2 \exp\left(-\frac{q \Phi_B}{k T}\right), where A∗A^* is the Richardson constant, TT is temperature, qq is the elementary charge, kk is Boltzmann's constant, and Φ_B is the barrier height. By measuring I-V curves at various temperatures and plotting ln⁡(J/T2)\ln(J/T^2) versus 1/T1/T, the slope yields −qΦB/k-q \Phi_B / k, allowing extraction of Φ_B; additionally, a semi-log plot of ln⁡J\ln J versus forward voltage V provides the ideality factor n from the slope q/nkTq/nkT. This approach has been widely applied to junctions like Ti on black phosphorus, where Φ_B values around 0.3-0.4 eV were determined after correcting for non-ideal behavior. Capacitance-voltage (C-V) profiling offers an alternative electrical method to measure Φ_B and the built-in potential V_bi by probing the width under reverse bias. The junction capacitance per unit area is given by C=qϵsND2(Vbi−V)C = \sqrt{\frac{q \epsilon_s N_D}{2(V_{bi} - V)}}
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