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Sun-4
View on WikipediaSun-4 is a series of Unix workstations and servers produced by Sun Microsystems, first appearing in July 1987, with the launch of the Sun 4/260. The original Sun-4 series were VMEbus-based systems similar to the earlier Sun-3 series, but employing microprocessors based on Sun's own SPARC V7 RISC architecture in place of the 68k family processors of previous Sun models.
Sun 4/280 was a base system used for building an early RAID prototype.[1]
Models
[edit]Models are listed in approximately chronological order.
Model Codename CPU board CPU CPU MHz Max. RAM Chassis 4/260 Sunrise Sun 4200 Fujitsu SF9010 IU,
Weitek 1164/1165 FPU16.67 MHz 128 MB 12-slot VME (deskside) 4/280 Sunrise Sun 4200 Fujitsu SF9010 IU,
Weitek 1164/1165 FPU16.67 MHz 128 MB 12-slot VME (rackmount) 4/110 Cobra Sun 4100 Fujitsu MB86900 IU,
Weitek 1164/1165 FPU
(optional)14.28 MHz 32 MB 3-slot VME (desktop/side) 4/150 Cobra Sun 4100 Fujitsu MB86900 IU,
Weitek 1164/1165 FPU
(optional)14.28 MHz 32 MB 6-slot VME (deskside) 4/310 Stingray Sun 4300 Cypress Semiconductor CY7C601,
Texas Instruments 8847 FPU25 MHz 32 MB 3-slot VME (desktop/side) 4/330 Stingray Sun 4300 Cypress Semiconductor CY7C601,
Texas Instruments 8847 FPU25 MHz 96 MB 3-slot VME w 2 memory slots (deskside) 4/350 Stingray Sun 4300 Cypress Semiconductor CY7C601,
Texas Instruments 8847 FPU25 MHz 224 MB 5-slot VME (desktop/side) 4/360 Stingray Sun 4300 Cypress Semiconductor CY7C601,
Texas Instruments 8847 FPU25 MHz 224 MB 12-slot VME (deskside) 4/370 Stingray Sun 4300 Cypress Semiconductor CY7C601,
Texas Instruments 8847 FPU25 MHz 224 MB 12-slot VME (deskside) 4/380 Stingray Sun 4300 Cypress Semiconductor CY7C601,
Texas Instruments 8847 FPU25 MHz 224 MB 12-slot VME (rackmount) 4/390 Stingray Sun 4300 Cypress Semiconductor CY7C601,
Texas Instruments 8847 FPU25 MHz 224 MB 16-slot VME (rackmount) 4/470 Sunray Sun 4400 Cypress Semiconductor CY7C601,
Texas Instruments 8847 FPU33 MHz 768 MB 16-slot VME (deskside) 4/490 Sunray Sun 4400 Cypress Semiconductor CY7C601,
Texas Instruments 8847 FPU33 MHz 768 MB 12-slot VME (rackmount)
In 1989, Sun dropped the "Sun-4" name for marketing purposes in favor of the SPARCstation and SPARCserver brands for new models, although early SPARCstation/server models were also assigned Sun-4-series model numbers. For example, the SPARCstation 1 was also known as the Sun 4/60. This practice was phased out with the introduction of the SPARCserver 600MP series in 1991. The term Sun-4 continued to be used in an engineering context to identify the basic hardware architecture of all SPARC-based Sun systems.
Sun 4/110, 4/150, 4/260 and 4/280 systems upgraded with the Sun 4300 CPU board (as used in the SPARCserver 300 series) were referred to as the 4/310, 4/350, 4/360 and 4/380 respectively.
Sun-4 architecture
[edit]The Sun-4 architecture refers to the VME-based architecture described above and used in the Sun 4/100, 4/200, SPARCserver 300 and SPARCserver 400 ranges. Sun-4 support was included in SunOS 3.2 onwards and Solaris 2.1 to 2.4. OpenBSD[2] and NetBSD[3] also will run on the Sun-4 architecture families.
Several variations on the Sun-4 architecture were subsequently developed and used in later computer systems produced by Sun and other vendors. These comprised:
- Sun-4c
- (c presumably for Campus, the codename of the first Sun-4c model, the SPARCstation 1) This desktop workstation/low-end server variant substituted the 32-bit SBus expansion bus in place of VME and introduced a new MMU design. Supported by SunOS 4.0.3c onwards and Solaris 2.0 to 7.
- Sun-4e
- A hybrid Sun-4c/VME architecture found in the SPARCengine 1 (Sun 4/E) VME embedded controller. This board was originally designed by Force Computers and licensed to Sun. Supported by SunOS 4.0.3e and 4.1e and Solaris 2.1[4] to 2.4.
- Sun-4m
- Originally a multiprocessor Sun-4 variant, based on the MBus processor module bus introduced in the SPARCserver 600MP series. The Sun-4m architecture later also encompassed non-MBus uniprocessor systems such as the SPARCstation 5, utilizing SPARC V8-architecture processors. Supported by SunOS 4.1.2 onwards and Solaris 2.1 to 9. SPARCserver 600MP support was dropped after Solaris 2.5.1.
- Sun-4d
- (d for Dragon, the codename of the SPARCcenter 2000) A high-end multiprocessor architecture, based on the XDBus processor interconnect, scalable up to 20 processors. The only Sun-4d systems produced by Sun were the SPARCserver 1000 and SPARCcenter 2000 series. The Cray CS6400 was also nominally a Sun-4d machine (sun4d6), although it required a custom version of Solaris. Supported by Solaris 2.2 to 8.
- Sun-4u
- (u for UltraSPARC) - this variant introduced the 64-bit SPARC V9 processor architecture and UPA processor interconnect first used in the Sun Ultra series. Supported by 32-bit versions of Solaris from the version 2.5. The first 64-bit Solaris release for Sun4u is Solaris 7. UltraSPARC I support was dropped after Solaris 9. Solaris 10 supports Sun4u implementations from UltraSPARC II to UltraSPARC IV.
- Sun-4u1
- Sometimes used to identify the Sun Enterprise 10000 (Starfire) 64-way multiprocessor server architecture. The Starfire is supported by Solaris 2.5.1 onwards.
- Sun-4us
- A variant of Sun-4u specific to Fujitsu PRIMEPOWER systems based on SPARC64 V processors.
- Sun-4v
- (v presumably for "virtualized") A variation on Sun-4u which includes hypervisor processor virtualization; introduced in the UltraSPARC T1 (Niagara) multithreading processor. Supported by Solaris version 10 starting from release 3/05 HW2, and Solaris 11.
Sun timeline
[edit]
References
[edit]- ^ "Berkeley Hardware Prototypes". people.eecs.berkeley.edu. Retrieved 2021-10-27.
- ^ "OpenBSD/sparc". OpenBSD.
- ^ "NetBSD/sparc". NetBSD wiki.
- ^ McLaughlin, John (November 1992). "SunFLASH Vol 47 #26". Retrieved 2009-03-26.
External links
[edit]Sun-4
View on GrokipediaHistory and Development
Origins and Design Goals
Sun Microsystems was founded in February 1982 by Stanford University graduates Andy Bechtolsheim, Vinod Khosla, and Scott McNealy, along with University of California, Berkeley computer science student Bill Joy, with the goal of producing affordable UNIX-based graphical workstations for academic and engineering use.[7] The company's early products, from the Sun-1 through the Sun-3 series, relied on Motorola 680x0 processors, such as the 68000 in the Sun-1 and the 68020 in the Sun-3, which provided a foundation for high-performance computing but faced limitations in scaling and efficiency as demand for faster UNIX systems grew.[8][9] In April 1984, amid concerns over the Motorola 680x0's performance ceiling and Sun's desire to control its hardware destiny, a small team led by co-founder Bill Joy and engineer Robert Garner initiated the SPARC (Scalable Processor ARChitecture) project, drawing on reduced instruction set computing (RISC) research from UC Berkeley's David Patterson.[10][9][7] Andy Bechtolsheim, as chief hardware designer and co-founder, contributed to key components like the memory management unit (MMU) while supporting the shift to an in-house RISC design, initially expressing skepticism but ultimately endorsing it for its potential to accelerate Sun's workstation dominance.[9] This decision marked Sun's transition from CISC-based systems to a proprietary yet open RISC architecture, aiming to avoid vendor lock-in and foster industry-wide adoption. The primary design goals for SPARC centered on delivering superior performance for UNIX workstations, enabling scalability across workstation and server applications, and promoting openness through a licensable standard that invited third-party implementations.[8][11] Influenced by the success of open standards like Ethernet and Berkeley's RISC prototypes, Sun envisioned SPARC as a versatile architecture that could support high-speed integer and floating-point operations while allowing extensions for future growth, with initial targets including a 70-nanosecond cycle time and roughly three times the integer performance of the Sun-3.[9] This openness was later institutionalized in 1989 with the formation of SPARC International, a consortium to standardize and promote the architecture beyond Sun's ecosystem.[10] Development progressed rapidly, culminating in the SPARC Version 7 specification published in 1986 and the arrival of the first prototype chips—a 20,000-gate-array implementation from Fujitsu—in March of that year, with a multi-user UNIX kernel booting successfully by June.[10][9] These prototypes targeted a 10 MIPS (millions of instructions per second) rating at launch, achieving the anticipated 3x speedup over the Sun-3's 2.3–2.7 MIPS in integer workloads and setting the stage for SPARC's integration into Sun-4 systems.[9][11]Launch and Initial Models
The Sun-4 series was officially launched in July 1987, marking Sun Microsystems' entry into RISC-based computing with the Sun 4/260 as its flagship deskside workstation model.[12] This introduction represented a significant advancement over prior systems, shifting to Sun's proprietary SPARC V7 processor for enhanced performance in demanding applications.[13] Priced at approximately $39,900 for the base monochrome configuration with 8 MB of memory, the Sun 4/260 targeted engineering and scientific computing markets, offering a balance of power and affordability for professional users.[12] The series directly replaced the Sun-3 lineup, with compatible chassis allowing upgrades via CPU board swaps to transition existing installations to the new architecture.[14] In the competitive landscape, Sun-4 systems vied with DEC's VAXstations and Apollo workstations, distinguishing themselves through robust UNIX compatibility and open networking features that appealed to technical professionals.[15] Early market reception was strong, particularly among universities and research institutions, where the Sun-4's reliability and UNIX environment facilitated academic computing needs.[16] This adoption drove substantial business growth for Sun, with revenues rising from $537.5 million in fiscal 1987 to $2.46 billion by fiscal 1990, solidifying the company's position as a workstation leader.[17][18]Architecture
Core SPARC Implementation
The Sun-4 systems utilized the SPARC Version 7 (V7) architecture as their foundational processor design, a 32-bit reduced instruction set computing (RISC) implementation characterized by 32 general-purpose integer registers, a strict load/store memory access model, and uniform 32-bit fixed-length instructions across three formats.The SPARC Architecture Manual Version 7 This design emphasized simplicity and efficiency, with most instructions executing in a single clock cycle to support high-performance pipelining and compiler optimization, aligning with the RISC principles of minimizing hardware complexity while maximizing software portability.The SPARC Architecture Manual Version 7 Central to SPARC V7's efficiency were its register windows mechanism for subroutine handling, allowing up to 32 overlapping windows but typically configured with 8 in Sun-4 implementations to provide 24 live physical registers (8 input, 8 local, and 8 output per window) at any given time, reducing memory traffic for function calls via SAVE and RESTORE instructions.The SPARC Architecture Manual Version 7 Additional features included delayed branching, where the instruction immediately following a branch executes regardless (with an annul bit to conditionally skip it), and an integer unit handling arithmetic, logical, and control operations, augmented by a multiply/divide coprocessor using instructions like MULScc for iterative multiplication and the Y register for 64-bit results.The SPARC Architecture Manual Version 7 The architecture adhered strictly to the SPARC V7 standard, ratified in 1987, which permitted third-party implementations such as those from Fujitsu and Cypress Semiconductor while ensuring binary compatibility across compliant processors.The SPARC Architecture Manual Version 7 Early Sun-4 processors, based on SPARC V7, operated at clock speeds starting from 16.67 MHz in models like the Sun 4/260, employing a five-stage pipeline of fetch, decode, execute, memory, and writeback to achieve sustained instruction throughput.Computer MIPS and MFLOPS Speed Claims 1980 to 1996 Performance reached approximately 12-15 MIPS in these initial chips, a substantial improvement over the 2-3 MIPS of the Sun-3 series' Motorola 68020 processors running at comparable clock rates, demonstrating the RISC architecture's superior integer execution efficiency.Computer MIPS and MFLOPS Speed Claims 1980 to 1996 This scalability enabled the Sun-4 to serve as a platform for both workstations and multiprocessor servers, with the V7 compliance fostering an ecosystem of interchangeable CPU designs from multiple vendors.The SPARC Architecture Manual Version 7Bus Systems and Variants
The original Sun-4 systems employed the VMEbus as their core system bus, utilizing 12- to 16-slot backplanes to accommodate multiprocessor setups with up to four CPUs, facilitating shared access to memory and I/O resources in server-oriented configurations. This design leveraged the VMEbus's modular Eurocard form factor for expansion, allowing integration of SPARC V7-based processor boards alongside peripherals while maintaining compatibility with industrial standards. With the Sun-4c subarchitecture introduced in 1989, Sun shifted to the SBus for I/O operations, a high-speed, synchronous bus optimized for peripherals such as Ethernet adapters and framebuffers, enabling faster data transfer rates up to 25 MHz compared to VMEbus limitations.[19] The SBus supported up to four slots in typical workstation chassis, using a 32-bit multiplexed address/data path to handle graphics acceleration and network interfaces efficiently, marking a departure from the slower, asynchronous VMEbus for desktop systems.[19] The Sun-4m variant, launched in 1990, introduced the MBus as a dedicated processor-memory interconnect, integrating memory controllers directly to support enhanced features like color graphics acceleration and scalable multiprocessing with up to eight CPUs across systems such as the SPARCserver 1000.[6] Operating at 40 MHz, the MBus employed a snooping protocol for cache coherence in multiprocessor environments, connecting CPU modules to a shared backplane while bridging to SBus for I/O, thus improving overall system bandwidth for mid-range servers.[6][20] In 1992, the Sun-4d subarchitecture adopted the XDBus for high-end server scalability, a packet-switched interconnect that linked multiple nodes to support up to 20 SuperSPARC CPUs in configurations like the SPARCcenter 2000, emphasizing distributed processing over centralized backplanes.[21] The XDBus provided a 320 MB/s bandwidth per link, enabling fault-tolerant clustering and massive parallelism for enterprise workloads, while retaining SBus for local I/O attachments.[21] By 1995, the Sun-4u architecture transitioned to the Ultra Port Architecture (UPA) bus, designed for the 64-bit UltraSPARC V9 processors, offering a high-throughput, split-transaction protocol with up to 1.3 GB/s bandwidth to handle 64-bit addressing and enhanced multimedia instructions.[22] Subsequent Sun-4u systems incorporated PCI add-on slots for broader peripheral compatibility, bridging UPA's system interconnect to standard I/O buses and supporting evolving network and storage demands.[22]Models and Configurations
Original Sun-4 Systems
The original Sun-4 systems, launched between 1987 and 1989, formed the initial lineup of VMEbus-based workstations and servers from Sun Microsystems, marking the company's transition to its proprietary SPARC architecture. These models prioritized expandability through VME slots and supported SCSI interfaces for storage, enabling configurations suitable for engineering and early networked computing environments. The VMEbus served as the primary interconnect for CPU, memory, and peripherals in these systems.[1][23] Key models included the Sun 4/260, a deskside workstation equipped with a single SPARC V7 processor running at 16.67 MHz, supporting up to 128 MB of ECC RAM across multiple boards, housed in a 12-slot VME chassis, and featuring onboard SCSI for disk drives such as 560 MB SMD units.[24][23] The Sun 4/280 served as its rackmount counterpart, sharing identical CPU, memory capacity, and SCSI support but designed for server deployments in a 12-slot VME enclosure within a 76-inch data center cabinet.[24][23] For more compact setups, the Sun 4/110 offered a desktop-oriented design with a single SPARC V7/40 processor (Fujitsu MB86900 chip) at 14.28 MHz, up to 32 MB of parity RAM, and a 3-slot VME chassis, including SCSI connectivity for options like 141 MB or 327 MB disks.[25][14][23] At the high end, the Sun 4/470 provided a single SPARC V8 processor at 33 MHz (Cypress CY7C601), expandable to 768 MB of ECC RAM, in a 16-slot VME deskside chassis with SCSI disk support for demanding workloads.[26][24] Upgrade paths allowed compatibility enhancements, such as the Sun 4300 CPU board, which enabled conversion of existing Sun-3 systems to Sun-4 architecture by replacing the 68k-based processor board while retaining the VME chassis and peripherals.[27]| Model | CPU Configuration | Max RAM | Chassis Type | VME Slots | Storage Support |
|---|---|---|---|---|---|
| Sun 4/260 | 1× SPARC V7 @ 16.67 MHz | 128 MB ECC | Deskside | 12 | SCSI (e.g., 560 MB disk) |
| Sun 4/280 | 1× SPARC V7 @ 16.67 MHz | 128 MB ECC | Rackmount (data center) | 12 | SCSI (e.g., 892 MB disk) |
| Sun 4/110 | 1× SPARC V7/40 @ 14.28 MHz (MB86900) | 32 MB parity | Desktop | 3 | SCSI (e.g., 327 MB disk) |
| Sun 4/470 | 1× SPARC V8 @ 33 MHz (CY7C601) | 768 MB ECC | Deskside | 16 | SCSI disks |
