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Left: A MicroVAX 3600 with a disk drive on top. Right: A printer

The MicroVAX is a discontinued family of low-cost minicomputers developed and manufactured by Digital Equipment Corporation (DEC). The first model, the MicroVAX I, shipped in 1984.[1] The series uses processors that implement the VAX instruction set architecture (ISA) and were succeeded by the VAX 4000. Many members of the MicroVAX family have corresponding VAXstation variants, which primarily differ by the addition of graphics hardware.[2] The MicroVAX family supports Digital's VMS, ULTRIX, and VAXELN operating systems. Prior to VMS V5.0, MicroVAX hardware required a dedicated version of VMS named MicroVMS.[3][4]

MicroVAX I

[edit]

The MicroVAX I, code-named Seahorse,[5] introduced in October 1984, was one of DEC's first VAX computers to use very-large-scale integration (VLSI) technology. The KA610 CPU module (also known as the KD32) contains two custom chips which implemented the ALU and FPU while TTL chips were used for everything else. Two variants of the floating point chips are supported, with the chips differing by the type of floating-point instructions supported, F and G, or F and D. The system was implemented on two quad-height Q-bus cards, a Data Path Module (DAP) and Memory Controller (MCT).[6] The MicroVAX I uses Q-bus memory cards, which limits the maximum memory to 4MiB.[6] The performance of the MicroVAX I is rated at 0.3 VUPs, equivalent to the earlier VAX-11/730.[7]

MicroVAX II

[edit]
MicroVAX II front
KA630-AA CPU module

The MicroVAX II, code-named Mayflower, is a mid-range MicroVAX introduced in May 1985 and shipped shortly thereafter.[8] It replaced the original MicroVAX in DEC's product line; the company offered a field upgrade to existing customers. MicroVAX II runs VAX/VMS or, alternatively, ULTRIX, DEC's Unix operating system.[9] At least one non-DEC commercial operating system was available, BSD Unix from mt Xinu.

MicroVAX II was designed to provide 70-110% of VAX-11/780 performance at a lower price. It runs all VAX software but is not compatible with all peripherals, and at launch was not capable of VAXclustering. As DEC did not adjust prices for older computers, Forrester Research predicted that customers would prefer MicroVAX II to VAX-11/725, 730, and possibly 750.[9] It uses the KA630-AA CPU module, a quad-height Q22-Bus module, with a MicroVAX 78032 microprocessor and a MicroVAX 78132 floating-point coprocessor operating at 5 MHz (200 ns cycle time). Two gate arrays on the module implement the external interface for the microprocessor, Q22-bus interface and the scatter-gather map for DMA transfers over the Q22-Bus. The module also contains 1 MB of memory, an interval timer, two ROMs for the boot and diagnostic facility, a DZ console serial line unit, and a time-of-year clock. A 50-pin connector for a ribbon cable near the top left corner of the module provides the means by which more memory is added to the system.

The minicomputer supports 1 to 16 MB of memory through zero, one or two memory expansion modules. The MS630 memory expansion module is used for expanding memory capacity. Four variants of the MS630 exists: the 1 MB MS630-AA, 2 MB MS630-BA, 4 MB MS630-BB and the 8MB MS630-CA. The MS630-AA is a dual-height module, whereas the MS630-BA, MS630-BB, and MS630-CA are quad-height modules. These modules use 256 Kb DRAMs and are protected by byte-parity, with the parity logic located on the module. The modules connect to the CPU module via the backplane through the C and D rows and a 50-conductor ribbon cable. The backplane serves as the address bus and the ribbon cable as the data bus.

The MicroVAX II came in three models of enclosure:

  • BA23
  • BA123
  • 630QE - A deskside enclosure.

DEC at the same time also announced the VAXstation II, a workstation based on MicroVAX II's CPU and also replacing the original VAXstation.[9]

The Robotron K 1820 is a copy of the MicroVAX II developed in the GDR and was produced for a short period of time in 1990.

KA620

[edit]

KA620 refers to a single-board MicroVAX II designed for automatic test equipment and manufacturing applications which only runs DEC's real-time VAXELN operating system. A KA620 with 1 MB of memory bundled with the VAXELN Run-Time Package 2.3 was priced at US$5,000.[10]

Mira

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Mira refers to a fault-tolerant configuration of the MicroVAX II developed by DEC's European Centre for Special Systems located in Annecy in France. The system consists of two MicroVAX 78032 microprocessors, an active and standby microprocessor in a single box, connected by Ethernet and controlled by a software switch. When a fault was detected in the active microprocessor, the workload switches over to the standby microprocessor.[11]

Industrial VAX 630

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A MicroVAX II in BA213 enclosure.

MicroVAX III

[edit]

BA23- or BA123-enclosure MicroVAX upgraded with KA650 CPU module containing a CVAX chip set.

MicroVAX III+

[edit]

BA23- or BA123-enclosure MicroVAX upgraded with KA655 CPU module.

VAX 4

[edit]

BA23- or BA123-enclosure MicroVAX upgraded with KA660 CPU module.

MicroVAX 2000

[edit]

The MicroVAX 2000, code-named TeamMate, is a low-cost MicroVAX introduced on 10 February 1987.[12] In January 1987, the MicroVAX 2000 was the first VAX system targeted at both universities and VAX programmers who wanted to work from remote locations.

The MicroVAX 2000 uses the same microprocessor and floating-point coprocessor as the MicroVAX II, but was feature reduced in order to lower the cost. Limitations are a reduced maximum memory capacity, 14 MB versus 16 MB in MicroVAX II systems, and the lack of Q-Bus or any expansion bus. The system can have a Shugart-based harddrive with ST412 interface and MFM encoding and has a built in 5.25-inch floppy drive (named RX33 in DEC jargon) for software distribution and backup. Supported operating systems are VMS and ULTRIX.[12] It is in a desktop form factor.

MicroVAX 3100 Series

[edit]

The MicroVAX 3100 Series was introduced in 1987. These systems are all packaged in desktop enclosures.

MicroVAX 3100 Model 10
Teammate II
KA41-A, CVAX, 11.11 MHz (90 ns)
MicroVAX 3100 Model 10e
Teammate II
KA41-D, CVAX+, 16.67 MHz (60 ns)
32 MB of memory maximum.
MicroVAX 3100 Model 20
Teammate II
KA41-A, CVAX, 11.11 MHz (90 ns)
A Model 10 in larger enclosure.
MicroVAX 3100 Model 20e
Teammate II
KA41-D, CVAX+, 16.67 MHz (60 ns)
A Model 10e in larger enclosure.
MicroVAX 3100 Model 30
Waverley/S
Entry-level model, developed in Ayr, Scotland[13]
Introduced: 12 October 1993
KA45, SOC, 25 MHz (40 ns)
32 MB of memory maximum.
MicroVAX 3100 Model 40
Waverley/S
Entry-level model, developed in Ayr, Scotland[13]
Introduced: 12 October 1993
KA45, SOC, 25 MHz (40 ns)
8 to 32 MB of memory
A Model 30 in larger enclosure.
MicroVAX 3100 Model 80
Waverley/M
Entry-level model, developed in Ayr, Scotland[13]
Introduced: 12 October 1993
KA47, Mariah, 50 MHz (20 ns), 256 KB external cache
72 MB of memory maximum.
MicroVAX 3100 Model 85
Waverley/M+
Introduced: August 1994[14]
KA55, NVAX, 62.5 MHz (16 ns), 128 KB external cache
16 to 128 MB of memory.
MicroVAX 3100 Model 88
Waverley/M+
Introduced: 8 October 1996[15]
Last order date: 30 September 2000[16]
Last ship date: 31 December 2000[16]
KA58, NVAX, 62.5 MHz (16 ns), 128 KB external cache
64 to 512 MB of memory.
MicroVAX 3100 Model 90
Cheetah
Introduced: 12 October 1993
Identical to the VAX 4000 Model 100, but uses SCSI instead of DSSI
KA50, NVAX, 72 MHz (14 ns), 128 KB external cache
128 MB of memory maximum.
MicroVAX 3100 Model 95
Cheetah+
Introduced: 12 April 1994[17]
Processor: KA51, NVAX, 83.34 MHz (12 ns), 512 KB external cache.
MicroVAX 3100 Model 96
Cheetah++
KA56, NVAX, 100 MHz (10 ns)
16 to 128 MB of memory.
MicroVAX 3100 Model 98
Cheetah++
Introduced: 8 October 1996[15]
Last order date: 30 September 2000[16]
Last ship date: 31 December 2000[16]
KA59, NVAX, 100 MHz (10 ns), 512 KB external cache.
InfoServer 100/150/1000
General purpose storage server (disk, CD-ROM, tape and MOP boot server) related to MicroVAX 3100 Model 10, running custom firmware, KA41-C CPU.[18]

Mayfair

[edit]

MicroVAX 3500 and MicroVAX 3600

[edit]

The MicroVAX 3500 and MicroVAX 3600, code-named Mayfair, were introduced in September 1987 and were meant to be the higher end complement of the MicroVAX family. These new machines feature more than three times the performance of the MicroVAX II and support 32 MB of ECC main memory, twice that of the MicroVAX II. The performance improvements over the MicroVAX II results from the increased clock rate of the CVAX chip set, which operates at 11.11 MHz (90 ns cycle time) along with a two-level, write-through caching architecture. It uses the KA650 CPU module.

MicroVAX 3300 and MicroVAX 3400

[edit]

The MicroVAX 3300 and MicroVAX 3400, code-named Mayfair II, are entry-level to mid-range server computers introduced on 19 October 1988 intended to compete with the IBM AS/400.[19] They used the KA640 CPU module.

MicroVAX 3800 and MicroVAX 3900

[edit]

The MicroVAX 3800 and MicroVAX 3900, code-named Mayfair III, were introduced in April 1989.[20] They are high-end models in the MicroVAX family, replacing the MicroVAX 3500 and MicroVAX 3600, and intended to compete with the IBM AS/400. At introduction, the starting price of the MicroVAX 3800 was US$81,000 and that of the MicroVAX 3900 was US$120,200.[21] A variant of the MicroVAX 3800, the rtVAX 3800, was intended for real-time computing (RTC) applications such as computer-aided manufacturing (CAM). These systems use the KA655 CPU module, which contains a 16.67 MHz (60 ns cycle time) CVAX chip set. They support up to 64 MB of memory.

References

[edit]
Revisions and contributorsEdit on WikipediaRead on Wikipedia

MicroVAX

View on Grokipedia
from Grokipedia
The MicroVAX is a discontinued family of low-end minicomputers developed and manufactured by (DEC) from the 1980s into the early 1990s, designed to deliver the performance and compatibility of the larger VAX systems in a more compact and affordable package using single-chip VLSI implementations of the VAX architecture. The series began with the MicroVAX I in 1984, but gained prominence with the MicroVAX II announced in May 1985, which featured a 78032 CPU chip with 125,000 transistors operating at 20 MHz and supported up to 16 MB of memory, full virtual addressing, and compatibility with VAX/VMS and ULTRIX-32 operating systems. Subsequent models, including the MicroVAX 2000 (1987), 3100, 3300, 3400, 3500, and 3600 series (1987–1988), progressively enhanced performance to 3.7 MIPS, expanded memory to 64 MB, and integrated advanced networking like DECnet and Ethernet, targeting multi-user workstations and small-scale computing environments. Key innovations in the MicroVAX line included emulating missing VAX instructions in software or microcode to ensure binary compatibility with existing VAX applications without recompilation, alongside support for peripherals via the Q-bus and UNIBUS interfaces. The MicroVAX II, for instance, matched the integer performance of the benchmark VAX-11/780 while consuming only 3 W for the CPU and enabling configurations from single-user setups to clusters of up to 90 workstations. Pricing ranged from approximately $7,800 for entry-level models like the MicroVAX 2000 to over $174,000 for high-end configurations such as the MicroVAX 3600, making VAX-level computing accessible to businesses and research institutions previously reliant on costlier mainframes or less capable PDP-11 systems. The MicroVAX family's significance lies in its role as DEC's response to microprocessor-based competition, with over units shipped in the first 3.5 years, solidifying the VAX ecosystem in and paving the way for modern architectures. It supported a wide array of software, including languages like , , and C, and hardware options such as Winchester disks up to 2.5 GB and tape drives, fostering environments for scientific, , and applications.

Overview and History

Origins and Development

In the early 1980s, (DEC) sought to extend the VAX architecture to smaller, more affordable systems by leveraging very-large-scale integration (VLSI) technology, aiming to counter the rise of microprocessor-based workstations and personal computers while maintaining compatibility with existing VAX software ecosystems. This initiative was driven by the need to offer at lower costs, targeting emerging markets beyond traditional installations. The development of the MicroVAX line began under the code name "Seahorse" in 1983, focusing on creating a compact VAX implementation using custom VLSI components. A key effort was the design of the KA610 CPU module for the initial MicroVAX I, which incorporated two custom VLSI chips—one handling the arithmetic logic unit (ALU) and the other the floating-point unit (FPU)—to realize a subset of the VAX instruction set architecture in a reduced form factor. This VLSI approach marked DEC's push toward integrated VAX processors, with development accelerating from initial planning in 1982 to silicon completion by early 1984. The project culminated in the announcement of the MicroVAX I in October 1984, representing a milestone in DEC's strategy to democratize VAX computing. Initial target markets for MicroVAX included universities, small businesses, and engineering departments, where full VAX-11/780 compatibility was desired without the expense of larger minicomputers. These users sought affordable entry points for VAX-based applications, emphasizing the line's ability to run established software in distributed environments. Early engineering challenges centered on achieving binary compatibility with the /780 in a compact , including emulation for subsetted instructions and integration of the VLSI chip set to support multiple operating systems such as VMS, , and VAXELN. Developers addressed limitations in density and complexity through software emulation and hardware assists, ensuring seamless operation across the VAX family while meeting aggressive timelines.

Evolution Timeline

The MicroVAX line began with the introduction of the MicroVAX I in 1984, marking Digital Equipment Corporation's (DEC) entry into low-cost VAX minicomputers using custom VLSI implementations of the (ISA). This initial model laid the foundation for subsequent developments, focusing on desktop systems for engineering workstations and small-scale computing. In May 1985, DEC released the MicroVAX II, code-named Mayflower, which shifted to a single-chip 78032 microprocessor, enabling first customer shipments in June 1985 and providing a field upgrade path from the MicroVAX I. The MicroVAX II achieved performance comparable to larger VAX systems while supporting the full VMS operating system, unlike the earlier MicroVMS variant limited to pre-VMS V5.0 on the MicroVAX I. This transition from multichip to single-chip designs improved cost-efficiency and scalability. The line expanded in February 1987 with the MicroVAX 2000, code-named TeamMate, continuing use of the 78032 processor in a compact desktop form for entry-level applications. Later that year, in September 1987, the series debuted with the MicroVAX 3500 and 3600 models, adopting the CMOS-based CVAX processor for enhanced performance. These high-end models extended through 1989, incorporating further refinements. The MicroVAX 3100 series launched in 1987, evolving processor technology across variants with CVAX in early models, followed by SOC (system-on-a-chip) integrations, the Mariah processor in iterations like Model 80, and NVAX in later ones such as Models 85 and 98. Upgrade paths included transitioning MicroVAX II systems to MicroVAX 3500/3600 equivalents using KA650 or KA655 CPU modules, maintaining compatibility within the Q-bus architecture. By the mid-1990s, the series fully supported VMS V5.0 and beyond, aligning with broader VAX ecosystem advancements. Production concluded with the MicroVAX 3100 Model 98, introduced in 1996 using the NVAX processor, with the final unit shipped on December 31, 2000, ending the MicroVAX era as DEC transitioned to Alpha-based systems.

Technical Architecture

VAX ISA Implementation

The MicroVAX systems implemented the VAX (ISA) as a 32-bit design, featuring demand-paged management to support a 4-gigabyte . This architecture included over 300 instructions, encompassing integer, floating-point, and string operations, with the core MicroVAX subset supporting 175 instructions in the CPU and an additional 70 in the companion (). The demand-paged ensured efficient handling of large applications by allowing pages to be loaded on demand, maintaining compatibility with the VMS operating system. Performance was measured in VAX Units of Performance (VUPs), standardized against the /780 at 1 VUP; for instance, the MicroVAX I achieved 0.3 VUPs, processing approximately 150,000 to 200,000 VAX . This metric highlighted the scaled-down yet functional execution of the full VAX ISA, with average instruction times around 10 microcycles at a 250 ns microcycle rate. The implementation relied on very large-scale integration (VLSI) technology, using custom NMOS chips with to decode and execute VAX instructions, reducing the hardware complexity from mainframe-scale designs to compact form factors. These chips, such as the KD32 in early models, incorporated an on-chip control store of about 1,600 words to handle the intricate VAX decoding, enabling a canonical microarchitectural model (including I-Box for instruction decoding, E-Box for execution, and M-Box for ) shared across VAX systems. Processor chip evolution, such as from the initial multi-chip sets to single-chip integrations, further optimized this -driven approach without altering the ISA. MicroVAX systems provided binary compatibility with larger VAX computers, allowing unmodified software from series to run seamlessly due to the identical ISA and model. This extended to full support for VMS clustering, enabling shared resources across multiple nodes, and networking protocols like DECnet for interconnected operations.

Hardware Components and Features

The MicroVAX series relied on the Q-bus as its primary I/O backbone, an evolution of the original Q22-bus design featuring a 22-bit address bus that enabled access to up to 4 MB of in early implementations, with memory-mapped I/O within this range, support for four interrupt levels and block-mode DMA transfers at bandwidths up to 3 MB/s. This bus facilitated modular expansion through slots, allowing integration of various controllers and devices while maintaining compatibility with VAX architecture peripherals. Later models extended capacities, but the core Q-bus structure emphasized reliability for I/O operations in desktop environments. Memory systems in MicroVAX computers standardized on error-correcting code (ECC) RAM to ensure , with modular designs permitting upgrades via Q-bus cards in increments such as 1 MB, 4 MB, or 8 MB modules using dynamic with cycle times around 400 ns. Base configurations often included onboard on the CPU module, expandable through additional boards to support virtual addressing up to 4 GB, though physical limits varied by enclosure. This approach prioritized and for multitasking workloads. Peripherals were connected via standard Q-bus interfaces, including RX33 5.25-inch floppy drives with 1.2 MB capacity for and ST412-compatible hard disk drives such as the RA60 (205 MB) or RA81 (456 MB) for primary storage. Ethernet connectivity was provided through integrated controllers like the KA640 or optional DEQNA/DELQA modules supporting , while variants offered optional interfaces for monochrome displays up to 800x500 resolution via VT330 terminals. Additional interfaces included RS-232-C serial ports and variants in later integrations for tape and disk clustering. Power and cooling were managed within compact desktop enclosures like the BA23, which housed the backplane, (typically 345 W), and bays while providing forced-air cooling via integrated fans to maintain operational temperatures between 15–32°C and of 20–80%. These enclosures were engineered for office reliability, supporting 24/7 operation with minimal acoustics and robust construction to prevent overheating during sustained loads. Upgrade modularity was a key feature, with Q-bus backplanes enabling straightforward CPU module swaps, such as replacing the 78032 in early systems with the more advanced CVAX via compatible modules like the KA650, without requiring full system replacement. This design allowed incremental enhancements to processing and while preserving peripheral and enclosure compatibility across the series.

Early Models

MicroVAX I

The MicroVAX I, code-named , began shipments in October 1984 and marked Digital Equipment Corporation's (DEC) first implementation of a full VAX architecture using very-large-scale integration (. This compact system pioneered the MicroVAX family by bringing VAX compatibility to a smaller, more affordable form, targeting departmental computing and engineering workstations. It implemented a subset of the VAX (ISA), supporting up to 175 instructions while omitting some optional string operations and lacking initial floating-point hardware in . The (CPU) was provided by the KA610 module, also known as the KD32-AA, which spanned two quad-height Q-bus boards: the M7135 for the datapath and the M7136 for memory control. These boards featured two custom NMOS gate array chips handling the (ALU) and (FPU), operating at a 4 MHz clock speed with a 250 ns cycle time. The design included an 8 KB direct-mapped cache and a 512-entry translation buffer to manage the 32-bit data paths. Communication between components occurred via the CD interconnect, enabling compatibility with existing Q-bus peripherals. Key specifications included a minimum of 512 KB and maximum of 4 MB of ECC MOS RAM, expandable using Q-bus modules like the MSV11-Q series, with the bus itself supporting up to 3.3 MB/s bandwidth. reached approximately 0.3 VAX Units of Performance (VUPs), or 0.36 MIPS, relative to the /780 benchmark of 1.0. The base configuration, housed in a desktop BA23 enclosure, was priced at around for a floor-standing model with 512 KB memory, though fully equipped systems could exceed . Initial operating system support came via MicroVMS, a lightweight version of VMS tailored for smaller systems, with later compatibility for VAX/VMS and ULTRIX-32; it required at least 1 MB of memory for full functionality. Despite its innovations, the MicroVAX I had notable limitations, including the absence of dedicated floating-point hardware at launch—later added via software or upgrades—and no support for or TK50 tape . It also lacked scatter/gather DMA, restricting compatibility with certain controllers. The system was field-upgradable to the MicroVAX II by replacing the CPU module, allowing users to transition to improved performance without full hardware replacement. Overall, approximately 30,000 units were sold, serving primarily as entry-level VAX systems before being eclipsed by faster successors.

MicroVAX II

The MicroVAX II, released in May 1985 and code-named , served as the direct successor to the MicroVAX I, offering a field-upgradeable path that allowed existing systems to incorporate the new processor module within compatible enclosures like the BA23. This model marked a significant advancement in DEC's strategy to deliver compact, cost-effective VAX systems, emphasizing modularity and compatibility with the Q-bus architecture for broader integration in professional and engineering environments. At its core, the MicroVAX II utilized the KA630-AA processor module, featuring the MicroVAX 78032 single-chip CPU running at 5 MHz with a 200 ns cycle time, paired with the 78132 . The 78032, a 32-bit VLSI developed by DEC, provided performance ranging from 70% to 110% that of the VAX-11/780 benchmark, averaging around 0.9 VUP (VAX Units of Performance). specifications included up to 16 MB of parity-checked dynamic RAM (with 1 MB integrated on the CPU board), full support for VMS operating system versions starting from V4.1 and UNIX variants, and base configurations priced between $10,000 and $15,000 depending on memory and storage options. Key variants expanded the MicroVAX II's applicability to specialized markets. The KA620 was a single-board implementation targeted at OEMs and real-time applications, running VAXELN but lacking full VMS support, and available for around $5,000 with 1 MB memory. The Mira configuration provided fault tolerance through a dual-processor setup in a single enclosure, with the two KA630 CPUs linked via Ethernet for automatic failover upon detecting malfunctions in the active unit, developed by DEC's European team. Additionally, the Industrial VAX 630 adapted the system for rugged environments using the BA213 enclosure, featuring enhanced durability for industrial control and process automation. Upgrade paths enabled evolution to subsequent models, with field-installable kits converting the MicroVAX II to the MicroVAX III via the KA650 module and CVAX chip for improved performance, or further to the III+ using the KA655. These enhancements maintained while addressing growing demands for higher throughput in VAX ecosystems.

Entry-Level Models

MicroVAX 2000

The MicroVAX 2000, code-named TeamMate, was announced in January 1987 and began shipping on February 10 of that year as Digital Equipment Corporation's first low-cost, desktop VAX system designed for single-user or small-scale applications. This model repackaged the MicroVAX II's core technology into a compact form factor, emphasizing affordability and ease of use over enterprise , making it suitable for environments outside traditional data centers. At its heart, the MicroVAX 2000 utilized the same 78032 as the MicroVAX II, clocked at 5 MHz with a 200 ns cycle time, paired with the 78132 on the KA410 system module. Memory capacity started at 2 MB of ECC RAM and could expand to a total maximum of 16 MB (2 MB base plus up to 14 MB via optional MS400 modules), providing sufficient resources for typical programming and development tasks. Storage included an integrated RX33 5.25-inch floppy drive capable of 1.2 MB capacity and support for ST412-interface hard disk drives such as the 42 MB RD32 or 71 MB RD53, both in half- or full-height configurations. The system delivered approximately 0.9 VUPs (VAX Units of Performance), roughly equivalent to 7 transactions per second, positioning it as a cost-effective into the VAX . The base configuration, including 4 MB memory and a 42 MB disk, was priced at US$6,000, with educational discounts available for universities to broaden access. Targeted primarily at individual programmers, academic users, and small development teams, the MicroVAX 2000 featured a simplified setup process with built-in diagnostics and boot ROMs, allowing quick deployment without the need for specialized clustering or multi-user configurations common in higher-end models. It supported VMS and operating systems, enabling and light computational workloads in desktop settings. While expandability was limited compared to the modular MicroVAX II—offering only a single Q-bus slot for options like additional memory or peripherals—the system included basic ThinWire Ethernet connectivity via an integrated DEQNA module, facilitating network access for and remote operations. This design choice prioritized compactness and reduced complexity, appealing to non-enterprise users seeking VAX compatibility at a fraction of the cost.

MicroVAX 3100 Series

The MicroVAX 3100 series, introduced in 1989 by (DEC), represented an evolution in entry-level desktop VAX systems designed for departmental and workgroup computing in small offices and laboratories. These models emphasized affordability and compatibility with VMS and operating systems, succeeding earlier MicroVAX II and 2000 lines by integrating the CPU directly onto the to reduce costs and footprint. The series spanned from basic configurations to more advanced variants, with the final model, the 98, introduced in 1996 and shipments continuing until 2000 to support legacy installations. Key early models included the 10 and 10e, which utilized the KA41 CPU module with a CVAX or CVAX+ processor running at 11.11 MHz or 16.67 MHz, respectively, and supported up to 32 MB of RAM. The Model 20 and 20e offered similar but added a variant known as the InfoServer 100, optimized for network file serving and storage tasks with enhanced connectivity. Progressing to the Model 30, introduced around 1993, featured the KA45 module with a single-chip SOC processor at 25 MHz and a maximum of 32 MB memory, providing improved efficiency for basic multitasking. Similar to the Model 30, the Model 40 provided additional internal storage options. The Model 80, announced in 1991, advanced further with the KA47 module incorporating the Mariah processor at 50 MHz and up to 72 MB RAM, delivering approximately 12 VUPs for more demanding entry-level applications. Later models shifted to the NVAX processor family for higher performance. The Models 85, 88, 90, 95, 96, and 98 employed KA55, KA58, KA50, KA51, KA56, and KA59 modules, respectively, with NVAX clocks ranging from 62.5 MHz to 100 MHz and external caches up to 128 KB, supporting maximum memory from 128 MB to 512 MB. For instance, the Model 90 achieved 24 VUPs, while the Model 98 reached 38 VUPs, enabling support for up to 44 active workstations. These configurations prioritized interfaces for up to five internal drives and Ethernet for networked environments, making the series suitable for without the complexity of rack-mounted systems.
ModelCPU ModuleProcessorClock SpeedMax RAMApprox. VUPs
10/10eKA41CVAX/CVAX+11.11/16.67 MHz32 MB3-5
20/20eKA41CVAX/CVAX+11.11/16.67 MHz32 MB3-5
30KA45SOC25 MHz32 MB5
80KA47Mariah50 MHz72 MB12
85/88KA55/KA58NVAX62.5 MHz128 MB16
90KA50NVAX72 MHz128 MB24
95KA51NVAX83.3 MHz128 MB29
96/98KA56/KA59NVAX100 MHz512 MB38

High-End Models

Mayfair Overview

The Mayfair family represented Digital Equipment Corporation's (DEC) higher-end extension of the MicroVAX line, code-named and first launched in September 1987 with the MicroVAX 3500 and 3600 models. These systems were strategically positioned above the entry-level MicroVAX 3100 series for departmental computing needs while remaining below the performance and cost of full-scale VAX minicomputers. Designed to challenge emerging competitors like the in the mid-range server market, Mayfair emphasized cost-effective scalability for multi-user applications without sacrificing VAX compatibility. At its core, the design focused on rack-mountable enclosures to facilitate deployment in enterprise settings, powered by CVAX-based CPU modules including the KA650, KA640, and KA655. These processors prioritized expandability, supporting configurations for up to dozens of simultaneous users in shared environments through modular I/O options and storage interconnects like the Digital Storage Systems Interconnect (DSSI). The architecture integrated seamlessly with DEC's ecosystem, including the CVAX processor for improved instruction execution over prior MicroVAX iterations. Key specifications included CVAX clock speeds ranging from 10 MHz to 16.67 MHz across the family, enabling reliable performance for demanding workloads, along with support for VMS clustering via VAXcluster technology, built-in Ethernet for networked operations, and maximum memory capacities of 64 MB. Targeted primarily at business departments handling , such as order entry and database management, systems delivered robust uptime and data integrity essential for mid-sized organizational computing. DEC's pricing strategy for positioned base configurations in the $30,000 to $50,000 range, intentionally undercutting the expense of larger VAX installations while offering comparable enterprise features to attract cost-conscious customers.

Mayfair Configurations

The MicroVAX configurations encompassed several high-end models designed for departmental , featuring the CVAX processor implementations in rack-mountable or enclosures. The initial models, MicroVAX and 3600, were announced in September and utilized the KA650 CPU module with a CVAX chip operating at an 11.11 MHz clock speed (90 ns cycle time), delivering approximately 2.7 VUPs of . These systems supported up to 32 MB of ECC main memory for the 3500 and 64 MB for the 3600, and were housed in 19-inch rack-compatible formats: the 3500 in a BA213 enclosure and the 3600 in an H9644 cabinet for expanded storage options. Key features included up to 12 Q-bus slots for I/O expansion at 3.3 MB/s, optional TK70 tape drives for backup, and DSSI bus support for disk arrays. Following in October 1988, the MicroVAX 3300 and 3400 models introduced the KA640 CPU, a variant of the CVAX chip at 10 MHz (100 ns cycle time) with 2.4 VUPs, optimized for enhanced I/O capacity to support 8-16 concurrent users in office environments. capacity reached a maximum of 32 MB ECC, with 4 MB onboard, and enclosures varied: the 3300 in a compact minitower and the 3400 in the BA213 pedestal for better scalability. These configurations retained Q-bus expandability (up to 12 slots) and optional tape drives like the TK70, while adding fault-tolerant options via DSSI dual-host clustering for improved reliability. The top-tier MicroVAX 3800 and 3900, released in April 1989, employed the KA655 CPU with a faster CVAX+ chip at 16.67 MHz (60 ns cycle time), achieving 3.8 VUPs—about 1.4 times the performance of the /3600 series—and supporting up to 64 MB . Priced at $81,000 for the 3800 (BA213 enclosure) and $120,200 for the 3900 (H9644 cabinet with integrated RA90 disk), these models emphasized high-availability features, including additional Q-bus slots, optional streaming tape drives, and advanced fault-tolerant DSSI configurations for mission-critical applications. Upgrade paths from earlier systems to the 3800/3900 series were available, providing a migration route toward the subsequent VAX 4000 lineup.
Model PairAnnouncement DateCPU ModuleClock SpeedMax Memory (ECC)Performance (VUPs)Enclosure Type
3500/3600September 1987KA65011.11 MHz64 MB2.7BA213 / H9644
3300/3400October 1988KA64010 MHz32 MB2.4Minitower / BA213
3800/3900April 1989KA65516.67 MHz64 MB3.8BA213 / H9644

Legacy and Impact

Market Adoption

The MicroVAX family experienced robust market adoption throughout the 1980s, with Digital Equipment Corporation (DEC) reporting sales exceeding 150,000 units by 1990 since its launch in 1984. This success supplanted DEC's earlier PDP-11 line in the low-end multiuser segment and established MicroVAX as a staple for departmental computing. For example, the MicroVAX II model alone shipped approximately 65,000 units between 1985 and 1987. The systems found widespread use in academia, particularly universities for engineering research and educational administration, as well as in small businesses for accounting and computer-aided design/engineering (CAD/CAE) tasks, and in government agencies for federal contracts requiring reliable multiuser environments. Key applications leveraged the MicroVAX's VMS operating system for scientific simulations, such as flight simulation and in realtime environments, alongside database management using tools like DECtp and for distributed processing and inventory control. In office settings, the systems supported early networked operations through DECnet and VAXcluster technologies, enabling , , and across multivendor environments. VMS's built-in file and system security features further appealed to government users handling sensitive data. Sales were propelled by aggressive price reductions, which lowered entry-level models like the MicroVAX 2000 through significant cuts in the late , alongside leasing options through DEC's Technology Migration program. Full binary compatibility with the broader VAX software ecosystem, including over 6,000 applications runnable under VMS, allowed seamless migration for existing DEC customers and reduced development costs. Despite these strengths, the MicroVAX faced intensifying competition from ' UNIX-based workstations, which saw rapid sales growth in engineering markets, and from emerging PCs like the PC/XT offering lower-cost alternatives. Nonetheless, MicroVAX secured a prominent position in the expanding low-end 32-bit market, projected to grow from 25,000 units shipped in 1983 to over 346,000 by 1988, driven by its multiuser capabilities and VMS reliability. In engineering firms, MicroVAX systems were particularly prevalent for CAD/CAE workflows, supporting tools for design and in and applications. Federal research institutions also relied on them for secure, in scientific and engineering projects.

Successors and End of Line

The MicroVAX line was gradually phased out by the mid-1990s, with the VAX 4000 series serving as its direct successor starting in 1990. These systems maintained similar desktop and rack-mounted form factors but incorporated enhanced NVAX processors for improved performance in low-end VAX applications. Digital Equipment Corporation (DEC) began transitioning from the VAX architecture to the 64-bit Alpha AXP in 1992, marking a strategic shift toward RISC designs to address scalability limitations in VAX systems. was ported natively to Alpha, enabling source code recompilation for most applications while providing emulation and compatibility layers for legacy VAX binaries to ensure a smooth migration path. Native VAX hardware production concluded with final shipments in June 1998, after which DEC and its successors focused on Alpha-based platforms. Extended software support for on VAX systems persisted beyond hardware discontinuation, with (HP), DEC's successor after acquisitions, providing maintenance until December 2012 for the final VAX version (7.3). The MicroVAX's emphasis on compact, affordable VAX implementations paved the way for the workstation market by demonstrating viable desktop computing for and scientific workloads, influencing DEC's evolution toward integrated server-workstation hybrids. It also shaped later products like the VAXserver series, which adapted MicroVAX designs for dedicated file and bootstrap services in clustered environments. Today, MicroVAX systems attract interest from retrocomputing collectors, who value their role in history and maintain dedicated museums and restorations to preserve VAX-era hardware. Documentation on specific design challenges resolved in VAX 4000 and Alpha successors remains limited, often confined to internal DEC technical journals.

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