Xenon (processor)
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Microsoft XCPU
(codenamed Xenon)
Picture of the microprocessor (XCPU-ES shown)
General information
Designed byIBM
Common manufacturer
Physical specifications
Cores
  • 3 cores
Cache
L1 cache32/32 KB
L2 cache1 MB
Architecture and classification
Instruction setPowerPC

Microsoft XCPU, codenamed Xenon, is a CPU used in the Xbox 360 game console, to be used with ATI's Xenos graphics chip.

The processor was developed by Microsoft and IBM under the IBM chip program codenamed "Waternoose", which was named after the Monsters, Inc. character Henry J. Waternoose III.[1] The development program was originally announced on November 3, 2003.[2]

The processor is based on IBM PowerPC instruction set architecture. It consists of three independent processor cores on a single die. These cores are slightly modified versions of the PPE in the Cell processor used on the PlayStation 3.[3][4] Each core has two symmetric hardware threads (SMT), for a total of six hardware threads available to games. Each individual core also includes 32 KB of L1 instruction cache and 32 KB of L1 data cache.

The XCPU processors were manufactured at IBM's East Fishkill, New York fabrication plant and Chartered Semiconductor Manufacturing (now part of GlobalFoundries) in Singapore.[5] Chartered reduced the fabrication process in 2007 to 65 nm from 90 nm, thus reducing manufacturing costs for Microsoft.

Specifications

[edit]

XCGPU

[edit]

The Xbox 360 S introduced the XCGPU (codename Vejle), which integrated the Xenon CPU and the Xenos GPU onto the same die, and the eDRAM into the same package. The XCGPU follows the trend started with the integrated EE+GS in PlayStation 2 Slimline, combining CPU, GPU, memory controllers and IO in a single cost-reduced chip. It also contains a "front side bus replacement block" that connects the CPU and GPU internally in exactly the same manner as the front side bus would have done when the CPU and GPU were separate chips, so that the XCGPU doesn't change the hardware characteristics of the Xbox 360.

XCGPU contains 372 million transistors and is manufactured by GlobalFoundries on a 45 nm process. Compared to the original chipset in the Xbox 360 the combined power requirements are reduced by 60% and the physical chip area by 50%.[10][11]

In 2014, the Winchester Xbox 360 system introduced a shrunken XCGPU on a 32 nm process (codename Oban). This chip is no longer a multi-chip-module and integrates the eDRAM into the main die.

[edit]

Illustrations of the different generations of processors in Xbox 360 and Xbox 360 S.

  • The original XCPU DD2 ES manufactured at 90 nm by IBM in 2005. ES stands for "Engineering Sample" and the device is packaged by IBM at their Bromont facility in Canada. It runs at 2.8GHz, as opposed to the final chip, which ran at 3.2GHz.
    The original XCPU DD2 ES manufactured at 90 nm by IBM in 2005. ES stands for "Engineering Sample" and the device is packaged by IBM at their Bromont facility in Canada. It runs at 2.8GHz, as opposed to the final chip, which ran at 3.2GHz.
  • The 90nm XCPU DD3 manufactured at 90 nm by Chartered in Singapore 2006
    The 90nm XCPU DD3 manufactured at 90 nm by Chartered in Singapore 2006
  • The 65nm XCPU "Loki" manufactured at 65 nm by Chartered in Singapore 2007
    The 65nm XCPU "Loki" manufactured at 65 nm by Chartered in Singapore 2007
  • The two chips of the XCGPU "Vejle": The larger is the XCGPU itself and the smaller is the 10 MB eDRAM. Manufactured at 45 nm by Global Foundries in Singapore in 2010.
    The two chips of the XCGPU "Vejle": The larger is the XCGPU itself and the smaller is the 10 MB eDRAM. Manufactured at 45 nm by Global Foundries in Singapore in 2010.
  • The XCGPU with heatspreader. The complete device is packaged by IBM at their Bromont facility in Canada.
    The XCGPU with heatspreader. The complete device is packaged by IBM at their Bromont facility in Canada.

References

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Xenon (processor)

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from Grokipedia
The Xenon is the codename for the custom central processing unit (CPU) developed by IBM exclusively for Microsoft's Xbox 360 video game console, which launched in 2005. This triple-core processor is based on the PowerPC architecture, with each core clocked at 3.2 GHz and capable of simultaneous multithreading to handle two hardware threads per core, enabling up to six concurrent threads for improved parallel processing in gaming workloads.[1][2][3] Architecturally, the Xenon employs three symmetric PowerPC Processing Elements (PPEs) connected via a high-speed internal bus operating at 3.2 GHz, featuring in-order execution pipelines optimized for low latency in multi-threaded environments. It includes 32 KiB of L1 instruction cache and 32 KiB of L1 data cache per core, supplemented by a shared 1 MB L2 cache that can be partially locked for graphics-related tasks to enhance system performance in a unified memory architecture. Each core integrates a VMX128 vector multimedia extension unit with 128 128-bit registers, tailored for Direct3D shader computations and vector operations common in 3D graphics rendering. The processor was fabricated on a 90 nm process node by IBM, containing approximately 165 million transistors, and later variants were shrunk to 65 nm for improved power efficiency in subsequent Xbox 360 revisions.[3][2][4] The Xenon's development stemmed from a collaboration between IBM and Microsoft, drawing partial inspiration from the Cell processor project (initially for the PlayStation 3) but emphasizing homogeneous multi-core design without heterogeneous synergistic units to simplify game programming. Notable for its integrated security features, including a hidden cryptographic subsystem with AES-128 encryption, eFuses for secure boot, and a 32 KiB ROM for initial bootloader operations, the Xenon ensured robust protection against tampering in the console environment. Despite its age, the processor's efficient threading model contributed significantly to the Xbox 360's longevity, supporting complex titles through the console's lifecycle until 2016.[3][2]

History and development

Design origins

The development of the Xenon processor stemmed from a strategic collaboration between Microsoft and IBM, which began in 2002 as Microsoft initiated planning for the successor to its original Xbox console. Microsoft selected IBM to design a custom central processing unit optimized for high-performance gaming, leveraging IBM's expertise in PowerPC architectures. This partnership resulted in a tailored processor that diverged from standard commercial designs to meet the unique requirements of console hardware.[5] Xenon drew its technical foundations from IBM's Power Processing Element (PPE), originally developed as part of the Cell processor architecture for heterogeneous computing. Unlike the Cell, which combined one PPE with multiple specialized Synergistic Processing Elements (SPEs) for vector-heavy tasks, Xenon featured three identical symmetric PPE cores to enable balanced, general-purpose processing. This customization prioritized scalability within a constrained die area while maintaining compatibility with the PowerPC instruction set architecture.[6][3] The core design philosophy of Xenon focused on exploiting thread-level parallelism (TLP) to address the irregular, multi-threaded nature of gaming workloads, where developers could distribute tasks across cores for improved throughput. To achieve this efficiently, each core adopted an in-order execution model, eschewing the power-hungry out-of-order execution pipelines found in contemporary desktop processors; this approach significantly reduced complexity, die size, and power draw without sacrificing the parallelism essential for real-time rendering and simulation.[6][3] A key aspect of Xenon's design was the deliberate exclusion of SPEs, which were integral to the Cell's high-performance vector processing but introduced significant programming challenges due to their heterogeneous nature and limited instruction sets. By committing to symmetric PPE cores, Microsoft and IBM simplified the development model for game programmers, allowing standard multi-threading techniques without the need to manage specialized coprocessors or data transfers between dissimilar units. This uniform architecture facilitated faster porting of software and broader tool support, aligning with the goal of accessible high-performance computing in a consumer console.[3]

Announcement and production

The Xenon processor was officially announced on November 3, 2003, as part of a technology licensing agreement between Microsoft and IBM for semiconductor processors to power future Xbox products.[7][8] Manufacturing of the Xenon processor was handled primarily by IBM, with additional production outsourced to Chartered Semiconductor Manufacturing in Singapore under license from IBM and Microsoft.[9] Initial production ramped up during 2004 and 2005 to meet demand for the upcoming console launch. The processor debuted with the Xbox 360's worldwide rollout, beginning in North America on November 22, 2005, followed by Europe on December 2 and Japan on December 10.[10] By the end of its lifecycle, over 80 million Xbox 360 units incorporating the Xenon processor had been produced and sold globally.[11]

Architecture

Processor cores

The Xenon processor incorporates three identical PowerPC Processing Elements (PPEs), each configured as a 64-bit, two-way superscalar, in-order core derived from the design used in IBM's Cell processor.[6][12] These cores handle general-purpose scalar computations, emphasizing efficient throughput for gaming workloads through their balanced architecture. Each PPE supports simultaneous multithreading (SMT) with two hardware threads, enabling the processor to manage up to six concurrent threads overall and improving utilization of the execution resources under varying loads.[6] The execution model relies on in-order instruction dispatch, which simplifies the design and power consumption while prioritizing predictable performance in real-time environments. The pipeline in each core spans 21 stages, facilitating high clock speeds but requiring careful software management to mitigate latency from mispredicted branches, which use static prediction mechanisms without dynamic out-of-order reordering.[6] This deep pipeline structure supports the core's focus on sustained instruction throughput rather than speculative complexity. For arithmetic operations, each core includes an integer arithmetic logic unit (ALU), a scalar floating-point unit (FPU) optimized for 64-bit precision, a branch unit, and a load/store unit, enabling paired execution of scalar instructions per cycle when possible within the two-way superscalar framework.[3][13]

Vector processing and extensions

The Xenon processor incorporates a VMX-128 vector media extension unit in each of its three cores, providing dedicated hardware acceleration for multimedia and graphics workloads.[13] This unit supports 4-way single instruction, multiple data (SIMD) operations across floating-point, permute, and simple execution pipelines, enabling efficient processing of 128-bit (16-byte) vectors for integer, floating-point, and packed data types.[13] Each core features a duplicated register file for its dual-threaded execution model, yielding 128 128-bit vector registers per thread and 256 total per core, which allows independent vector operations for concurrent threads without context switching overhead.[6] Xenon's VMX-128 implementation includes specialized load and store instructions optimized for Direct3D compressed data formats, facilitating rapid decompression and manipulation of texture and vertex data in gaming applications.[13] It also supports paired singles floating-point operations through its 4-way SIMD capabilities, allowing simultaneous computation on two 64-bit pairs within a 128-bit register for tasks like 3D transformations.[13] Custom extensions to the underlying PowerPC instruction set further enhance performance, including a dedicated single-cycle dot-product instruction for vector mathematics in graphics and physics simulations, as well as branch hints to optimize prediction in branch-heavy code sequences common in game logic and AI.[6][13] Unlike the full AltiVec vector extension in standard PowerPC processors, Xenon's VMX-128 is a tailored subset focused on gaming efficiency, omitting certain general-purpose features in favor of graphics-specific enhancements like the D3D format support and custom dot-product, which streamline 3D rendering and simulation workloads.[13] This design enables the processor to handle parallel vector tasks effectively within its in-order execution pipeline, contributing to the Xbox 360's capabilities in real-time graphics and physics processing.[6]

Cache and memory subsystem

The Xenon processor utilizes a Harvard architecture for its primary caches, with each of the three cores equipped with a dedicated 32 KB L1 instruction cache and a 32 KB L1 data cache, the instruction cache implemented as a 2-way set-associative structure and the data cache as a 4-way set-associative structure to balance hit rates and complexity in a multithreaded environment.[6][13] These L1 caches provide fast, private access for core-specific operations, minimizing latency for frequently used instructions and data while supporting the processor's symmetric multithreading model.[14] A shared 1 MB unified L2 cache serves all three cores, configured as 8-way set-associative with 128-byte cache lines to promote efficient data reuse across threads and reduce contention in bandwidth-limited scenarios.[14][13] This L2 cache incorporates software-controlled prefetching mechanisms, allowing developers to issue hints for anticipating data needs and mitigating stalls in streaming-heavy workloads typical of gaming applications.[6] The memory subsystem interfaces with 512 MB of GDDR3 RAM through a 128-bit wide front-side bus clocked at 711 MHz, achieving a peak bandwidth of 22.4 GB/s to support high-throughput demands from both CPU and integrated graphics processing.[2] This unified memory design enables seamless sharing between the Xenon CPU and the Xenos GPU, eliminating the need for dedicated video memory pools and optimizing overall system resource utilization.[2] Direct memory access (DMA) capabilities allow the GPU to perform efficient transfers to and from main memory without CPU intervention, enhancing performance for graphics-intensive tasks.[14] Cache coherency in this shared environment is managed via software protocols, requiring explicit invalidations and flushes to synchronize CPU cache states with GPU modifications and prevent data inconsistencies.[6]

Specifications

Core parameters

The original Xenon processor features three symmetric cores, each operating at a clock speed of 3.2 GHz, providing a total theoretical throughput of 9.6 GHz across the multi-core design.[2] The CPU incorporates approximately 165 million transistors on its original die, fabricated using IBM's 90 nm SOI process technology.[14] Power consumption for the CPU package is rated at a thermal design power (TDP) of 75-85 W, reflecting the high-performance demands of the triple-core configuration in the console environment.[15] The die measures 168 mm², balancing performance density with manufacturing constraints at the 90 nm node. These parameters support the cores' superscalar architecture and simultaneous multithreading capabilities, allowing efficient handling of dual threads per core without delving into detailed functional implementation.[6]
ParameterValue
Clock Speed3.2 GHz (per core, all three cores)
Transistor Count165 million
TDP75-85 W
Die Size168 mm² (90 nm process)

Process technology

The Xenon processor was fabricated by IBM using a 90 nm silicon-on-insulator (SOI) CMOS process. This SOI technology, derived from the PowerPC architecture, provided benefits such as reduced parasitic capacitance and improved transistor drive current compared to bulk silicon processes.[16] This scaling enabled a transistor density that supported 165 million transistors on a 168 mm² die, balancing speed and thermal efficiency for console applications.[17] Xenon chips were packaged in a flip-chip ball grid array (BGA) configuration, facilitating direct attachment to the Xbox 360 motherboard with integrated voltage regulators to deliver stable power distribution and minimize signal integrity issues.[6] Early production encountered challenges with defect rates in the 90 nm node; the CPU yield was as low as 16%, contributing to overall console yields of around 32% in initial manufacturing runs due to process maturation issues at IBM's East Fishkill facility.[18] These factors increased costs and delayed volume ramp-up, though subsequent optimizations improved reliability for the SOI-based chips.[19]

Revisions and variants

Loki revision

The Loki revision of the Xenon processor was introduced in late 2007 alongside the Falcon motherboard update for the Xbox 360 console. This marked the first major hardware revision of the CPU, transitioning from the original Waternoose variant to address power and manufacturing efficiency concerns in ongoing production.[20][21] The key change involved a process shrink to 65 nm silicon-on-insulator (SOI) technology from the baseline 90 nm node, enabling a slight redesign for better power management while maintaining the core architecture, including the triple-core configuration and 3.2 GHz clock speed. This adjustment optimized transistor density and layout for reduced leakage and heat generation, though specific transistor counts remained around 165 million, similar to the original.[22][21] As a result, the TDP dropped significantly to 41 W from the original's 75–85 W range, representing over a 50% reduction in power draw without altering performance parameters. This efficiency gain facilitated smaller cooling solutions and contributed to lower overall system thermals in later Xbox 360 models.[21][15] Production of the Loki revision shifted toward greater use of Chartered Semiconductor Manufacturing facilities (later acquired by GlobalFoundries), which helped improve yields and support scaled manufacturing demands for the Xbox 360 lineup.[23]

XCGPU and later integrations

The XCGPU, a system-on-chip integrating the Xenon CPU and Xenos GPU with a separate 10 MB eDRAM die, was introduced in mid-2010 alongside the Xbox 360 S (Slim) model to streamline motherboard design and reduce overall system complexity.[24] Fabricated on a 45 nm process (codename Vejle), this single die measures 170 mm² and contains 372 million transistors.[25] The core architecture of the Xenon processor remains unchanged from the original discrete implementation.[26] This integration yielded significant efficiency gains over the original 90 nm discrete CPU and 65 nm GPU setup, achieving more than 60% reduction in power consumption and over 50% smaller silicon area, while maintaining backward compatibility through emulated front-side bus signaling.[26] In 2014, a further revision known as "Winchester" appeared in the Xbox 360 E model, shrinking the XCGPU (codename Oban) to a 32 nm process and fully integrating the eDRAM onto the main die, eliminating the separate eDRAM chip and heat spreader for additional reductions in power draw and physical footprint.[27]

Integration and performance

Role in Xbox 360 system

The Xenon processor operates within the Xbox 360's unified memory architecture (UMA), sharing 512 MB of GDDR3 RAM with the Xenos graphics processing unit (GPU) to enable efficient resource allocation for gaming workloads.[28][3] This shared pool, clocked at 700 MHz on a 128-bit bus, provides a total system bandwidth of 22.4 GB/s, which is divided between the CPU and GPU via an internal high-speed bus to support simultaneous access for tasks like vertex processing and texture loading.[28] Xenon connects to the Xenos GPU through a front-side bus offering 10.8 GB/s of bidirectional bandwidth, facilitating the transfer of command buffers, texture data, and other graphics primitives directly from the CPU to the GPU without excessive latency.[28][3] This interconnect, comprising two unidirectional lanes, ensures that the CPU can stream data efficiently to the GPU's memory controller, optimizing the flow of assets in real-time rendering pipelines. The processor is tightly integrated with the Xbox 360's operating system kernel, which includes a hypervisor layer for resource partitioning and security, allowing Xenon to execute multithreaded game code optimized for its three-core design.[3] It maintains direct access to the southbridge I/O controller via a PCI Express interface routed through the GPU, enabling low-overhead handling of peripherals such as controllers, optical drives, and storage devices without interrupting core processing tasks.[3] Early Xbox 360 models featuring the Xenon processor employed an air-cooled heatsink design to manage thermal output from its 90 nm process and 3.2 GHz operation, though this contributed to reliability issues like overheating in prolonged use. Subsequent hardware revisions, such as the Zephyr motherboard, incorporated enhanced thermal solutions including improved heatsink materials and enlarged GPU heatsink for better heat dissipation, allowing sustained performance at the full clock speed with reduced failure rates.[3] The cache subsystem further aids this integration by providing fast local access to shared memory regions, minimizing bus contention during I/O operations.[6]

Benchmarks and comparisons

The Xenon processor's multi-threaded performance reaches a theoretical peak of 19.2 GFLOPS for scalar operations, calculated as three cores operating at 3.2 GHz with two floating-point operations (FMA) per cycle, enabling efficient handling of parallel workloads such as graphics rendering and physics simulations in games.[6] This vector-heavy design, incorporating VMX-128 units in each core, supports up to 115 GFLOPS overall when fully utilized across its six hardware threads (via symmetric multithreading), making it well-suited for the thread-level parallelism demanded by console gaming.[6] In single-threaded tasks, however, Xenon's in-order execution core imposes limitations, performing weaker than contemporary out-of-order CPUs due to its narrow pipeline and lack of speculative execution. Cache miss latency in the unified memory architecture (UMA) approaches approximately 600 cycles for main memory access, exacerbated by the shared 512 MB GDDR3 pool between CPU and GPU, which can stall serial operations like AI decision-making or game logic.[6] The 1 MB shared L2 cache, while adequate for streaming data patterns, proves small for six threads, further impacting latency-sensitive code.[6] Compared to the PlayStation 3's Cell processor, Xenon offers similar multi-core floating-point throughput but with greater developer accessibility owing to its symmetric triple-core design, which simplifies threading without the need to manage Cell's heterogeneous Synergistic Processing Elements (SPEs).[6] Developers reported Xenon's uniformity eased parallelization for general game tasks, whereas Cell's SPEs excelled in specialized vector processing—up to 230 GFLOPS—but required complex data distribution, often underutilizing potential in early titles.[6] Against the PowerPC G5 (970), Xenon's cores feature a narrower issue width and lower power envelope (80 W TDP versus G5's up to 100 W per core), trading single-thread efficiency for multi-thread scalability; the G5's out-of-order execution and dual floating-point units provided superior ILP for branch-heavy workloads but at higher energy cost.[6] In real-world applications, Xenon contributed to the Xbox 360's system-level performance exceeding 1 TFLOPS, supporting 720p and 1080i resolutions in demanding titles.[29] Games like Halo 3 effectively leveraged all six threads for concurrent physics, AI, and rendering, achieving stable 60 FPS at 720p while demonstrating Xenon's strengths in balanced multi-threaded scenarios.[6]

Legacy

Industry impact

The Xenon processor played a pivotal role in the commercial success of the Xbox 360 console, which sold approximately 84 million units worldwide by the end of its lifecycle. This figure marked a significant improvement over the original Xbox's 24 million units, positioning Microsoft as a stronger contender in the seventh-generation gaming market. The console initially outsold the PlayStation 3, capturing a larger market share in its early years, partly because Xenon's symmetric triple-core design facilitated easier multi-core programming for developers compared to the more complex heterogeneous architecture of the PS3's Cell processor.[30][31][6] Xenon's architecture accelerated the industry's shift toward multi-threading in game development, as developers adapted to its three homogeneous PowerPC cores to maximize performance in parallel tasks like AI and physics simulations. This transition influenced key middleware and engines, including Unreal Engine 3, which Epic Games optimized specifically for Xenon's multi-core capabilities to deliver efficient cross-platform development on the Xbox 360. The processor's design encouraged broader adoption of parallel programming practices, setting a precedent for subsequent console and PC game engines that prioritized thread-level parallelism.[32] Economically, Microsoft's partnership with IBM for Xenon development helped reduce production costs by leveraging shared PowerPC technology originally invested in by Sony and Toshiba for the Cell processor, allowing Microsoft to avoid bearing the full R&D burden estimated at $400 million. This cost efficiency enabled an aggressive launch pricing strategy, with the base Xbox 360 Core model priced at $299 in 2005, undercutting competitors and contributing to strong initial sales momentum.[33][34] However, early Xenon implementations faced challenges related to heat output, contributing to the widespread "Red Ring of Death" hardware failures that affected early units with failure rates estimated between 23.7% and 54.2% due to inadequate thermal management and solder joint stress on the CPU and GPU. These issues prompted Microsoft to extend the Xbox 360 warranty to three years in 2007, incurring a $1.15 billion pre-tax charge to cover repair costs and mitigate reputational damage.[35][36][37]

Technological influence

The Xenon processor pioneered symmetric multi-core architecture in consumer gaming hardware with its three identical PowerPC cores, released in 2005 at a time when multi-core CPUs were not yet widely available in PCs.[3] This design emphasized thread-level parallelism through hardware support for two threads per core via simultaneous multithreading (SMT), enabling up to six concurrent threads overall, which helped demonstrate the viability of multi-core processing for real-time applications like gaming.[6] By showcasing efficient multi-threading in a mass-market device, Xenon contributed to the broader momentum toward multi-core and multi-threading features in PC processors. Xenon's VMX vector extensions, featuring 128-bit registers optimized for media processing and 3D workloads, represented an advancement in vector processing tailored for gaming.[6] Compared to the asymmetric Cell processor in the PlayStation 3, Xenon's uniform cores and SMT made it more straightforward for developers to exploit multi-threading, influencing design priorities toward symmetric architectures in later gaming systems.[6] The PowerPC foundation of Xenon extended its legacy to embedded systems, where derivatives of the architecture continue to power networking equipment due to their balance of performance and power efficiency, mirroring Xenon's focus on streamlined execution for constrained environments.[38] Xenon's legacy also includes official backward compatibility support on later Microsoft consoles; as of 2025, the Xbox Series X and Series S emulate the Xenon processor to run select Xbox 360 games, preserving access to its software library.[39] Additionally, third-party emulators such as Xenia actively leverage the Xenon instruction set architecture (ISA) to enable backward compatibility for Xbox 360 software on modern PCs, underscoring the enduring relevance of its software ecosystem and the challenges in emulating its custom features.[40]

References

  1. Xbox 360 is launched - Microsoft UK Stories
  2. ATI Xenos: Xbox 360 Graphics Demystified - Beyond3D
  3. Xbox 360 Architecture | A Practical Analysis - Rodrigo Copetti
  4. Xbox 360 CPU to get die shrink | Ars OpenForum - Ars Technica
  5. Inside the Xbox 360, part I: procedural synthesis and dynamic worlds
  6. Inside the Xbox 360, Part II: the Xenon CPU - Ars Technica
  7. Microsoft and IBM Announce Technology Agreement - Source
  8. https://www.ign.com/articles/2003/11/03/ibm-powers-the-xbox-2
  9. Xbox 360 CPU to get die shrink - Ars Technica
  10. Microsoft Announces Xbox 360 Day One Launch Lineup
  11. Xbox 360: 80 Million Sold and Counting - IGN
  12. Xbox 360 System Architecture - ResearchGate
  13. [PDF] HC17.S8T4.Xbox 360 System Architecture - Hot Chips
  14. [PDF] CIS 501 Computer Architecture This Unit: Putting It All Together ...
  15. How Xbox 360 Works - Electronics | HowStuffWorks
  16. IBM delivers Power-based chip for Microsoft Xbox 360 worldwide ...
  17. A high performance 90 nm SOI technology with 0.992 μm2 6T ...
  18. [PDF] IBM Research Report
  19. IBM Details Production Of Xbox 360 CPU - Game Developer
  20. Original 360 defect rate was 68 per cent | Eurogamer.net
  21. Reliability, yield, and performance of a 90 nm SOI/Cu/SiCOH ...
  22. Falcon - XenonLibrary
  23. Loki - XenonLibrary
  24. XCPU - XenonLibrary
  25. Waternoose - XenonLibrary
  26. "Loki" XCPU Tech Specs: The IBM PowerPC chip for the Xbox 360
  27. XCGPU - XenonLibrary
  28. Microsoft Provides Details On Xbox 360 XCGPU Engine - CdrInfo.com
  29. [PDF] The new Xbox 360 250GB CPU GPU SoC - Hot Chips
  30. Winchester - XenonLibrary
  31. ATI Xenos: Xbox 360 Graphics Demystified - Beyond3D
  32. Xbox 360 Ushers in the Future of Games and Entertainment - Source
  33. https://www.statista.com/statistics/680526/global-xbox-gaming-consoles-unit-sales/
  34. Platform Totals - VGChartz
  35. [PDF] Game Developer - February 2006 - GDC Vault
  36. How Sony helped Microsoft produce the Xbox 360 - The Guardian
  37. Xbox 360 pricing revealed: $299 and $399 models due at launch
  38. Microsoft to extend warranty against red rings of death to 3 years
  39. Microsoft Expands Xbox 360 Warranty Coverage - Source
  40. [PDF] Multi-core: Adding a New Dimension to Computing - arXiv
  41. IBM PowerPC Chips Get Efficiency Boost - CIO
  42. xenia - Xbox 360 Research Emulator
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