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Apple A5
Apple A5
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Apple A5
Apple A5 (S5L8940 version) chip
General information
LaunchedMarch 11, 2011
DiscontinuedOctober 4, 2016
Designed byApple Inc.
Common manufacturer
Product codeS5L8940X (A5)
S5L8942X (A5R2)
S5L8947X (A5R3)
Performance
Max. CPU clock rate800 MHz to 1 GHz
Cache
L1 cache32 KB instruction + 32 KB data[1]
L2 cache1 MB[1]
Architecture and classification
ApplicationMobile
Technology node45 nm to 32 nm
MicroarchitectureARM Cortex-A9
Instruction setARM, Thumb-2
Physical specifications
Cores
  • 1 (third-generation Rev A Apple TV)
    2 (iPad 2, iPhone 4S, third-generation Apple TV [one core is disabled], fifth-generation iPod Touch, first-generation iPad Mini)
GPUPowerVR SGX543MP2 (dual-core)[2]
Products, models, variants
Variant
History
PredecessorApple A4
SuccessorApple A6

The Apple A5 is a 32-bit system on a chip (SoC) designed by Apple Inc., part of the Apple silicon series, and manufactured by Samsung.[3][4] The first product Apple featured an A5 in was the iPad 2. Apple claimed during their media event on March 2, 2011, that the ARM Cortex-A9 central processing unit (CPU) in the A5 is up to two times faster than the CPU in the Apple A4, and the PowerVR SGX543MP2 graphics processing unit (GPU) in the A5 is up to nine times faster than the GPU in the A4.[5] Apple also claimed that the A5 uses the same amount of power as the A4.

The last operating system update Apple provided for a mobile device containing an A5 (iPad 2 CDMA, iPhone 4S, and first-generation iPad Mini cellular models) was iOS 9.3.6, which was released on July 22, 2019, as they were discontinued with the release of iOS 10 in 2016. The latest operating system update Apple has provided for an Apple TV containing an A5 (third-generation Apple TV and third-generation Rev A Apple TV) was Apple TV Software 7.9, which was released on March 14, 2022.[6]

Design

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The A5 chip features a dual-core 45 nm Cortex-A9 CPU (shrunk to 32 nm in later versions of the chip) including the Advanced SIMD (Neon) extension,[7] and a dual-core 32 nm PowerVR SGX543MP2 GPU.

The A5 integrates an image signal processor unit (ISP) that can perform advanced image post-processing, such as face detection, white balance, and automatic image stabilization.[8] The A5 also directly integrates Audience earSmart technology for removing surrounding background noise and secondary voices during phone calls.[9]

The clock rate of the Cortex-A9 in the A5 used inside the iPad 2 and first-generation iPad Mini is 1 GHz. Unlike the A4, the A5 can run at slower clocks to conserve power.[10][7] The clock rate of the Cortex-A9 in the A5 used inside the iPhone 4S and fifth-generation iPod Touch is 800 MHz. The A5's clock speed inside third-generation Apple TV is unknown.

When the A5 was first released, the production cost of the chip was estimated to be 75% more than the A4, with the difference expected to diminish when production would later increase.[11] As of August 2012, the A5 was manufactured at Samsung's Austin, Texas factory.[12] Samsung invested $3.6 billion in the Austin facility to produce various chips, and nearly all of the facility's output was dedicated to producing Apple chips.[13] Samsung later invested a further $4.2 billion in the Austin facility in order to transition to a 28 nm fabrication process by the second half of 2013.[12]

Apple A5 versions

[edit]

Three versions of the A5 chip exist: S5L8940 (containing a 45 nm CPU), S5L8942 (containing a 32 nm CPU), and S5L8947 (containing a single-core 32 nm CPU).[14] Apple also designed a separate high-performance variant of the A5 called the Apple A5X, which features a wider memory subsystem and two additional GPU cores. The A5X was used only in the third-generation iPad.

Apple A5 (S5L8940)

[edit]

The S5L8940 version of the A5 was used in the iPad 2 and the iPhone 4S.[15] The CPU was manufactured on a 45 nm fabrication process. The die of this version takes up 122.2 mm2 of area.[16] It uses the PoP method of installation to support RAM. The top package contains two 256 MB LPDDR2[17] chips, providing a total of 512 MB[16] of RAM.

Apple A5R2 (S5L8942)

[edit]

The S5L8942 version of the A5 was used in the third-generation Apple TV (one CPU core is disabled),[18] the iPad 2 (iPad2,4 revision), the fifth-generation iPod Touch, and the first-generation iPad Mini. The CPU was manufactured on a 32 nm fabrication process. The die of this version takes up 69.6 mm2 of area[18]—nearly 41% smaller than the die of the S5L8940 version. Like the S5L8940 version, it uses the PoP method of installation to support RAM. The top package contains two 256 MB LPDDR2 chips, providing a total of 512 MB of RAM.[19]

Apple A5R3 (S5L8947)

[edit]

The S5L8947 version of the A5 was used only in the third-generation Rev A Apple TV. Unlike the previous two A5 versions, this version contains only one CPU core.[20] Also unlike the previous two A5 versions, this version does not use the PoP method of installation to support RAM—RAM is found externally from the A5 chip.[21] The die of this version takes up 37.8mm2 of area,[21] using a new design made specifically for the third-generation Rev A Apple TV.[22][23]

Products featuring the Apple A5

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[edit]

These images are illustrations and approximate to scale.

A5, 10.1mm x 12.2mm
The A5 (S5L8940) first started shipping in products March 2011.
A5R2, 8.1mm x 8.6mm
The A5R2 (S5L8942) first started shipping in products March 2012.
A5R3, 6.1mm x 6.3mm
The A5R3 (S5L8947) first started shipping in products January 2013.
Sizes: A5 (10.1 mm x 12.2 mm),[16] A5R2 (8.1 mm x 8.6 mm),[18] A5R3 (6.1 mm x 6.3 mm)[21]
Apple A5 SoC (APL0498) on iPhone 4s main logic board

See also

[edit]
  • Apple A5X
  • Apple silicon, the range of ARM-based SoCs designed by Apple
  • PWRficient, a series of microprocessors designed by P.A. Semi. Apple acquired P.A. Semi to form an in-house custom chip design department.

References

[edit]
[edit]
Revisions and contributorsEdit on WikipediaRead on Wikipedia
from Grokipedia
The Apple A5 is a 32-bit system on a chip (SoC) designed by Apple Inc. as the successor to the A4, featuring a dual-core ARM Cortex-A9 CPU, a PowerVR SGX543MP2 GPU with two cores clocked at 200 MHz, and LPDDR2 memory support up to 6.4 GB/s bandwidth. Fabricated by Samsung Electronics on a 45 nm CMOS process, it debuted in the iPad 2 on March 2, 2011, with clock speeds varying by device—1 GHz in the iPad 2 and 800 MHz in the iPhone 4S—delivering up to twice the processor performance and nine times the graphics performance of the A4. The A5 powered several key Apple products during its run, including the (released October 2011), fifth-generation (2012), first-generation (2012), and later revisions of the (2012), while a single-core variant (S5L8947) was employed in the third-generation (2012) for streaming efficiency. Subsequent revisions, such as the S5L8942, shifted to a for reduced power consumption and smaller die size, appearing in later models and the . This SoC marked Apple's continued in-house customization of architecture, integrating advanced power management and supporting features like in the , while maintaining compatibility with 512 MB of RAM across implementations.

Architecture

Central Processing Unit

The (CPU) of the Apple A5 (SoC) is a dual-core implementation of the MPCore processor, operating under the 32-bit ARMv7-A . This design enables efficient handling of general-purpose computing tasks in mobile devices, with each core capable of independent operation or for parallel workloads. The Cortex-A9 cores incorporate ARM's advanced SIMD extensions, which accelerate vectorized operations for processing, such as image and video handling, by supporting up to 128-bit wide data paths for single-instruction, multiple-data (SIMD) computations..html) Clock speeds for the A5 CPU are configured differently across devices to balance performance and power consumption. In the iPhone 4S, the cores run at 800 MHz, while in the iPad 2, they operate at 1 GHz; the iPod Touch (5th generation) also uses an 800 MHz configuration. These speeds allow the A5 to deliver improved single- and multi-threaded performance over its predecessor, the single-core A4, particularly in applications requiring concurrent execution. The supports rapid access with a split L1 cache per core—32 KB for instructions and 32 KB for —paired with a shared 1 MB L2 cache accessible to both cores. This configuration reduces latency for frequently used instructions and , enhancing overall CPU efficiency in cache-sensitive . To optimize power usage, the A5 integrates dynamic voltage and (DVFS) mechanisms tailored by Apple, allowing the cores to adjust operating frequency and voltage dynamically based on demands, thereby extending battery life in power-constrained environments.

Graphics Processing Unit

The Apple A5 integrates the PowerVR SGX543MP2 as its , a dual-core implementation from ' Series 5XT architecture designed for mobile system-on-chips. This GPU features two processing cores, each equipped with unified shaders capable of handling both vertex and pixel operations, enabling efficient 3D rendering for embedded applications. Operating at a clock speed of 200 MHz across devices like the and , the SGX543MP2 supports key APIs including OpenGL ES 2.0 for 3D acceleration and 1.1 for general-purpose computing on the GPU. It also facilitates hardware-accelerated , including decoding and encoding of H.264 video up to resolution, leveraging the SoC's dedicated to offload these tasks from the CPU. The architecture employs tile-based deferred rendering (TBDR), which divides the into small tiles, performs hidden surface removal early in the pipeline, and defers shading computations to minimize memory bandwidth usage and power consumption—critical for battery-powered devices. The GPU shares the A5's 512 MB of LPDDR2 with the CPU through Apple's proprietary interconnect fabric, enabling unified memory access without dedicated VRAM and reducing latency for graphics workloads. This integration optimizes data sharing between processing units, supporting seamless graphics operations within the overall SoC design.

Integrated Components

The Apple A5 system-on-a-chip (SoC) incorporates a that supports low-power double data rate 2 () (SDRAM) at an effective speed of 800 MHz across dual 32-bit channels, delivering a peak bandwidth of 6.4 GB/s. This configuration enables efficient handling of system memory demands while maintaining low power consumption suitable for mobile devices. The SoC employs a package-on-package (PoP) stacking approach, integrating the DRAM directly atop the processor die to optimize space, , and . An integrated image signal processor (ISP) within the A5 manages camera-related tasks, including real-time image enhancement, , white balance correction, and , contributing to improved photographic output without relying on the main CPU cores. The ISP's dedicated hardware accelerates post-processing for features like automatic exposure and low-light performance, marking an advancement over prior Apple SoCs. The A5's display controller drives LCD panels with support for resolutions up to 1024×768 pixels in tablet configurations and 960×640 pixels in smartphone setups, facilitating smooth rendering and power-efficient output for integrated screens. The controller handles timing, , and interface protocols compatible with these display sizes, ensuring compatibility with the era's mobile and non-Retina panels. The A5 lacks an integrated modem or wireless connectivity modules, depending on discrete external components such as the Qualcomm MDM6610 for LTE/GSM cellular functions and separate transceivers for and . This modular design allows flexibility in radio implementations but increases the overall compared to fully integrated later-generation SoCs.

Variants

Apple A5 (S5L8940)

The Apple A5 (S5L8940) represents the initial implementation of Apple's second-generation mobile SoC, designed as a dual-core processor integrated with a PowerVR SGX543MP2 GPU and other system components. Fabricated by on a , it debuted in the (models iPad2,1; iPad2,2; iPad2,3), released on March 11, 2011, and powered the , launched on October 14, 2011. This variant maintains standard clock speeds for its dual-core CPU without optimizations targeted at power reduction or manufacturing yield improvements seen in later revisions. Its die size measures 122 mm², reflecting the larger footprint typical of the 45 nm node before subsequent shrinks to 32 nm for cost and efficiency gains. Primarily deployed in early production runs of the and the , the S5L8940 variant established the architectural foundation for Apple's A-series SoCs, emphasizing performance for and tasks in premium devices prior to the adoption of refined processes in follow-on models.

Apple A5R2 (S5L8942)

The Apple A5R2, designated by the part number S5L8942, is the second major revision of Apple's , designed to enhance manufacturing efficiency while preserving core performance characteristics. Unlike the original A5 (S5L8940), which utilized a , the A5R2 was fabricated on Samsung's 32 nm high-k metal gate (HKMG) , enabling superior power efficiency and a more compact die footprint. This shift to HKMG refined the layout, contributing to higher production yields through denser integration and reduced defect rates on the smaller die. Introduced in 2012, first appearing in the revised iPad 2 (model iPad2,4) in March 2012, the A5R2 powered devices such as the first-generation (November 2012), fifth-generation (October 2012), and third-generation (September 2012, with one CPU core disabled for efficiency). The chip retained the dual-core CPU configuration of the base A5, clocked at up to 1 GHz, paired with the PowerVR SGX543MP2 GPU, ensuring comparable computational capabilities. Its die size measured approximately 70 mm², representing a 40% reduction from the original A5's roughly 121 mm², which further supported yield improvements by minimizing wafer area per chip. Key to the A5R2's value was its power optimization; testing on devices like the revised showed a 20-30% reduction in power consumption compared to the S5L8940 variant, while delivering similar performance in CPU and workloads. This efficiency stemmed directly from the 32 nm HKMG , which lowered leakage currents and thermal output without altering the architectural foundations established in the original A5. Overall, the A5R2 exemplified Apple's iterative approach to SoC refinement, prioritizing cost-effective scaling for broader device deployment.

Apple A5R3 (S5L8947)

The Apple A5R3, designated by the part number S5L8947, represents the final revision of the Apple A5 , optimized as a for low-power, entry-level applications. Introduced in early 2013, it powers the (3rd generation, Rev A), a compact streaming device focused on media playback and mirroring without the need for high computational demands. This variant was specifically engineered for scenarios like video streaming, where efficiency trumps raw performance, enabling seamless integration into small form factors with minimal thermal output. At its core, the A5R3 employs a single CPU core clocked at up to 1 GHz, a deliberate reduction from the dual-core configuration of earlier A5 variants to lower costs, reduce heat generation, and achieve further power efficiency in non-intensive tasks. Fabricated on a 32 nm process by , this design incorporates 32 KB L1 instruction and data caches alongside a 512 KB L2 cache, supporting the ARMv7 instruction set with extensions like NEON SIMD and TrustZone security. The shift to a single physical core—rather than simply disabling one in a dual-core die—facilitates a more compact layout, making it ideal for embedded streaming hardware where space and energy constraints are paramount. The A5R3 retains the graphics and of its predecessors for continuity in handling, featuring an PowerVR SGX543 GPU with two cores clocked at 200 MHz to support video encoding/decoding and 2.0. Memory support mirrors prior models, utilizing a 32-bit dual-channel LPDDR2 interface capable of up to 6.4 GB/s bandwidth, typically paired with 512 MB of RAM in deployment. These elements ensure reliable performance for video playback and basic navigation without introducing unnecessary complexity, underscoring the variant's focus on cost-effective, low-power operation in dedicated streaming devices.

Manufacturing

Process Technology

The Apple A5 (SoC) was exclusively fabricated by Foundry, as Apple relies entirely on third-party manufacturers for semiconductor production without in-house fabrication facilities. The initial variant, S5L8940, employed Samsung's 45 nm low-power () process, which featured nine metal layers and one polysilicon layer to support the dual-core CPU and integrated . This process enabled efficient integration of the SoC's components within a die of about 122 mm². Subsequent revisions of the A5 evolved to Samsung's 32 nm high-k (HKMG) low-power , marking a significant advancement in fabrication for mobile devices. The HKMG approach replaced traditional gate dielectrics with high-k materials and s, reducing leakage current and enhancing switching speeds while maintaining low power consumption suitable for battery-powered SoCs. This shift allowed for a roughly 40% reduction in die area compared to the 45 nm version without sacrificing functionality. The performance-enhanced transistors in the 32 nm HKMG process were optimized for mobile SoC efficiency, offering better drive current and lower voltage operation to balance computational demands with and power constraints in portable devices.

Production Details

The Apple A5 was exclusively fabricated by , with production commencing in 2011 at the company's expanded facility in . invested $3.6 billion in this site to ramp up output specifically for the A5, dedicating nearly all non-memory chip production to Apple's needs. To address capacity constraints and meet surging demand for devices like the and , production shifted from the initial to the more efficient . This transition improved yields by enabling more usable processors per due to the smaller die size. Production volumes were driven by the chip's deployment in high-selling products such as the and subsequent models. Production wound down around 2013 as Apple phased out the A5 in favor of newer A-series chips, with ceasing fabrication for Apple's SoCs starting in 2014. Later revisions of the A5, including die-shrunk variants like the one in the third-generation , reduced chip dimensions by approximately 45% by separating DRAM from the package-on-package design, lowering manufacturing costs and facilitating adoption in lower-priced devices such as the .

Usage and Performance

Devices Featuring Apple A5

The Apple A5 SoC was first integrated into the , announced on March 2, 2011, and released on March 11, 2011, where the original S5L8940 variant provided up to twice the CPU performance of the preceding A4 chip, enhancing multitasking capabilities in the tablet. The utilized a standard 512 MB of RAM paired with the A5, and its thermal management was optimized through a compact package design that supported the device's slim 8.8 mm profile without . Subsequently, the , released on October 14, 2011, following its announcement on October 4, 2011, employed the same S5L8940 A5 variant to power features such as the introduction of voice assistant and full HD video recording, marking a significant upgrade in mobile processing for the . Like the , it included 512 MB of RAM and relied on passive thermal dissipation suited to its handheld form factor. The fifth-generation iPod touch, announced on September 12, 2012, and released on October 11, 2012, incorporated the S5L8942 variant of the A5, which maintained the 512 MB RAM configuration while introducing compatibility with Apple's new Lightning connector for charging and data transfer. This adaptation ensured efficient thermal performance in the device's portable, fanless design. The first-generation iPad mini, announced on October 23, 2012, and released on November 2, 2012, used the S5L8942 variant of the A5 with 512 MB RAM, supporting the 7.9-inch display and providing performance comparable to the iPad 2 in a smaller form factor. The third-generation Apple TV, announced on March 7, 2012, and released on March 16, 2012, utilized the A5 SoC—specifically the S5L8942 variant in its initial model—for streamlined media streaming and playback, with a later revision in early 2013 adopting the single-core S5L8947 variant to reduce footprint and power draw while preserving 512 MB RAM and effective thermal throttling for continuous operation.

Benchmarks and Comparisons

The Apple A5 processor delivered notable improvements over its predecessor, the A4, with Apple claiming up to twice the CPU performance and nine times the graphics performance in the . Independent benchmarks confirmed these gains; for instance, the dual-core A5 achieved approximately twice the single-threaded performance in CPU-intensive tasks compared to the single-core A4, as measured in early tests on the versus the original . Graphics benchmarks using GLBenchmark showed the A5's PowerVR SGX543MP2 GPU rendering up to 900% more frames per second in tests than the A4's SGX535, enabling smoother handling of and higher frame rates in applications. In 2 benchmarks from 2011, the (800 MHz) achieved a multi-core score of approximately 622, about 68% higher than the iPhone 4's (A4) score of 371, reflecting the dual-core and architectural benefits of the despite similar clock speeds. The (1 GHz) scored around 721. These positioned the A5 as a strong performer for its era. Graphics performance in GLBenchmark tests on the and yielded approximately 57-73 frames per second in Egypt High offscreen at and ~27 fps in Egypt HD offscreen at for demanding scenarios, highlighting the GPU's capability for mobile gaming. The A5 demonstrated advantages in graphics over contemporaries like Nvidia's Tegra 2, with Apple's claims and early reviews noting superior GPU performance in tablets like the versus the . Against Qualcomm's Snapdragon S3 (1.7 GHz dual-core Scorpion CPU), the A5's CPU lagged in raw clock-driven workloads, but its PowerVR GPU provided competitive performance in tasks per 2011 SoC evaluations. Power efficiency was a key strength, contributing to comparable or better battery life in A5-equipped devices despite the uplift; the maintained Apple's rated 10 hours of usage, roughly 1.5 times more efficient per unit of compute than the A4 in the original under similar loads, thanks to the and architectural tweaks. Later revisions using a 32 nm A5 variant further improved this, extending battery life by 15-30% in web browsing and gaming tests compared to early 45 nm models. By 2014, however, the aging A5 struggled with 8's increased demands, leading to reported slowdowns and lag on devices like the and , prompting Apple to release 8.1.1 specifically to address and stability issues on these platforms.

References

  1. https://wiki.postmarketos.org/wiki/Apple_A5
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