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Copper interconnects
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Copper interconnects
Copper interconnects are used in integrated circuits to reduce propagation delays and power consumption. Since copper is a better conductor than aluminium, ICs using copper for their interconnects can have interconnects with narrower dimensions, and use less energy to pass electricity through them. Together, these effects lead to ICs with better performance. They were first introduced by IBM, with assistance from Motorola, in 1997.
The transition from aluminium to copper required significant developments in fabrication techniques, including radically different methods for patterning the metal as well as the introduction of barrier metal layers to isolate the silicon from potentially damaging copper atoms.
Although the methods of superconformal copper electrodeposition were known since late 1960, their application at the (sub)micron via scale (e.g. in microchips) started only in 1988-1995 (see figure). By year 2002 it became a mature technology, and research and development efforts in this field started to decline.
Although some form of volatile copper compound has been known to exist since 1947, with more discovered as the century progressed, none were in industrial use, so copper could not be patterned by the previous techniques of photoresist masking and plasma etching that had been used with great success with aluminium. The inability to plasma etch copper called for a drastic rethinking of the metal patterning process and the result of this rethinking was a process referred to as an additive patterning, also known as a "Damascene" or "dual-Damascene" process by analogy to a traditional technique of metal inlaying.[citation needed]
In this process, the underlying silicon oxide insulating layer is patterned with open trenches where the conductor should be. A thick coating of copper that significantly overfills the trenches is deposited on the insulator, and chemical-mechanical planarization (CMP) is used to remove the copper (known as overburden) that extends above the top of the insulating layer. Copper sunken within the trenches of the insulating layer is not removed and becomes the patterned conductor. Damascene processes generally form and fill a single feature with copper per Damascene stage. Dual-Damascene processes generally form and fill two features with copper at once, e.g., a trench overlying a via may both be filled with a single copper deposition using dual-Damascene.[citation needed]
With successive layers of insulator and copper, a multilayer interconnect structure is created. The number of layers depends on the IC's function, 10 or more metal layers are possible. Without the ability of CMP to remove the copper coating in a planar and uniform fashion, and without the ability of the CMP process to stop repeatably at the copper-insulator interface, this technology would not be realizable.[citation needed]
A barrier metal layer must completely surround all copper interconnect, since diffusion of copper into surrounding materials would degrade their properties. For instance, silicon forms deep-level traps when doped with copper. As the name implies, a barrier metal must limit copper diffusivity sufficiently to chemically isolate the copper conductor from the silicon below, yet have high electrical conductivity in order to maintain a good electronic contact.
The thickness of the barrier film is also quite important; with too thin a layer, the copper contacts poison the very devices that they connect to; with too thick a layer, the stack of two barrier metal films and a copper conductor have a greater total resistance than aluminium interconnects, eliminating any benefit.
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Copper interconnects
Copper interconnects are used in integrated circuits to reduce propagation delays and power consumption. Since copper is a better conductor than aluminium, ICs using copper for their interconnects can have interconnects with narrower dimensions, and use less energy to pass electricity through them. Together, these effects lead to ICs with better performance. They were first introduced by IBM, with assistance from Motorola, in 1997.
The transition from aluminium to copper required significant developments in fabrication techniques, including radically different methods for patterning the metal as well as the introduction of barrier metal layers to isolate the silicon from potentially damaging copper atoms.
Although the methods of superconformal copper electrodeposition were known since late 1960, their application at the (sub)micron via scale (e.g. in microchips) started only in 1988-1995 (see figure). By year 2002 it became a mature technology, and research and development efforts in this field started to decline.
Although some form of volatile copper compound has been known to exist since 1947, with more discovered as the century progressed, none were in industrial use, so copper could not be patterned by the previous techniques of photoresist masking and plasma etching that had been used with great success with aluminium. The inability to plasma etch copper called for a drastic rethinking of the metal patterning process and the result of this rethinking was a process referred to as an additive patterning, also known as a "Damascene" or "dual-Damascene" process by analogy to a traditional technique of metal inlaying.[citation needed]
In this process, the underlying silicon oxide insulating layer is patterned with open trenches where the conductor should be. A thick coating of copper that significantly overfills the trenches is deposited on the insulator, and chemical-mechanical planarization (CMP) is used to remove the copper (known as overburden) that extends above the top of the insulating layer. Copper sunken within the trenches of the insulating layer is not removed and becomes the patterned conductor. Damascene processes generally form and fill a single feature with copper per Damascene stage. Dual-Damascene processes generally form and fill two features with copper at once, e.g., a trench overlying a via may both be filled with a single copper deposition using dual-Damascene.[citation needed]
With successive layers of insulator and copper, a multilayer interconnect structure is created. The number of layers depends on the IC's function, 10 or more metal layers are possible. Without the ability of CMP to remove the copper coating in a planar and uniform fashion, and without the ability of the CMP process to stop repeatably at the copper-insulator interface, this technology would not be realizable.[citation needed]
A barrier metal layer must completely surround all copper interconnect, since diffusion of copper into surrounding materials would degrade their properties. For instance, silicon forms deep-level traps when doped with copper. As the name implies, a barrier metal must limit copper diffusivity sufficiently to chemically isolate the copper conductor from the silicon below, yet have high electrical conductivity in order to maintain a good electronic contact.
The thickness of the barrier film is also quite important; with too thin a layer, the copper contacts poison the very devices that they connect to; with too thick a layer, the stack of two barrier metal films and a copper conductor have a greater total resistance than aluminium interconnects, eliminating any benefit.