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PDP-6
Gordon Bell and Alan Kotok using a PDP-6 in 1964
DeveloperDigital Equipment Corporation
Product familyProgrammed Data Processor
TypeMainframe computer
Released1964; 62 years ago (1964)
Operating systemearly version of what later became TOPS-10, custom versions of the system, ITS, WAITS
PlatformPDP 36-bit
Weight1,300 pounds (590 kg), 1,700 pounds (770 kg) with "Fast Memory"
SuccessorPDP-10

The PDP-6, short for Programmed Data Processor model 6, is a computer developed by Digital Equipment Corporation (DEC) during 1963 and first delivered in the summer of 1964.[1][a] It was an expansion of DEC's existing 18-bit systems to use a 36-bit data word, which was at that time a common word size for large machines like IBM mainframes. The system was constructed using the same germanium individual transistor-based System Module layout as DEC's earlier machines, like the PDP-1 and PDP-4.[2]

The system was designed with real-time computing use in mind, not just batch processing as was typical for most mainframes. Using a 36-bit word with 18-bit addresses allowed it to efficiently store the cons structure found in the Lisp language, which made it particularly useful in artificial intelligence labs like Project MAC at MIT. The PDP-6 was also notable for its inclusion of floating-point instructions as a standard feature, which was relatively rare at that time. It was also complex, expensive, and unreliable as a result of its use of so many early-model transistors. Only 23 were sold, at prices ranging from $120,000 to $300,000.

The lasting influence of the PDP-6 was its re-implementation using modern silicon transistors and the newer Flip-Chip module packaging to produce the PDP-10. The instruction sets of the two machines are almost identical. The PDP-10 was less expensive and more reliable, and about 1500 were sold during its lifetime.

History

[edit]

DEC's first products were not computers but a series of plug-in circuits known as Digital Laboratory Modules that performed digital logic. Users could wire the modules together to perform specific tasks. DEC soon introduced the PDP-1 which was built out of large numbers of these modules, now known as System Building Blocks or System Modules.[3]

The PDP-1 used an 18-bit word. Word lengths in the early 1960s were generally some multiple of six bits, as the character codes of the era were 6 bits long and it was also a useful size for storing binary-coded decimal digits with an optional sign, as commonly used on IBM machines of the era.[4] Large machines generally used a 36-bit word length, but there were many variations. The PDP-1's 18-bit length allowed the machine to be simpler and less expensive than these, at US$120,000 (equivalent to $1,325,342 in 2025). Proposals for a PDP-2 and PDP-3 were turned down, and DEC's next machine, the PDP-4, was essentially a smaller and less-expensive PDP-1 that sold for roughly half the cost. The PDP-5 was built from the same components, but used a 12-bit word for even greater savings and sold for about US$27,000 (equivalent to $283,940 in 2025).[5]

The PDP-6 was DEC's first "big" machine. It used 36-bit words, in common with other large computers at the time from companies like IBM, Honeywell and General Electric. Unlike those machines, the PDP-6 was supplied with a timesharing system "out of the box". Timesharing had been available for other machines, most famously the PDP-1 at Project MAC, but the PDP-6 was the first such system to be supported by the manufacturer.[6]

Worldwide, only 23 PDP-6's were sold,[6][7] the smallest number of any DEC machine. It was complex and expensive to build, as well as difficult to install and get operational at the customer's site. Additionally, the sales force found the PDP-6 to be a "hard sell". Nevertheless, the company later considered the PDP-6 to be a success:

Because the PDP-6 was the first computer to offer elegant, powerful capabilities at a low price, a great many of the PDP-6s built found their way into university and scientific environments, giving DEC a strong foothold in that market and providing both educated customer input for future models and a source of bright young future employees to assist in the hardware and software development for those future models.[8]

The sales were so slow that DEC eventually decided to abandon the system and announced that they would not build any more 36-bit machines.[9] This decision was later reversed and a new 36-bit system, program-compatible with the PDP-6, was designed using the new Flip-Chip modules and much smaller system boards to improve density and reliability. The resulting design was released in 1966 as the PDP-10. DEC describes this machine as the successor to the PDP-6. It ran roughly twice as fast as the PDP-6, and offered a wide variety of expansions and input/output options.[10] It added batch processing features to the PDP-6's timesharing operating system. It was far more successful and eventually sold about 1,500 machines.[11]

Description

[edit]

Architecture

[edit]

Addressing remained 18-bit, as in earlier DEC machines, allowing for a 256 kword main memory, about 1 MB in modern terms. Memory was implemented using magnetic cores; a typical system included 32,768 words (equivalent to 144 kB on modern machines).[12] The use of a 36-bit word allowed two 18-bit addresses to be stored in a single memory location; this made it suited to the storage of a cons, a widely used structure in the Lisp language, meaning the PDP-6 could store a cons in a single word and read and write one in a single operation.[13]

The instruction set architecture could be categorized as "one-and-a-half address". The opcode was stored in the most significant bits of the 36-bit word, using 9 bits. The next four bits indicate which of sixteen registers to apply the instruction to. The last 18 bits indicated an address. Thus, a typical instruction might be "add the value in memory location 1234 to the value in register 4". Thus the format contains one-and-a-half addresses, the half being the register.[12]

This left another five bits in the instruction word, bits 13 through 17. Bit 13 indicated the address was indirect; instead of the value stored in address 1234 being added to the selected register, the value in 1234 was interpreted as another address, the value in that location used. For instance, if the value in 1234 is 2345, the resulting instruction would add the value in 2345 to register 4.[12] This sort of access pattern was common as it allowed tables to be scanned over using a single instruction and then changing the value in memory to point to another location. The remaining four bits offered a similar functionality by selecting a second register as an index register, allowing memory to be stepped through by changing the value in the fast register rather than in slower main memory.[12]

The registers in the PDP-6 were simply the first 16 memory locations of main memory. Most, if not all, PDP-6 systems were equipped with the optional Type 162 "Fast Memory", which constructed these 16 memory locations from discrete-transistor flip-flops. These operated four times as fast as the core memory.[14]

Hardware

[edit]

The PDP-6 weighed about 1,300 pounds (590 kg), 1,700 pounds (770 kg) with "Fast Memory".[15]

The PDP-6 was infamous because of the 6205 board, a large (11 × 9 inches) board which contained 1 bit of arithmetic register (AR), memory buffer (MB), and multiplier-quotient register (MQ). The CPU included 36 such cards. Each board had 88 transistors, a two-sided PC etch, two 18-pin and two 22-pin connectors (two on each side of the module). Because of all these connectors, swapping this module was a major undertaking, and the mechanical coupling made it highly likely that fixing one fault would cause another. There was also a great fear of powering off a PDP-6, since it would generally result in at least one 6205 board failing.[16]

The experience with the 6205 led the designers of the first models of PDP-10, the KA10 and KI10, to use only small boards. It was not until the KL10 that large boards were used again.

Operating system

[edit]

The PDP-6 supported time-sharing through the use of a status bit selecting between two operating modes ("Executive" and "User", with access to input/output (I/O), etc., being restricted in the latter), and a single relocation/protection register which allowed a user's address space to be limited to a set section of main memory (a second relocation/protection register for shareable "high segments" was added on the PDP-10). The main operating system used on the machine was an early version of what later became TOPS-10, and several sites made custom versions of the system, which was available in source code form. MIT's Incompatible Timesharing System (ITS) operating system also began on the PDP-6.

Although it was possible to time-share a PDP-6 without a disk drive,[17] configuring it with four dual DECtape drives "could effectively support about 4-6 simultaneous users." The same[b] system, with a single[c] disk drive, resulted in "real time-sharing (and) could easily handle 20-30 users."

Museum

[edit]

Stanford's PDP-6 was shown at DECUS in 1984. The machine was transferred to a DEC warehouse after that event. There are no records of this machine being given to the Computer Museum, which was not part of DEC in 1984. In the late 1990s Compaq donated the contents of the DEC internal archives to The Computer Museum History Center. The Fast Memory cabinet from the Stanford PDP-6 was part of that donation. There is no evidence that the modules sold at the Boston computer museum gift shop were from the Stanford PDP-6, nor is there any evidence that the museum had ever had this machine in its possession.

Notes

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References

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from Grokipedia
The PDP-6 (Programmed Data Processor model 6) was a 36-bit mainframe computer developed by Digital Equipment Corporation (DEC) and first shipped in June 1964, marking DEC's entry into large-scale computing systems beyond its earlier 18-bit minicomputers. Designed for general-purpose applications including time-sharing, batch processing, and real-time laboratory operations, it supported up to 262,144 words of core memory with a cycle time of 1.75 microseconds, along with 15 index registers and a comprehensive instruction set of over 300 operations, including fast floating-point arithmetic averaging 20 microseconds for multiplication.[1][2] As the first commercially available computer to include manufacturer-provided software for time-sharing, it featured memory protection, relocation registers, and an asynchronous modular architecture allowing up to 128 I/O devices connected via dual processor-memory and processor-I/O buses.[3] The PDP-6's development began in 1963, evolving from DEC's PDP-1 and PDP-5 systems to address the growing demand for more powerful machines capable of supporting multiple users simultaneously, influenced by early research in interactive computing at institutions like MIT.[4] Its hardware emphasized flexibility, with options for fast cache memory (16 words at 0.4 microseconds), drum-based mass storage processors, and peripherals such as DECtapes, magnetic tapes, card readers, line printers, and graphical displays, enabling straightforward interfacing for scientific and engineering tasks.[1] Performance-wise, it executed basic instructions in 4 to 28 microseconds, achieving approximately 0.25 MIPS, while memory interleaving reduced effective access times by about 50 percent for random operations.[2] Software support was a hallmark of the PDP-6, including FORTRAN II and IV compilers, the MACRO-6 assembler, the DDT debugger, and a supervisory control program that facilitated multiprogramming and time-sharing with user isolation via 18-bit physical addressing and protection mechanisms.[1] These features allowed it to run utility libraries, system subroutines, and early applications in fields like artificial intelligence and data processing, with core requirements for FORTRAN programs ranging from 10K to 22K words depending on optimization.[5] Despite its innovations, commercial success was limited, with only about 23 units installed, partly due to reliability issues and competition from established mainframes; however, it was program-compatible with its successor, the PDP-10, which doubled internal performance and became a cornerstone of DEC's product line.[4][3] The PDP-6 held significant historical importance in advancing time-sharing concepts, serving as the initial computing platform for MIT's Project MAC (1963–1968), where it supported pioneering work on interactive systems, Multics operating system development, and early AI research including LISP implementations.[6][2] Its emphasis on user-friendly, multi-user environments influenced subsequent systems like the PDP-10 and broader trends in personal and networked computing, contributing to the shift from batch-oriented to interactive paradigms in the 1960s.[7]

History

Development

The PDP-6 emerged as part of Digital Equipment Corporation's (DEC) progression from smaller systems like the 18-bit PDP-1, introduced in 1959 for real-time applications, and the subsequent PDP-4 (18-bit, released in 1962) and PDP-5 (12-bit, released in 1963), toward a more powerful 36-bit architecture suited for advanced real-time processing and timesharing environments.[8][9] This shift reflected DEC's ambition to address limitations in earlier designs, particularly in supporting interactive computing beyond the batch-oriented systems like the IBM 7090, with Gordon Bell, as project leader from March 1963 to April 1964, advocating for scalable systems capable of handling timesharing inspired by MIT's CTSS and BBN's PDP-1 modifications.[8] Development began in March 1963 under Bell's direction, with the team—including co-designer Alan Kotok—focusing on a general-purpose machine equivalent in capacity to an IBM 7094, incorporating features like direct memory access and a sophisticated interrupt system to enable efficient multitasking.[8][9] The first PDP-6 systems were delivered in June 1964.[9] Engineering efforts faced significant hurdles due to the era's immature transistor technology; initial use of germanium transistors caused reliability problems from heat and variability, prompting a later switch to more stable silicon variants, while long debug cycles further complicated integration.[8] A key design decision was adopting 36-bit words to facilitate Lisp implementations—through early consultations with MIT in the 1960s—and to optimize floating-point operations, aligning with the needs of symbolic and scientific computing in research settings.[8][10] Initial configurations were priced between $120,000 and $300,000, targeting universities and research laboratories seeking affordable entry into timesharing and large-scale computation.[2]

Production and Deployment

The PDP-6 was manufactured and sold in limited quantities by Digital Equipment Corporation (DEC), with only 23 units produced between 1964 and 1966.[9][11] The first unit shipped in June 1964 as an engineering prototype at DEC's Maynard, Massachusetts facility, followed by customer deliveries starting in November 1964.[11][2] Sales were targeted primarily at universities and research institutions, reflecting the system's focus on advanced computing applications like timesharing and laboratory simulations.[9] Key installations included MIT's Project MAC and AI Lab in Cambridge, Massachusetts; Stanford AI Lab in California; Brookhaven National Laboratory in New York; Lawrence Livermore National Laboratory in California; Rutgers University in New Jersey; University of California, Berkeley; and the Rand Corporation in Santa Monica, California.[11][2] International deployments featured units at the University of Western Australia in Perth, the University of Bonn and University of Aachen in Germany, Imperial College in London, and Oxford University's Nuclear Physics Laboratory in the UK, demonstrating modest global reach despite the low volume.[11] Deployment faced significant hurdles, including high installation costs—typically around $300,000 for a full system—and hardware unreliability stemming from limitations in contemporary printed circuit board technology, which caused frequent failures during initial setups.[9][12] These issues, combined with the system's complexity and limited advantages over competitors like IBM mainframes, resulted in poor market reception and only penetrated niche academic sectors.[9] Production ended in 1966 amid these commercial challenges, prompting DEC to discontinue the PDP-6 and transition to the more refined PDP-10 (KA10) successor, which addressed reliability and expandability concerns.[9][13]

Design

Architecture

The PDP-6 employed a 36-bit word length, which became a hallmark of Digital Equipment Corporation's higher-end systems, enabling efficient handling of scientific and symbolic computations. Addressing was limited to 18 bits, allowing access to a maximum of 256 kilowords (approximately 1 MB) of memory, though typical configurations shipped with 32 kilowords (about 144 KB) of magnetic core memory, expandable in modular increments.[14][15] The instruction set utilized a "one-and-a-half address" format, where most operations implicitly involved one of 16 general-purpose registers (the first 16 locations of memory) and a memory operand, promoting compact code for arithmetic and data movement. Each 36-bit instruction consisted of a 9-bit opcode specifying the operation, a 4-bit register specifier selecting the accumulator or index register, an 18-bit base address, and 5 additional bits for control flags including indirect addressing (1 bit) and indexing (4 bits to choose an index register). Effective address calculation combined the base address with an optional index register value, followed by indirect resolution if flagged, supporting flexible memory referencing without requiring separate load-store sequences for many tasks.[16][14] Floating-point arithmetic was implemented natively in hardware as a standard feature, including operations like addition, multiplication, and division on single- and double-precision formats, which accelerated scientific applications compared to software emulation on contemporaries. This 36-bit architecture also proved particularly suitable for Lisp implementations, as a single word could store a cons cell—comprising two 18-bit pointers for the car and cdr—facilitating efficient list processing central to the language.[15][17] The memory hierarchy included an optional Type 162 Fast Memory unit, comprising 16 words of flip-flop-based storage with a 0.4-microsecond cycle time, serving as high-speed registers and cache-like buffer roughly four times faster than the standard core memory's 1.75-microsecond cycle. The processor operated asynchronously without a fixed central clock, relying on timed pulse chains for control, yielding an overall performance of approximately 0.25 million instructions per second (MIPS), competitive with mid-1960s mainframes like the IBM 7094.[18][2][19]

Hardware

The PDP-6 was a substantial machine, weighing approximately 1,300 pounds (590 kg) in its base configuration including peripherals such as the tape reader and punch.[20] When equipped with optional Fast Memory, the system's weight increased to around 1,700 pounds (770 kg). The central processing unit relied on key modules known as 6205 logic boards, each measuring 11 by 9 inches and implementing one bit of the arithmetic register (AR), memory buffer (MB), and memory quotient (MQ) registers, with 36 such boards required per CPU.[21] The PDP-6 consumed significant power, requiring a minimum of 18 kW with 26 kW recommended for reliable operation, and employed forced-air cooling to manage the heat generated by its components.[22][23] These early germanium transistors, while innovative, proved unstable under varying temperatures and loads, contributing to the system's overall unreliability.[21] Reliability issues plagued the PDP-6, with frequent faults arising from the fragile 6205 boards that often broke during routine swaps in maintenance procedures.[21] Additionally, improper power-off sequences risked damage from mechanical couplings in the logic modules, necessitating careful handling protocols by technicians to minimize downtime.[21] These build quality shortcomings limited the commercial success of the system.[24] Basic peripherals for the PDP-6 included DECtape magnetic tape drives, which provided reliable secondary storage and were integral to system configurations.[25] Mass storage options included the Type 160 Drum Processor, offering high-speed secondary storage for time-sharing and batch processing applications.[26]

Software

Operating Systems

The PDP-6 employed executive and user modes to enable secure timesharing, with dedicated hardware relocation and protection registers that confined user programs to a specific segment of memory, typically 1 to 255 blocks of 1024 words each, thereby isolating users and preventing system interference.[27][28] The primary operating system was the PDP-6 Monitor, an initial implementation of what evolved into TOPS-10 and ensured software compatibility between the PDP-6 and subsequent PDP-10 systems.[29][30] Development of the Monitor commenced in 1964 with the PDP-6's debut, featuring a 6 Kword core-resident system that provided foundational timesharing support from the outset.[30] By 1965, enhancements allowed for expanded multi-user operation, with versions 1.4 through 1.9 (1964–1966) relying exclusively on DECtape for storage in diskless setups.[31] Timesharing capacity in early configurations was constrained, supporting 4 to 6 simultaneous users in typical setups with DECtape; diskless limitations restricted scalability due to slower storage access, while adding disk drives substantially boosted user support to dozens in optimized environments.[30][19] Several sites developed custom variants of the Monitor; at MIT's Project MAC, the Incompatible Timesharing System (ITS) originated on a PDP-6 in the late 1960s as a non-paging timesharing environment reliant on DECtape.[32] Similarly, Stanford Artificial Intelligence Laboratory created WAITS as a heavily modified PDP-6 Monitor starting in 1966 to meet research needs.[33]

Programming and Applications

The PDP-6 provided native support for Lisp through an implementation tailored to its architecture, enabling efficient symbolic processing and list manipulation essential for artificial intelligence research. This PDP-6 Lisp, documented in a detailed manual for users acquainted with LISP 1.5, facilitated embedded languages for display programming and integration with subroutines like MIDAS, supporting interactive development in AI environments at MIT.[34][35] Assembly language programming on the PDP-6 relied on the MACRO-6 assembler, which allowed symbolic coding with features like relocatable addresses and macro definitions for efficient low-level control. FORTRAN II and IV were also available, offering compiled support for numerical computations in scientific applications, while the DDT debugger enabled interactive debugging. The timesharing monitor enabled interactive programming sessions for rapid debugging and iteration without batch processing delays.[15][5][19] Notable applications on the PDP-6 included real-time systems for laboratory control, such as Marvin Minsky's visually-controlled manipulator that interfaced with television cameras to track motion and operate robotic arms for spatial object handling. Early AI projects at MIT's Project MAC leveraged the machine for symbolic computation tools like Carl Engleman's MATHLAB, which performed on-line differentiation and integration, and Michael Manove's INTEGRATE for rational function analysis, advancing mathematical assistance in research. Scientific computing applications encompassed Cyrus Levinthal's molecular model building for protein structure refinement using display consoles and X-ray data integration, as well as plasma physics stability analysis by James D. Mills and Abraham Bers, which generated graphical outputs of complex mappings.[36] Peripheral configurations influenced multi-user programming setups, with DECtape drives enabling small-scale timesharing for about 4-6 simultaneous users in resource-constrained environments, while adding a disk drive scaled capacity to support 20-30 terminal sessions for more demanding interactive workloads. The PDP-6's software ecosystem remained limited due to low unit sales of approximately 23 systems, resulting in sparse commercial offerings and reliance on custom developments from academic users like those at Project MAC rather than widespread vendor-supported packages.[4]

Legacy

Influence and Impact

The PDP-6 served as a foundational precursor to the PDP-10, with its core architecture directly informing the later KA10 and KI10 processor designs, thereby enabling widespread adoption in networked environments such as ARPANET nodes and contributing to the broader minicomputer revolution by demonstrating scalable, interactive computing at a fraction of mainframe costs.[37][38] Only 23 PDP-6 units were produced due to manufacturing challenges, yet its influence expanded dramatically through the PDP-10, of which approximately 1,500 systems were deployed, amplifying the 36-bit ecosystem in research and industry.[39] The PDP-6 advanced timesharing capabilities as the world's first commercially available system supporting multiple simultaneous users without frequent restarts, fostering interactive computing that became essential for collaborative research.[38] Its 36-bit word architecture bridged earlier 18-bit DEC systems like the PDP-1 and PDP-8 with larger-scale machines, providing enhanced addressing and protection features that supported real-time applications and early AI experiments, including Lisp implementations at institutions like MIT. This design emphasis on modularity and user accessibility laid groundwork for AI research by enabling efficient symbolic processing and experimentation.[38] In comparison to contemporaries, the PDP-6 offered greater affordability for university settings than the batch-oriented IBM 7090, which shared a 36-bit format but lacked native timesharing support, or the high-end CDC 6600 supercomputer, priced for elite scientific computing rather than broad academic access.[38] Priced around $300,000, the PDP-6 democratized advanced computing for resource-constrained environments, prioritizing interactivity over raw batch throughput. The PDP-6's deployment at MIT's Artificial Intelligence Laboratory cultivated early hacker culture, where users modified systems collaboratively, leading to innovations like the Incompatible Timesharing System (ITS), an open-source precursor that emphasized free software sharing and community-driven development on PDP-6 and successor hardware.[40] Modern retrospectives highlight ITS's role in prototyping open-source principles, influencing later movements through its emphasis on accessible, modifiable code in a networked era.[41] Despite limited units, the PDP-10's proliferation extended this cultural legacy, embedding PDP-6 innovations into the foundations of internet-era computing.[42]

Preservation Efforts

Few complete PDP-6 systems survive today, with most known examples existing only as partial hardware components in museum collections. The most notable remnants come from Stanford University's Artificial Intelligence Laboratory PDP-6 (serial number 16), which was installed in 1966 and retired around 1980; it was publicly displayed at the DECUS symposium in 1984 before being transferred to a Digital Equipment Corporation warehouse.[11] In the late 1990s, Compaq—DEC's successor at the time—donated various parts of this machine to the Computer History Museum (CHM) in Mountain View, California, including a set of 12 system modules and the Fast Memory cabinet.[43][11] The CHM also holds a PDP-6 programmer's panel, featuring indicator lights for memory, program counter, and accumulator registers, acquired as part of its DEC collection.[44] Another partial example includes components from the University of Western Australia's PDP-6 (serial number 4), originally shipped in 1964, which were once housed at the Living Computers Museum + Labs in Seattle; however, following the museum's permanent closure and asset auction in 2024, their current status remains uncertain.[11] As of 2025, no fully operational PDP-6 systems exist, and no active restoration projects have restored one to working condition, owing to the rarity of complete units and the challenges of maintaining 1960s-era vacuum tube and discrete transistor technology.[9] The CHM's holdings represent the primary preserved hardware, focused on exhibition and archival purposes rather than functionality.[43] Preservation has shifted toward emulation and digital archiving to enable modern access. The SIMH simulator includes support for the PDP-6 through an emulator developed by Richard Cornwell, allowing execution of original software such as the 1967 Incompatible Timesharing System (ITS) from MIT.[45] Additional open-source emulation projects, such as the low-level C-based PDP-6 emulator on GitHub, recreate the machine's schematics-based architecture for running period software.[46] These efforts facilitate study of the PDP-6's role in early timesharing and AI applications without relying on physical hardware. Community-driven digital preservation initiatives have scanned and archived extensive PDP-6 documentation, including manuals, schematics, and brochures, making them freely available online. The Bitsavers project hosts a comprehensive collection of these materials, such as the PDP-6 Handbook (August 1964) and time-sharing software descriptions, scanned from original DEC publications.[47] Enthusiast sites track serial numbers and configurations of the approximately 23 built units, aiding in verifying survival and historical context.[11] These resources support ongoing research into the PDP-6's Lisp heritage at institutions like Stanford, though no dedicated AI history exhibits featuring PDP-6 hardware have emerged as of 2025.

References

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