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Hub AI
I486 AI simulator
(@I486_simulator)
Hub AI
I486 AI simulator
(@I486_simulator)
I486
The Intel 486, officially named i486 and also known as 80486, is a microprocessor introduced in 1989. It is a higher-performance follow-up to the Intel 386. It represents the fourth generation of binary compatible CPUs following the 8086 of 1978, the Intel 80286 of 1982, and 1985's i386.
It was the first tightly-pipelined x86 design as well as the first x86 chip to include more than one million transistors. It offered a large on-chip cache and an integrated floating-point unit. When it was announced, the initial performance was originally published between 15 and 20 VAX MIPS, between 37,000 and 49,000 dhrystones per second, and between 6.1 and 8.2 double-precision megawhetstones per second for both 25 and 33 MHz version. A typical 50 MHz i486 executes 41 million instructions per second Dhrystone MIPS and SPEC integer rating of 27.9. It is approximately twice as fast as the i386 or i286 per clock cycle. The i486's improved performance is thanks to its five-stage pipeline with all stages bound to a single cycle. The enhanced FPU unit on the chip was significantly faster than the i387 FPU per cycle. The i387 FPU was a separate, optional math coprocessor installed in a motherboard socket alongside the i386.
The i486 was succeeded by the original Pentium. Orders were discontinued for the i486 on March 30, 2007 and the last shipments were on September 28, 2007.
The concept of this microprocessor generation was discussed with Pat Gelsinger and John Crawford shortly after the release of 386 processor in 1985. The team started the computer simulation in early 1987. They finalized the logic and microcode function during 1988. The team finalized the database in February 1989 until the tape out on March 1. They received the first silicon from the fabrication on March 20.
The i486 was announced at Spring Comdex on April 10, 1989. At the announcement, Intel stated that samples would be available in the third quarter and production quantities would ship in the fourth quarter. The first i486-based PCs were announced in late 1989.
In fall of 1991, Intel introduced the 50 MHz i486 DX using the three layer 800 nm process CHMOS-V technology. They were available for US$665 in 1,000-unit quantities.
In that season, Intel introduced low-power 25 MHz Intel486 DX microprocessor. This one was available for US$471. Also, there were low-power 16, 20, and 25 MHz Intel486 SX microprocessors. They were available at $235, $266, and $366 for these frequency range respectively. All pricing were in quantities of 1,000 pieces. These low-power microprocessors have power consumption reduced by 50–75% compared to similar regular versions of these CPUs.
The first major update to the i486 design came in March 1992 with the release of the clock-doubled 486DX2 series. It was the first time that the CPU core clock frequency was separated from the system bus clock frequency by using a dual clock multiplier, supporting 486DX2 chips at 40 and 50 MHz. The faster 66 MHz 486DX2-66 was released that August.
I486
The Intel 486, officially named i486 and also known as 80486, is a microprocessor introduced in 1989. It is a higher-performance follow-up to the Intel 386. It represents the fourth generation of binary compatible CPUs following the 8086 of 1978, the Intel 80286 of 1982, and 1985's i386.
It was the first tightly-pipelined x86 design as well as the first x86 chip to include more than one million transistors. It offered a large on-chip cache and an integrated floating-point unit. When it was announced, the initial performance was originally published between 15 and 20 VAX MIPS, between 37,000 and 49,000 dhrystones per second, and between 6.1 and 8.2 double-precision megawhetstones per second for both 25 and 33 MHz version. A typical 50 MHz i486 executes 41 million instructions per second Dhrystone MIPS and SPEC integer rating of 27.9. It is approximately twice as fast as the i386 or i286 per clock cycle. The i486's improved performance is thanks to its five-stage pipeline with all stages bound to a single cycle. The enhanced FPU unit on the chip was significantly faster than the i387 FPU per cycle. The i387 FPU was a separate, optional math coprocessor installed in a motherboard socket alongside the i386.
The i486 was succeeded by the original Pentium. Orders were discontinued for the i486 on March 30, 2007 and the last shipments were on September 28, 2007.
The concept of this microprocessor generation was discussed with Pat Gelsinger and John Crawford shortly after the release of 386 processor in 1985. The team started the computer simulation in early 1987. They finalized the logic and microcode function during 1988. The team finalized the database in February 1989 until the tape out on March 1. They received the first silicon from the fabrication on March 20.
The i486 was announced at Spring Comdex on April 10, 1989. At the announcement, Intel stated that samples would be available in the third quarter and production quantities would ship in the fourth quarter. The first i486-based PCs were announced in late 1989.
In fall of 1991, Intel introduced the 50 MHz i486 DX using the three layer 800 nm process CHMOS-V technology. They were available for US$665 in 1,000-unit quantities.
In that season, Intel introduced low-power 25 MHz Intel486 DX microprocessor. This one was available for US$471. Also, there were low-power 16, 20, and 25 MHz Intel486 SX microprocessors. They were available at $235, $266, and $366 for these frequency range respectively. All pricing were in quantities of 1,000 pieces. These low-power microprocessors have power consumption reduced by 50–75% compared to similar regular versions of these CPUs.
The first major update to the i486 design came in March 1992 with the release of the clock-doubled 486DX2 series. It was the first time that the CPU core clock frequency was separated from the system bus clock frequency by using a dual clock multiplier, supporting 486DX2 chips at 40 and 50 MHz. The faster 66 MHz 486DX2-66 was released that August.
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