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Video Coding Engine
Video Coding Engine
Video Coding Engine
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Video Code Engine (VCE; earlier referred to as Video Coding Engine,[1] Video Compression Engine[2] or Video Codec Engine[3] in official documentation) is AMD's video encoding application-specific integrated circuit implementing the video codec H.264/MPEG-4 AVC. Since 2012 it was integrated into all of their GPUs and APUs except Oland.

VCE was introduced with the Radeon HD 7000 series on 22 December 2011.[4][5][6] VCE occupies a considerable amount of the die surface at the time of its introduction[7] and is not to be confused with AMD's Unified Video Decoder (UVD).

As of AMD Raven Ridge (released January 2018), UVD and VCE were succeeded by Video Core Next (VCN).

Overview

[edit]
In "full-fixed mode" the entire computation is done by the fixed-function VCE unit. Full-fixed mode can be accessed through the OpenMAX IL API.
The entropy encoding block of the VCE ASIC is also separately accessible, enabling "hybrid mode". In "hybrid mode" most of the computation is done by the 3D engine of the GPU. Using AMD's Accelerated Parallel Programming SDK and OpenCL developers can create hybrid encoders that pair custom motion estimation, inverse discrete cosine transform and motion compensation with the hardware entropy encoding to achieve faster than real-time encoding.

The handling of video data involves computation of data compression algorithms and possibly of video processing algorithms. As the template compression methods shows, lossy video compression algorithms involve the steps: motion estimation (ME), discrete cosine transform (DCT), and entropy encoding (EC).

AMD Video Code Engine (VCE) is a full hardware implementation of the video codec H.264/MPEG-4 AVC. It is capable of delivering 1080p at 60 frames/sec. Because its entropy encoding block is also a separately accessible Video Codec Engine, it can be operated in two modes: full-fixed mode and hybrid mode.[8][9]

By employing AMD APP SDK, available for Linux and Microsoft Windows, developers can create hybrid encoders that pair custom motion estimation, inverse discrete cosine transform and motion compensation with the hardware entropy encoding to achieve faster than real-time encoding. In hybrid mode, only the entropy encoding block of the VCE unit is used, while the remaining computation is offloaded to the 3D engine of the GPU, so the computing scales with the number of available compute units (CUs).

VCE 1.0

[edit]

VCE[1] Version 1.0 supports H.264 YUV420 (I & P frames), H.264 SVC Temporal Encode VCE, and Display Encode Mode (DEM).

It can be found on:

  • Piledriver-based
    • Trinity APUs (Ax-5xxx, e.g. A10-5800K)
    • Richland APUs (Ax-6xxx, e.g. A10-6800K)
  • GPUs of the Southern Islands generation (GCN1: CAYMAN, ARUBA (Trinity/Richland), CAPE VERDE, PITCAIRN, TAHITI). These are
    • Radeon HD 7700 series (except HD 7790 with VCE 2.0)
    • Radeon HD 7800 series
    • Radeon HD 7900 series
    • Radeon HD 8570 to 8990 (except HD 8770 with VCE 2.0)
    • Radeon R7 250E, 250X, 265 / R9 270, 270X, 280, 280X
    • Radeon R7 360, 370, 455 / R9 370, 370X
    • Mobile Radeon HD 77x0M to HD 7970M
    • Mobile Radeon HD 8000-Series
    • Mobile Radeon Rx M2xx Series (except R9 M280X with VCE 2.0 and R9 M295X with VCE 3.0)
    • Mobile Radeon R5 M330 to R9 M390
    • FirePro cards with 1st Generation GCN (GCN1) (Except W2100, which is Oland XT)

VCE 2.0

[edit]

Compared to the first version, VCE 2.0 adds H.264 YUV444 (I-Frames), B-frames for H.264 YUV420, and improvements to the DEM (Display Encode Mode), which results in a better encoding quality.

It can be found on:

  • Steamroller-based
    • Kaveri APUs (Ax-7xxx, e.g. A10-7850K)
    • Godavari APUs (Ax-7xxx, e.g. A10-7890K)
  • Jaguar-based
    • Kabini APUs (e.g. Athlon 5350, Sempron 2650)
    • Temash APUs (e.g. A6-1450, A4-1200)
  • Puma-based
    • Beema and Mullins
  • GPUs of the Sea Islands generation as well Bonaire or Hawaii GPUs (2nd Generation Graphics Core Next), such as
    • Radeon HD 7790, 8770
    • Radeon R7 260, 260X / R9 290, 290X, 295X2
    • Radeon R7 360 / R9 390, 390X
    • Mobile Radeon R9 M280X
    • Mobile Radeon R9 M385, M385X
    • Mobile Radeon R9 M470, M470X
    • FirePro W4300, W5100, W8100, W9100, S9100, S9150, S9170
    • Mobile FirePro M6100, W6150M, W6170M

VCE 3.0

[edit]

Video Code Engine 3.0 (VCE 3.0) technology features a new high-quality video scaling and - since version 3.4 - High Efficiency Video Coding (HEVC/H.265).[10][11]

It, together with UVD 6.0, can be found on 3rd generation of Graphics Core Next (GCN3) with "Tonga" and "Fiji" (VCE 3.0) based graphics controller hardware, which is now used AMD Radeon Rx 300 series (Pirate Islands GPU family) and VCE 3.4 by actual AMD Radeon Rx 400 series and AMD Radeon 500 series (both Polaris GPU family).

  • Tonga: Radeon R9 285, 380, 380X; Mobile Radeon R9 M390X, M395, M395X, M485X
  • Tonga XT: FirePro W7100, S7100X, S7150, S7150 X2
  • Fiji: Radeon R9 Fury, Fury X, Nano; Radeon Pro Duo (2016); FirePro S9300, W7170M; Instinct MI8
  • Polaris: RX 460, 470, 480; RX 550, 560, 570, 580; Radeon Pro Duo (2017)

AMD's Carrizo platform features VCE 3.1, retaining the same capabilities as the VCE found in "Fiji" and "Tonga".[12]

Stoney Ridge features a cut down version of VCE 3.4 without HEVC/H.265 encoding and is accompanied by a UVD 6.2 engine.[13]

VCE 3.0 removes support for H.264 B-frames.[14]

VCE 4.0

[edit]

The Video Code Engine 4.0 encoder and UVD 7.0 decoder are included in the Vega-based GPUs.[15][16]

VCE 4.1

[edit]

AMD's Vega20 GPU, present in the Instinct Mi50, Instinct Mi60 and Radeon VII cards, include VCE 4.1 and two UVD 7.2 instances.[17][18]

Feature overview

[edit]

APUs

[edit]

The following table shows features of AMD's processors with 3D graphics, including APUs (see also: List of AMD processors with 3D graphics).

[ VisualEditor ]
Platform High, standard and low power Low and ultra-low power
Codename Server Basic Toronto
Micro Kyoto
Desktop Performance Raphael Phoenix
Mainstream Llano Trinity Richland Kaveri Kaveri Refresh (Godavari) Carrizo Bristol Ridge Raven Ridge Picasso Renoir Cezanne
Entry
Basic Kabini Dalí
Mobile Performance Renoir Cezanne Rembrandt Dragon Range
Mainstream Llano Trinity Richland Kaveri Carrizo Bristol Ridge Raven Ridge Picasso Renoir
Lucienne 		Cezanne
Barceló 		Phoenix
Entry Dalí Mendocino
Basic Desna, Ontario, Zacate Kabini, Temash Beema, Mullins Carrizo-L Stoney Ridge Pollock
Embedded Trinity Bald Eagle Merlin Falcon,
Brown Falcon 		Great Horned Owl Grey Hawk Ontario, Zacate Kabini Steppe Eagle, Crowned Eagle,
LX-Family 		Prairie Falcon Banded Kestrel River Hawk
Released Aug 2011 Oct 2012 Jun 2013 Jan 2014 2015 Jun 2015 Jun 2016 Oct 2017 Jan 2019 Mar 2020 Jan 2021 Jan 2022 Sep 2022 Jan 2023 Jan 2011 May 2013 Apr 2014 May 2015 Feb 2016 Apr 2019 Jul 2020 Jun 2022 Nov 2022
CPU microarchitecture K10 Piledriver Steamroller Excavator "Excavator+"[19] Zen Zen+ Zen 2 Zen 3 Zen 3+ Zen 4 Bobcat Jaguar Puma Puma+[20] "Excavator+" Zen Zen+ "Zen 2+"
ISA x86-64 v1 x86-64 v2 x86-64 v3 x86-64 v4 x86-64 v1 x86-64 v2 x86-64 v3
Socket Desktop Performance — AM5 — —
Mainstream — AM4 — —
Entry FM1 FM2 FM2+ FM2+[a], AM4 AM4 —
Basic — — AM1 — FP5 —
Other FS1 FS1+, FP2 FP3 FP4 FP5 FP6 FP7 FL1 FP7
FP7r2
FP8 		FT1 FT3 FT3b FP4 FP5 FT5 FP5 FT6
PCI Express version 2.0 3.0 4.0 5.0 4.0 2.0 3.0
CXL — —
Fab. (nm) GF 32SHP
(HKMG SOI) 		GF 28SHP
(HKMG bulk) 		GF 14LPP
(FinFET bulk) 		GF 12LP
(FinFET bulk) 		TSMC N7
(FinFET bulk) 		TSMC N6
(FinFET bulk) 		CCD: TSMC N5
(FinFET bulk)
cIOD: TSMC N6
(FinFET bulk) 		TSMC 4nm
(FinFET bulk) 		TSMC N40
(bulk) 		TSMC N28
(HKMG bulk) 		GF 28SHP
(HKMG bulk) 		GF 14LPP
(FinFET bulk) 		GF 12LP
(FinFET bulk) 		TSMC N6
(FinFET bulk)
Die area (mm2) 228 246 245 245 250 210[21] 156 180 210 CCD: (2x) 70
cIOD: 122 		178 75 (+ 28 FCH) 107 ? 125 149 ~100
Min TDP (W) 35 17 12 10 15 65 35 4.5 4 3.95 10 6 12 8
Max APU TDP (W) 100 95 65 45 170 54 18 25 6 54 15
Max stock APU base clock (GHz) 3 3.8 4.1 4.1 3.7 3.8 3.6 3.7 3.8 4.0 3.3 4.7 4.3 1.75 2.2 2 2.2 3.2 2.6 1.2 3.35 2.8
Max APUs per node[b] 1 1
Max core dies per CPU 1 2 1 1
Max CCX per core die 1 2 1 1
Max cores per CCX 4 8 2 4 2 4
Max CPU[c] cores per APU 4 8 16 8 2 4 2 4
Max threads per CPU core 1 2 1 2
Integer pipeline structure 3+3 2+2 4+2 4+2+1 1+3+3+1+2 1+1+1+1 2+2 4+2 4+2+1
i386, i486, i586, CMOV, NOPL, i686, PAE, NX bit, CMPXCHG16B, AMD-V, RVI, ABM, and 64-bit LAHF/SAHF Yes Yes
IOMMU[d] — v2 v1 v2
BMI1, AES-NI, CLMUL, and F16C Yes — Yes
MOVBE — Yes
AVIC, BMI2, RDRAND, and MWAITX/MONITORX — Yes
SME[e], TSME[e], ADX, SHA, RDSEED, SMAP, SMEP, XSAVEC, XSAVES, XRSTORS, CLFLUSHOPT, CLZERO, and PTE Coalescing — Yes — Yes
GMET, WBNOINVD, CLWB, QOS, PQE-BW, RDPID, RDPRU, and MCOMMIT — Yes — Yes
MPK, VAES — Yes —
SGX — —
FPUs per core 1 0.5 1 1 0.5 1
Pipes per FPU 2 2
FPU pipe width 128-bit 256-bit 80-bit 128-bit 256-bit
CPU instruction set SIMD level SSE4a[f] AVX AVX2 AVX-512 SSSE3 AVX AVX2
3DNow! 3DNow!+ — —
PREFETCH/PREFETCHW Yes Yes
GFNI — Yes —
AMX —
FMA4, LWP, TBM, and XOP — Yes — — Yes —
FMA3 Yes Yes
AMD XDNA — Yes —
L1 data cache per core (KiB) 64 16 32 32
L1 data cache associativity (ways) 2 4 8 8
L1 instruction caches per core 1 0.5 1 1 0.5 1
Max APU total L1 instruction cache (KiB) 256 128 192 256 512 256 64 128 96 128
L1 instruction cache associativity (ways) 2 3 4 8 2 3 4 8
L2 caches per core 1 0.5 1 1 0.5 1
Max APU total L2 cache (MiB) 4 2 4 16 1 2 1 2
L2 cache associativity (ways) 16 8 16 8
Max on-die L3 cache per CCX (MiB) — 4 16 32 — 4
Max 3D V-Cache per CCD (MiB) — 64 — —
Max total in-CCD L3 cache per APU (MiB) 4 8 16 64 4
Max. total 3D V-Cache per APU (MiB) — 64 — —
Max. board L3 cache per APU (MiB) — —
Max total L3 cache per APU (MiB) 4 8 16 128 4
APU L3 cache associativity (ways) 16 16
L3 cache scheme Victim Victim
Max. L4 cache — —
Max stock DRAM support DDR3-1866 DDR3-2133 DDR3-2133, DDR4-2400 DDR4-2400 DDR4-2933 DDR4-3200, LPDDR4-4266 DDR5-4800, LPDDR5-6400 DDR5-5200 DDR5-5600, LPDDR5x-7500 DDR3L-1333 DDR3L-1600 DDR3L-1866 DDR3-1866, DDR4-2400 DDR4-2400 DDR4-1600 DDR4-3200 LPDDR5-5500
Max DRAM channels per APU 2 1 2 1 2
Max stock DRAM bandwidth (GB/s) per APU 29.866 34.132 38.400 46.932 68.256 102.400 83.200 120.000 10.666 12.800 14.933 19.200 38.400 12.800 51.200 88.000
GPU microarchitecture TeraScale 2 (VLIW5) TeraScale 3 (VLIW4) GCN 2nd gen GCN 3rd gen GCN 5th gen[22] RDNA 2 RDNA 3 TeraScale 2 (VLIW5) GCN 2nd gen GCN 3rd gen[22] GCN 5th gen RDNA 2
GPU instruction set TeraScale instruction set GCN instruction set RDNA instruction set TeraScale instruction set GCN instruction set RDNA instruction set
Max stock GPU base clock (MHz) 600 800 844 866 1108 1250 1400 2100 2400 400 538 600 ? 847 900 1200 600 1300 1900
Max stock GPU base GFLOPS[g] 480 614.4 648.1 886.7 1134.5 1760 1971.2 2150.4 3686.4 102.4 86 ? ? ? 345.6 460.8 230.4 1331.2 486.4
3D engine[h] Up to 400:20:8 Up to 384:24:6 Up to 512:32:8 Up to 704:44:16[23] Up to 512:32:8 768:48:8 128:8:4 80:8:4 128:8:4 Up to 192:12:8 Up to 192:12:4 192:12:4 Up to 512:?:? 128:?:?
IOMMUv1 IOMMUv2 IOMMUv1 ? IOMMUv2
Video decoder UVD 3.0 UVD 4.2 UVD 6.0 VCN 1.0[24] VCN 2.1[25] VCN 2.2[25] VCN 3.1 ? UVD 3.0 UVD 4.0 UVD 4.2 UVD 6.2 VCN 1.0 VCN 3.1
Video encoder — VCE 1.0 VCE 2.0 VCE 3.1 — VCE 2.0 VCE 3.4
AMD Fluid Motion No Yes No No Yes No
GPU power saving PowerPlay PowerTune PowerPlay PowerTune[26]
TrueAudio — Yes[27] ? — Yes
FreeSync 1
2 		1
2
HDCP[i] ? 1.4 2.2 2.3 ? 1.4 2.2 2.3
PlayReady[i] — 3.0 not yet — 3.0 not yet
Supported displays[j] 2–3 2–4 3 3 (desktop)
4 (mobile, embedded)		 4 2 3 4 4
/drm/radeon[k][29][30] Yes — Yes —
/drm/amdgpu[k][31] — Yes[32] — Yes[32]
  1. ^ For FM2+ Excavator models: A8-7680, A6-7480 & Athlon X4 845.
  2. ^ A PC would be one node.
  3. ^ An APU combines a CPU and a GPU. Both have cores.
  4. ^ Requires firmware support.
  5. ^ a b Requires firmware support.
  6. ^ No SSE4. No SSSE3.
  7. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
  8. ^ Unified shaders : texture mapping units : render output units
  9. ^ a b To play protected video content, it also requires card, operating system, driver, and application support. A compatible HDCP display is also needed for this. HDCP is mandatory for the output of certain audio formats, placing additional constraints on the multimedia setup.
  10. ^ To feed more than two displays, the additional panels must have native DisplayPort support.[28] Alternatively active DisplayPort-to-DVI/HDMI/VGA adapters can be employed.
  11. ^ a b DRM (Direct Rendering Manager) is a component of the Linux kernel. Support in this table refers to the most current version.

GPUs

[edit]

The following table shows features of AMD/ATI's GPUs (see also: List of AMD graphics processing units).

[ VisualEditor ]
Name of GPU series Wonder Mach 3D Rage Rage Pro Rage 128 R100 R200 R300 R400 R500 R600 RV670 R700 Evergreen Northern
Islands 		Southern
Islands 		Sea
Islands 		Volcanic
Islands 		Arctic
Islands/Polaris 		Vega Navi 1x Navi 2x Navi 3x Navi 4x
Released 1986 1991 Apr
1996 		Mar
1997 		Aug
1998 		Apr
2000 		Aug
2001 		Sep
2002 		May
2004 		Oct
2005 		May
2007 		Nov
2007 		Jun
2008 		Sep
2009 		Oct
2010 		Dec
2010 		Jan
2012 		Sep
2013 		Jun
2015 		Jun 2016, Apr 2017, Aug 2019 Jun 2017, Feb 2019 Jul
2019 		Nov
2020 		Dec
2022 		Feb
2025
Marketing Name Wonder Mach 3D
Rage 		Rage
Pro 		Rage
128 		Radeon
7000 		Radeon
8000 		Radeon
9000 		Radeon
X700/X800 		Radeon
X1000 		Radeon
HD 2000 		Radeon
HD 3000 		Radeon
HD 4000 		Radeon
HD 5000 		Radeon
HD 6000 		Radeon
HD 7000 		Radeon
200 		Radeon
300 		Radeon
400/500/600 		Radeon
RX Vega, Radeon VII 		Radeon
RX 5000 		Radeon
RX 6000 		Radeon
RX 7000 		Radeon
RX 9000
AMD support Ended Current
Kind 2D 3D
Instruction set architecture Not publicly known TeraScale instruction set GCN instruction set RDNA instruction set
Microarchitecture Not publicly known GFX1 GFX2 TeraScale 1
(VLIW5)
(GFX3) 		TeraScale 2
(VLIW5)
(GFX4) 		TeraScale 2
(VLIW5)
up to 68xx
(GFX4) 		TeraScale 3
(VLIW4)
in 69xx [33][34]
(GFX5) 		GCN 1st
gen
(GFX6) 		GCN 2nd
gen
(GFX7) 		GCN 3rd
gen
(GFX8) 		GCN 4th
gen
(GFX8) 		GCN 5th
gen
(GFX9) 		RDNA
(GFX10.1) 		RDNA 2
(GFX10.3) 		RDNA 3
(GFX11) 		RDNA 4
(GFX12)
Type Fixed pipeline[a] Programmable pixel & vertex pipelines Unified shader model
Direct3D — 5.0 6.0 7.0 8.1 9.0
11 (9_2) 		9.0b
11 (9_2) 		9.0c
11 (9_3) 		10.0
11 (10_0) 		10.1
11 (10_1) 		11 (11_0) 11 (11_1)
12 (11_1) 		11 (12_0)
12 (12_0) 		11 (12_1)
12 (12_1) 		11 (12_1)
12 (12_2)
Shader model — 1.4 2.0+ 2.0b 3.0 4.0 4.1 5.0 5.1 5.1
6.5 		6.7 6.8
OpenGL — 1.1 1.2 1.3 1.5[b][35] 3.3 4.6[36][c]
Vulkan — 1.1[c][d] 1.3[37][e] 1.4[38]
OpenCL — Close to Metal 1.1 (not supported by Mesa) 1.2+ (on Linux: 1.1+ (no Image support on Clover, with by Rusticl) with Mesa, 1.2+ on GCN 1.Gen) 2.0+ (Adrenalin driver on Win7+)
(on Linux ROCm, Mesa 1.2+ (no Image support in Clover, but in Rusticl with Mesa, 2.0+ and 3.0 with AMD drivers or AMD ROCm), 5th gen: 2.2 win 10+ and Linux RocM 5.0+ 		2.2+ and 3.0 Windows 8.1+ and Linux ROCm 5.0+ (Mesa Rusticl 1.2+ and 3.0 (2.1+ and 2.2+ wip))[39][40][41]
HSA / ROCm — Yes ?
Video decoding ASIC — Avivo/UVD UVD+ UVD 2 UVD 2.2 UVD 3 UVD 4 UVD 4.2 UVD 5.0 or 6.0 UVD 6.3 UVD 7 [15][f] VCN 2.0 [15][f] VCN 3.0 [42] VCN 4.0 VCN 5.0
Video encoding ASIC — VCE 1.0 VCE 2.0 VCE 3.0 or 3.1 VCE 3.4 VCE 4.0 [15][f]
Fluid Motion [g] No Yes No ?
Power saving ? PowerPlay PowerTune PowerTune & ZeroCore Power ?
TrueAudio — Via dedicated DSP Via shaders
FreeSync — 1
2
HDCP[h] — ? 1.4 2.2 2.3 [43]
PlayReady[h] — 3.0 No 3.0
Supported displays[i] 1–2 2 2–6 ? 4
Max. resolution ? 2–6 ×
2560×1600 		2–6 ×
4096×2160 @ 30 Hz 		2–6 ×
5120×2880 @ 60 Hz 		3 ×
7680×4320 @ 60 Hz [44]
7680×4320 @ 60 Hz PowerColor 		7680x4320

@165 Hz

7680x4320
/drm/radeon[j] Yes —
/drm/amdgpu[j] — Optional [45] Yes
  1. ^ The Radeon 100 Series has programmable pixel shaders, but do not fully comply with DirectX 8 or Pixel Shader 1.0. See article on R100's pixel shaders.
  2. ^ R300, R400 and R500 based cards do not fully comply with OpenGL 2+ as the hardware does not support all types of non-power of two (NPOT) textures.
  3. ^ a b OpenGL 4+ compliance requires supporting FP64 shaders and these are emulated on some TeraScale chips using 32-bit hardware.
  4. ^ Vulkan support is theoretically possible but has not been implemented in a stable driver.
  5. ^ Vulkan support in Linux relies on the amdgpu kernel driver which is incomplete and not enabled by default for GFX6 and GFX7.
  6. ^ a b c The UVD and VCE were replaced by the Video Core Next (VCN) ASIC in the Raven Ridge APU implementation of Vega.
  7. ^ Video processing for video frame rate interpolation technique. In Windows it works as a DirectShow filter in your player. In Linux, there is no support on the part of drivers and / or community.
  8. ^ a b To play protected video content, it also requires card, operating system, driver, and application support. A compatible HDCP display is also needed for this. HDCP is mandatory for the output of certain audio formats, placing additional constraints on the multimedia setup.
  9. ^ More displays may be supported with native DisplayPort connections, or splitting the maximum resolution between multiple monitors with active converters.
  10. ^ a b DRM (Direct Rendering Manager) is a component of the Linux kernel. AMDgpu is the Linux kernel module. Support in this table refers to the most current version.

Operating system support

[edit]

The VCE SIP core needs to be supported by the device driver. The device driver provides one or multiple interfaces, e. g. OpenMAX IL. One of these interfaces is then used by end-user software, like GStreamer or HandBrake (HandBrake rejected VCE support in December 2016,[46] but added it in December 2018[47]), to access the VCE hardware and make use of it.

AMD's proprietary device driver AMD Catalyst is available for multiple operating systems and support for VCE was added to it[citation needed]. Additionally, a free device driver is available. This driver also supports the VCE hardware.

Linux

[edit]
Main articles: AMD Catalyst for Linux and Free Radeon driver
Support for the VCE ASIC is contained in the Linux kernel device driver amdgpu.

Windows

[edit]

The software "MediaShow Espresso Video Transcoding" seems to utilize VCE and UVD to the fullest extent possible.[52]

XSplit Broadcaster supports VCE from version 1.3.[53]

Open Broadcaster Software (OBS Studio) supports VCE for recording and streaming. The original Open Broadcaster Software (OBS) requires a fork build in order to enable VCE.[54]

AMD Radeon Software supports VCE with built in game capture ("Radeon ReLive") and use AMD AMF/VCE on APU or Radeon Graphics card to reduce FPS drop when capturing game or video content.[55]

HandBrake added Video Coding Engine support in version 1.2.0 in December 2018.[47]

Successor

[edit]
Main article: Video Core Next

The VCE was succeeded by AMD Video Core Next in the Raven Ridge series of APUs released in October 2017. The VCN combines both encode (VCE) and decode (UVD).[56]

See also

[edit]

Video hardware technologies

[edit]

AMD

[edit]

Others

[edit]

References

[edit]
Revisions and contributorsEdit on WikipediaRead on Wikipedia

Video Coding Engine

View on Grokipedia
from Grokipedia
The Video Coding Engine (VCE) is a dedicated hardware component developed by and integrated into its graphics processing units (GPUs), providing accelerated video encoding for standards such as H.264/AVC, with subsequent generations adding support for H.265/HEVC; its successor, (VCN), added support for to enable efficient compression of high-resolution video streams for streaming, recording, and content creation. Introduced in December 2011 alongside the GPUs based on the (GCN) architecture, VCE marked AMD's first full hardware implementation of video encoding, capable of handling video at 60 frames per second while offloading computational tasks from the CPU to improve system performance during real-time applications like game capture and live broadcasting. Over multiple iterations, VCE evolved to enhance encoding quality and efficiency; for example, VCE 1.0 focused on baseline H.264 support, VCE 2.0 introduced improvements for higher bitrates and dual-pipe encoding in the R9 200 series, and VCE 3.0 added HEVC encoding in products like the and GPUs, allowing for better compression ratios in 4K workflows. In 2018, with the release of the Raven APUs, AMD replaced VCE and the separate (UVD) with the unified (VCN) architecture, which expanded to include both encoding and decoding while maintaining and introducing features like encoding in later RDNA-based GPUs such as the RX 7000 series. Developers access VCE and its successors through frameworks like the open-source Advanced Media Framework (AMF) SDK, which supports cross-platform integration for video processing in applications including , , and , ensuring low-latency performance and reduced power consumption compared to software-only encoding.

Introduction

Purpose and Capabilities

The Video Coding Engine (VCE) is an (ASIC) developed by for hardware-accelerated video encoding, primarily implementing the to compress high-definition video streams. Introduced as a dedicated hardware block within AMD graphics processors, VCE offloads encoding tasks from the CPU, enabling efficient processing without relying on general-purpose compute resources. VCE supports full hardware encoding of H.264 video up to resolution at 60 frames per second, including baseline profile with CABAC for high-quality compression. It offers two primary modes: a full-fixed mode where the entire encoding pipeline operates on the ASIC for maximum efficiency, and a hybrid mode that combines the VCE's encoding block with GPU compute units (such as 3D shaders) to handle and other tasks, allowing for scalable performance based on workload demands. Integration is facilitated through APIs like IL for fixed-mode access and the APP SDK with support for hybrid operations, enabling developers to leverage VCE in multimedia applications. By performing encoding in dedicated hardware, VCE significantly reduces CPU utilization, power consumption, and latency compared to software-based methods, supporting real-time transcoding and applications like for streaming and recording. It complements AMD's (UVD) to provide asymmetric encode/decode capabilities in graphics hardware, optimizing overall media workflows. Later iterations expanded support to codecs like HEVC for higher efficiency.

Development History

The Video Coding Engine (VCE) originated from AMD's efforts, building on its acquisition of in 2006, to integrate dedicated video encoding hardware into consumer GPUs amid rising demands for efficient video processing in applications like gaming and streaming. Announced on December 22, 2011, alongside the launch of the (codenamed Southern Islands), VCE marked AMD's entry into hardware-accelerated video encoding for mainstream discrete graphics cards. This introduction coincided with the debut of AMD's (GCN) architecture, which provided the foundational compute framework for VCE's implementation, enabling seamless integration within the GPU die to handle encoding tasks without heavily relying on the CPU. Initially, VCE focused on supporting the H.264/MPEG-4 AVC , prioritizing low-latency encoding suitable for real-time applications such as displays and . Key milestones in its early development included optimizations for compression, with the engine occupying a significant portion of the GPU's die area to deliver performance comparable to software encoders but with lower power consumption and CPU overhead. As iterated on GCN architectures—from the first-generation Southern Islands through subsequent and Volcanic Islands families—VCE evolved to support higher resolutions and frame rates, maintaining compatibility across GPUs and while addressing the growing needs of content creators and broadcasters. Development progressed with the addition of support for emerging standards, notably HEVC/H.265 encoding introduced in 2014-2015 with VCE 3.0 in GPUs like the R9 285 () and R9 Fury (), enabling 4K video handling for ultra-high-definition content, and aligned with industry shifts toward more bandwidth-efficient formats. Further improvements appeared in 2016 embedded GPUs and the discrete RX 400 series. The primary motivations for VCE's creation stemmed from the inefficiencies of software-based encoding, which strained CPU resources and limited real-time performance in gaming, , and streaming workflows; by offloading these tasks to specialized hardware, AMD aimed to enhance and compete effectively in the market dominated by CPU-bound solutions. This positioned VCE as a direct counterpart to like NVIDIA's NVENC, introduced shortly after in , fostering a competitive that accelerated hardware encoding adoption. Primary development of VCE concluded around 2017-2018, with AMD transitioning to a unified (VCN) engine starting with the Raven Ridge APUs in late 2017, which combined encoding and decoding capabilities for more streamlined media processing.

Version History

VCE 1.0

The Video Coding Engine 1.0 (VCE 1.0) marked AMD's initial foray into dedicated hardware video encoding, debuting in late 2011 alongside the Southern Islands GPU family, such as the Radeon HD 7700 series graphics cards. This version established a foundational hardware block for accelerating H.264 encoding, positioned as a counterpart to Intel's Quick Sync technology, and was later integrated into Piledriver-based Accelerated Processing Units () like the (released in 2012) and Richland (released in 2013) platforms. VCE 1.0 represented the first (ASIC) in AMD's lineup solely dedicated to video encoding, operating independently from the existing (UVD) which handled decoding tasks. At its core, VCE 1.0 supported H.264 (MPEG-4 AVC) encoding in color format, limited to intra-frame (I-frames) and predictive (P-frames) types without bidirectional (B-frames) for . It also incorporated Scalable Video Coding (SVC) temporal encoding capabilities for layered scalability in video streams and a basic Display Encode Mode (DEM) with an integrated deblocking engine to reduce compression artifacts. These features were embedded within the (GCN) 1.0 architecture, occupying a notable portion of the die area to enable efficient, low-latency encoding primarily optimized for applications like wireless display streaming. Despite its pioneering role, VCE 1.0 had notable constraints that reflected its early-stage design. It lacked support for 4:4:4 color formats and advanced video scaling operations, restricting its versatility for professional workflows. The maximum output resolution was capped at (1920x1080) at 60 frames per second, aligning with high-definition streaming needs of the era but limiting higher-resolution or frame-rate scenarios. Subsequent iterations, such as VCE 2.0, addressed some of these shortcomings by adding B-frame support for improved compression efficiency. Overall, VCE 1.0 laid the groundwork for AMD's evolving video ecosystem, prioritizing real-time performance over advanced flexibility.

VCE 2.0

VCE 2.0 debuted in 2013 alongside AMD's GPUs, including the mid-range HD 7790, marking the introduction of the GCN 2.0 architecture. This version of the engine was also integrated into Steamroller-based and Godavari APUs, providing hardware-accelerated video encoding capabilities in both discrete graphics and integrated solutions. Built directly into the GCN 2.0 architecture, VCE 2.0 supports scalable hybrid encoding, where and other tasks can offload to the GPU's compute units for improved throughput in resource-intensive scenarios. Key enhancements in VCE 2.0 focused on expanding H.264 encoding flexibility and quality. It added support for H.264 YUV444 encoding in I-frames, enabling higher-fidelity color representation suitable for applications like wireless displays at 60 Hz. Additionally, B-frames were introduced for H.264 YUV420, allowing bidirectional prediction to enhance temporal compression. An upgraded Display Encode Mode (DEM) improved deblocking filters, reducing artifacts and elevating overall visual fidelity during real-time encoding tasks. These upgrades delivered better bit-rate efficiency and visual quality compared to VCE 1.0, particularly through B-frame support that optimized compression without sacrificing detail in standard H.264 workflows. However, VCE 2.0 remained limited to H.264 encoding, lacking support for emerging codecs like HEVC. This version laid foundational scaling mechanisms that influenced subsequent iterations, such as VCE 3.x.

VCE 3.x

VCE 3.0 was introduced with the GCN 3.0 architecture in the and GPUs, including the R9 285 released in 2014 and the R9 Fury series in 2015. This version featured an updated Video Coding Engine with improved performance for video encoding, supporting H.264 encoding up to resolution. A variant, VCE 3.1, was integrated into the Carrizo launched in 2015, featuring dual H.264 encoder instances capable of 4K encoding, twin front-end pipelines per instance, and up to 350% improvement in throughput compared to the previous generation, with performance reaching 169 fps for 720p-to-720p and 78 fps for 1080p-to-720p/ transcoding. VCE 3.4 arrived in 2016 with the GPUs, such as the RX 470, and added support for HEVC/H.265 encoding up to , marking a shift toward high-efficiency codecs for the 4K era while removing H.264 B-frame support to prioritize HEVC performance. This version improved efficiency for high-resolution encoding in GCN 4.0 architectures, though 10-bit HEVC encoding was not supported in initial implementations, with decoding available on hardware.

VCE 4.x

VCE 4.0 was released in 2017 alongside AMD's GPUs, including models like the , marking a significant advancement in the Video Coding Engine's capabilities for high-performance video encoding. This version integrated into the (GCN) 5.0 architecture, which emphasized improved compute efficiency and memory bandwidth to support demanding multimedia workloads. VCE 4.1 arrived in 2018 with the Vega 20 GPUs, such as the Instinct MI50 accelerator, extending these enhancements to professional and compute-oriented applications. The specifications of VCE 4.x focused on refined HEVC (H.265) encoding, featuring superior rate control mechanisms like constant bitrate (CBR) and (VBR) modes with enhanced quality preservation compared to prior iterations, reducing artifacts in complex scenes. It maintained support for both H.264 (AVC) and HEVC codecs, enabling resolutions up to 4K at 60 fps in standard modes, while hybrid configurations leveraged GPU assistance for scalability in higher-resolution workflows. Improved hybrid encoding scalability allowed seamless integration of with software elements, optimizing throughput for multi-stream scenarios and reducing latency in real-time applications. Key features in VCE 4.x included advanced video preprocessing and analytics capabilities through the AMD Advanced Media Framework (AMF), such as content-adaptive quantization and preprocessing, which boosted compression efficiency and visual fidelity for broadcast and streaming use cases. These optimizations delivered higher throughput for professional workloads, with Vega-based implementations achieving up to 2x faster encoding speeds in HEVC compared to GCN 4.x predecessors, particularly in multi-pass modes for . As part of the GCN 5.0 architecture, VCE 4.x represented the culmination of AMD's dedicated video encoding hardware, incorporating next-generation compute units for better power efficiency and integration with high-bandwidth memory (HBM2). It served as the final major standalone VCE iteration before the transition to the unified (VCN) engine beginning in 2018.

Technical Features

Supported Codecs

The Video Coding Engine (VCE) primarily supports H.264/MPEG-4 AVC as its core across all versions, providing hardware-accelerated encoding for with capabilities such as intra and inter-frame prediction. This operates with profiles including High Profile, accommodating 4:2:0 format at bit depths up to 8-bit, ensuring compatibility with a wide range of broadcast and streaming applications. HEVC/H.265 encoding was introduced in VCE 3.4, marking a significant advancement in compression efficiency for higher resolutions and bit depths. It supports Main and Main10 profiles, enabling up to 10-bit color depth suitable for HDR content, with resolutions reaching 4K at 60 fps. In VCE 4.x iterations, these capabilities were improved for higher efficiency in 4K workflows while maintaining dual compatibility with H.264. Early VCE versions, such as 1.0 and 2.0, offered limited support for Scalable Video Coding (SVC) extensions of H.264, primarily for temporal scalability in scenarios. However, VCE does not include native encoding for or formats, with such capabilities emerging in successor technologies like . Over its evolution, VCE shifted from H.264-exclusive encoding to a dual H.264/HEVC framework, broadening applicability for 4K streaming, content distribution, and professional by balancing compression ratios and quality. Encoding modes for these codecs, such as constant bitrate and variable bitrate options, are handled through integrated processes detailed separately.

Encoding Modes and Processes

The Video Coding Engine (VCE) supports two primary encoding modes to balance performance, latency, and flexibility: full-fixed hardware mode and hybrid mode. In full-fixed hardware mode, the entire encoding pipeline is executed exclusively by dedicated ASIC hardware, minimizing latency and enabling real-time encoding without involvement from the GPU's programmable units, which is ideal for applications requiring low power and high-speed processing such as . This mode handles all steps of the compression through fixed-function logic, similar to Intel's Quick Sync Video, achieving efficient macroblock-level parallelism for resolutions up to at 60 FPS. In contrast, hybrid mode integrates the ASIC with the GPU's 3D or compute shaders, offloading certain computations to programmable units for enhanced features like advanced or custom filtering, though this increases power consumption and complexity. Codecs like H.264 are processed in these modes, leveraging VCE's hardware for core compression tasks. The encoding process in VCE follows a structured optimized for hardware efficiency, beginning with input frame preprocessing that includes scaling to match target resolution and color space conversion (e.g., from RGB to ) to prepare raw video for compression. Subsequent stages involve and compensation, where the engine searches for temporal redundancies across frames using block-matching algorithms to generate motion vectors, typically at or sub-macroblock levels for inter-prediction in P- and B-frames. Intra- and inter-prediction modes are then applied: intra-prediction uses spatial correlations within the current frame to predict values from neighboring blocks, while inter-prediction combines motion-compensated from reference frames, with mode selection based on rate-distortion optimization to minimize encoding cost. Following prediction, the residual data undergoes transform and quantization, where a (DCT) or similar integer transform converts spatial data into frequency coefficients, followed by quantization to reduce precision and control bitrate, with quantization parameters (QP) adjusted dynamically for quality-bitrate trade-offs. Entropy coding concludes the core pipeline, employing Context-Adaptive Binary Arithmetic Coding (CABAC) or Context-Adaptive Variable-Length Coding (CAVLC) to compress the quantized coefficients and syntax elements into a compact , ensuring efficient data packing without loss of essential information. The output generation assembles these elements into a standards-compliant container, ready for transmission or storage. Unique to VCE's design, the hybrid mode allows scalability by utilizing GPU shaders for custom pre- or post-processing filters, such as or temporal denoising, extending beyond fixed-function capabilities. An integrated deblocking engine (DEM) applies in-loop filtering to reduce blocking artifacts at boundaries, improving visual quality by smoothing discontinuities while preserving edges, as part of the reconstruction loop in both modes. Overall efficiency stems from hardware parallelism, where multiple are processed concurrently across pipeline stages, enabling real-time encoding rates (e.g., at 30-60 FPS) with minimal CPU intervention, thus offloading the host processor for other tasks.

Hardware Implementations

GPUs

The Video Coding Engine (VCE) is embedded as a dedicated hardware block within AMD's (GCN) architectures, from version 1.0 through 5.0, providing fixed-function acceleration for video encoding tasks. This integration occurs alongside the (UVD) on the GPU die, forming a cohesive media processing unit that optimizes space and power efficiency for both encoding and decoding operations. The VCE's performance scales with the overall GPU configuration, particularly the number of compute units (CUs); higher-CU designs, such as those in flagship models, support elevated clock speeds and power delivery, enabling greater encoding throughput compared to entry-level variants within the same family. Prominent implementations of VCE span multiple GCN-based discrete GPU generations, each advancing codec support and efficiency. The Southern Islands family, including the , debuted VCE 1.0 with H.264 encoding capabilities. GPUs, such as the Radeon HD 7790, upgraded to VCE 2.0, adding multi-reference frame for improved compression. In the Volcanic Islands era, and architectures—seen in the Radeon R9 285 and R9 Fury—introduced VCE 3.0 with advanced H.264 features, including dual-pipe encoding. GPUs like the Radeon RX 470 introduced VCE 3.4 with HEVC Main10 encoding support for 10-bit . Vega-based cards, exemplified by the Radeon VII, featured VCE 4.0, unifying further refinements in high-efficiency video coding. In terms of performance, later VCE iterations deliver robust capabilities for modern resolutions, with versions 3.4 and 4.0 supporting HEVC encoding up to 4K (3840x2160) at 60 frames per second, achieving real-time rates suitable for demanding workloads while maintaining low latency. This enables efficient handling of high-bitrate without significantly impacting GPU compute resources for rendering. Such performance is evident in benchmarks where and GPUs encode 4K HEVC content at speeds exceeding 25-30 fps under balanced presets, scaling to 60 fps with optimized settings. VCE finds practical application in gaming and scenarios on discrete GPUs, where its low-overhead design minimizes interference with primary rendering tasks. Within AMD's Software: Adrenalin Edition, VCE powers real-time encoding for streaming and gameplay capture via features like Radeon ReLive, supporting H.264 and HEVC outputs for platforms such as Twitch and with frame rates up to 60 fps at or higher. In professional , it accelerates workflows in , enabling GPU-accelerated HEVC exports and playback, which can reduce render times by up to 50% compared to CPU-only processing on compatible GPUs.

APUs

The Video Coding Engine (VCE) is integrated into Accelerated Processing Units (), combining video encoding hardware with CPU cores on a single die to enable efficient processing in power-constrained environments such as laptops and desktop all-in-one systems. In desktop , VCE shares the FM2 and FM2+ sockets with Piledriver, , and CPU architectures, allowing seamless operation within unified system-on-chip designs. These implementations feature lower clock speeds compared to discrete GPUs, typically operating at reduced frequencies to adhere to (TDP) limits of 65-95W, which optimizes energy efficiency for mobile and compact desktop scenarios. Key VCE implementations in APUs include the and Richland series, based on Piledriver CPU cores with VCE 1.0, introduced in 2012 and 2013 for FM2/FM2+ sockets. These provided foundational H.264 encoding support tailored for integrated graphics. Subsequent generations advanced with the and Godavari APUs, utilizing cores and VCE 2.0 starting in 2014, also on FM2+ sockets, enhancing encode quality and adding features like improved rate control for better efficiency in shared die environments. The mobile-focused Carrizo APU, powered by cores and VCE 3.1 in 2015, further refined these capabilities for laptop platforms with socketless BGA packaging, emphasizing low-power operation. Performance in APU-based VCE is balanced for encoding at 30-60 frames per second, prioritizing thermal and power efficiency over the higher throughput of discrete GPU counterparts. A hybrid mode in these leverages shared CPU and GPU resources, including unified access, to distribute encoding tasks and reduce overall system load during multimedia workloads. This approach enables real-time processing without excessive heat generation, contrasting with the performance-oriented designs in standalone GPUs. VCE in supports use cases like video conferencing and light streaming on laptops, where low-latency H.264 encoding ensures smooth real-time communication under battery constraints. In all-in-one desktop PCs, it facilitates content creation tasks such as basic and recording, benefiting from the integrated design's efficiency for everyday applications.

Software Support

Windows

Support for the AMD Video Coding Engine (VCE) on Windows is provided through 's graphics drivers, which enable hardware-accelerated video encoding. The legacy AMD drivers, starting from version 13.10 beta, introduced initial VCE support for H.264 encoding on compatible GPUs. These were succeeded by the AMD Software: Adrenalin Edition drivers, which continue to support VCE hardware in later generations through version 22.6.1 for and subsequent versions for and later as of 2025. VCE accessibility on Windows leverages (DXVA) for decoder integration and for encoder transforms, allowing seamless use in applications. For developer access, VCE is primarily controlled via the AMD Advanced Media Framework (AMF) SDK, which offers an API for video encoding, decoding, and preprocessing on GPUs, including VCE blocks. This SDK integrates with earlier tools like the AMD APP SDK, enabling hybrid CPU-GPU encoding workflows for custom applications on SP1 and later. Low-level control in fixed-function modes can utilize OpenMAX IL interfaces, as implemented in select AMD media pipelines for precise component integration. Several applications natively support VCE for encoding tasks on Windows. added AMD AMF-based VCE encoding for H.264 in version 0.16.2 (2016), with ongoing updates for streaming and recording. XSplit Broadcaster has included VCE since version 1.3, with enhancements in version 4.5 (2025) for HEVC and multi-GPU selection. integrated VCE support starting in version 1.2.0 (2018), configurable via preferences for H.264 and HEVC encoding. AMD Radeon Software (part of Adrenalin Edition) enables real-time VCE encoding for video capture and streaming directly within its interface. MediaShow Espresso utilizes VCE for accelerated video conversion, as optimized in version 6.5 for output to mobile devices. VCE provides full compatibility for H.264 and HEVC encoding on and later, with driver updates maintaining support for legacy VCE hardware through at least 2020 releases like Adrenalin Edition 20.11.2 and continuing in 2025 drivers for supported operating systems. This ensures broad usability across GPUs from the Southern Islands to families, though newer VCN engines have largely superseded VCE in post-2017 hardware.

Linux

Support for the Video Coding Engine (VCE) on is primarily enabled through the open-source AMDGPU kernel module, which has included VCE loading and since its expansion in 2016. The module interfaces with VCE for video encoding tasks, requiring users to install the appropriate from the repository to enable functionality on compatible AMD GPUs and . VA- (Video Acceleration API) acts as the standard interface for hardware-accelerated encoding, allowing applications to offload H.264 and HEVC encoding to VCE without proprietary dependencies. The libva library provides the core API for integrating VA-API into applications, facilitating direct access to VCE capabilities for encoding workflows. FFmpeg, a widely used framework, incorporates a VA-API backend that leverages VCE for efficient command-line video encoding, supporting rate control modes and profile configurations compatible with hardware. Several open-source applications have adopted VCE via VA-API for encoding tasks. enables hardware-accelerated streaming and recording through VA-API, reducing CPU load during live production. utilizes VCE for batch video conversion, with support integrated into its Linux builds for faster on GPUs. offers VA-API-based encoding and playback, allowing users to export videos directly using VCE acceleration. This functionality is upstreamed within the Mesa graphics library, particularly through its Gallium3D drivers, ensuring broad compatibility across distributions. VCE compatibility on has evolved with kernel versions: H.264 encoding became available starting with kernel 4.7, coinciding with enhanced AMDGPU support for Polaris-era hardware. HEVC encoding followed in kernel 4.15, extending to GPUs with improved handling. Advanced HEVC profiles in VCE 3.x were stabilized by 2019 through Mesa updates and kernel patches, while community efforts and recent 2025 updates continue to maintain support for legacy GCN-based hardware.

Successor

Video Core Next (VCN)

Video Core Next (VCN) was announced in 2017 as part of AMD's Raven Ridge APUs and first released with their desktop variants in January 2018. This hardware block unifies the previously separate Video Coding Engine (VCE) for video encoding and Unified Video Decoder (UVD) for video decoding into a single, integrated unit, streamlining video acceleration within AMD's graphics processors. By merging these functions, VCN enables more efficient resource allocation and improved power efficiency for multimedia tasks in both GPUs and APUs. At its core, VCN provides symmetric encoding and decoding capabilities for key video codecs such as H.264/AVC and HEVC/H.265, with decoding support for VP9, ensuring balanced performance without the asymmetric bottlenecks seen in prior designs separating encoding and decoding. Support for AV1 decoding was introduced starting with VCN 3.0 in 2020 (RDNA 2 architecture), while VCN 4.0 in 2022 (RDNA 3, RX 7000 series) added AV1 encoding up to 8K resolutions, and VCN 5.0 in 2024 (RDNA 4) brought further efficiency improvements for high-resolution workflows as of 2025. This design emphasizes hardware-accelerated processing for mainstream video workflows, with features like HEVC Main10 (10-bit) decoding available from the outset to handle HDR content effectively. The initial VCN 1.0 iteration debuted in the 2018 Raven Ridge , offering HEVC Main10 decoding up to 4K at 60 fps alongside 4K encoding at 30 fps for 8-bit HEVC. VCN followed in 2019 with the Navi 10-based Radeon RX 5000 series GPUs, retaining the primary support of VCN 1.0 but with refinements in encoding quality and overall performance efficiency. These early versions laid the foundation for VCN's evolution, focusing on reliable support for 4K video standards. Since its debut, VCN has been adopted as the standard video engine across all AMD GPUs and APUs produced after 2017, including those utilizing the RDNA graphics architectures in subsequent Radeon and Ryzen product lines. This widespread integration has made VCN a cornerstone for AMD's multimedia ecosystem, powering applications from video streaming to content encoding in consumer and professional environments.

Transition from VCE

The transition from the Video Coding Engine (VCE) to (VCN) was primarily motivated by the need to unify AMD's previously separate hardware blocks for video decoding (, or UVD) and encoding (VCE) into a single, more integrated core. This unification streamlined hardware design, reducing overall die area and power consumption while enabling more efficient symmetric support for modern codecs such as HEVC and later , where encoding and decoding operations benefit from shared architecture. Additionally, VCN provided better future-proofing for demanding applications like 8K video processing and AI-enhanced encoding workflows, which require optimized for both directions of codec handling. VCN's rollout commenced with pre-announcements in October 2017 alongside the Raven Ridge , with the first products shipping in January 2018 and achieving full replacement of VCE in consumer by that year. Discrete GPUs followed suit later, adopting VCN starting with in the Navi-based released in July 2019. Post-transition, legacy VCE hardware in older GPUs—such as those based on and architectures—continued to receive firmware maintenance through the open-source AMDGPU driver stack, with driver support extending until approximately 2023 to ensure compatibility for existing systems. Key improvements in VCN included higher encoding efficiency and reduced power consumption for HEVC compared to VCE in equivalent workloads, alongside continued hardware decode support for formats like VP9. Backward compatibility for VCE-dependent applications was preserved via emulation layers in drivers, allowing software to leverage VCN hardware transparently where feasible. In open-source ecosystems, while development efforts have shifted toward VCN-exclusive features, legacy VCE modes remain available for older hardware in tools like FFmpeg.

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