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DisplayPort
View on WikipediaThis article may be too technical for most readers to understand. (March 2024) |
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DisplayPort connector | |||
| Type | Digital video/audio/data connector | ||
|---|---|---|---|
| Production history | |||
| Designer | VESA | ||
| Designed | May 2006 | ||
| Manufacturer | Various | ||
| Produced | 2008–present | ||
| Superseded | DVI, VGA | ||
| Open standard? | No | ||
| General specifications | |||
| Length | Various | ||
| Hot pluggable | Yes | ||
| External | Yes | ||
| Pins | 20 | ||
| Data | |||
| Data signal | Yes | ||
| Bitrate |
| ||
| Protocol | Micro-packet | ||
| Pinout | |||
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| Pinout as looking at source side connector | |||
| Pin 1 | Main link lane 0 (+) | ||
| Pin 2 | Ground | ||
| Pin 3 | Main link lane 0 (−) | ||
| Pin 4 | Main link lane 1 (+) | ||
| Pin 5 | Ground | ||
| Pin 6 | Main link lane 1 (−) | ||
| Pin 7 | Main link lane 2 (+) | ||
| Pin 8 | Ground | ||
| Pin 9 | Main link lane 2 (−) | ||
| Pin 10 | Main link lane 3 (+) | ||
| Pin 11 | Ground | ||
| Pin 12 | Main link lane 3 (−) | ||
| Pin 13 | Cable adaptor detect | ||
| Pin 14 | Consumer Electronics Control | ||
| Pin 15 | Auxiliary channel (+) | ||
| Pin 16 | Ground | ||
| Pin 17 | Auxiliary channel (−) | ||
| Pin 18 | Hot plug detect | ||
| Pin 19 | Return for power | ||
| Pin 20 | Power (3.3 V 500 mA) | ||
| This is the pinout on the source side. On the sink side (usually a display), the order is flipped: lane 3 connects to pins 1 (-) and 3 (+), while lane 0 connects to pins 10 (-) and 12 (+). | |||
DisplayPort (DP) is a digital interface used to connect a video source, such as a computer, to a display device like a monitor. Developed by the Video Electronics Standards Association (VESA), it can also carry digital audio, USB, and other types of data over a single cable.[1][2]
Introduced in the 2000s, DisplayPort was designed to replace older standards like VGA, DVI, and FPD-Link. While not directly compatible with these formats, adapters are available for connecting to HDMI, DVI, VGA, and other interfaces.[3]
Unlike older interfaces, DisplayPort uses packet-based transmission, similar to how data is sent over USB or Ethernet. The design enables support for high resolutions and adding new features without changing the connector.[4][5]
DisplayPort includes an auxiliary data channel used for device control and automatic configuration between source and display devices. It supports standards such as Display Data Channel (DDC), Extended Display Identification Data (EDID), Monitor Control Command Set (MCCS), and VESA Display Power Management Signaling (DPMS). Some implementations also support Consumer Electronics Control (CEC), which allows devices to send commands to each other and be operated using a single remote control.
Versions
[edit]1.0 to 1.1
[edit]The first version, 1.0, was approved by VESA on 3 May 2006.[6] Version 1.1 was ratified on 2 April 2007,[7] and version 1.1a on 11 January 2008.[8]
DisplayPort 1.0–1.1a allow a maximum bandwidth of 10.8 Gbit/s (8.64 Gbit/s data rate) over a standard 4-lane main link. DisplayPort cables up to 2 meters in length are required to support the full 10.8 Gbit/s bandwidth.[8] DisplayPort 1.1 allows devices to implement alternative link layers such as fiber optic, allowing a much longer reach between source and display without signal degradation,[9] although alternative implementations are not standardized. It also includes HDCP in addition to DisplayPort Content Protection (DPCP). The DisplayPort 1.1a standard can be downloaded free of charge from the VESA website.[10][failed verification]
1.2
[edit]DisplayPort version 1.2 was introduced on 7 January 2010.[11] The most significant improvement of this version is the doubling of the data rate to 17.28 Gbit/s in High Bit Rate 2 (HBR2) mode, which allows increased resolutions, higher refresh rates, and greater color depth, such as 3840 × 2160 at 60 Hz 10 bpc RGB. Other improvements include multiple independent video streams (daisy-chain connection with multiple monitors) called Multi-Stream Transport (MST), facilities for stereoscopic 3D, increased AUX channel bandwidth (from 1 Mbit/s to 720 Mbit/s), more color spaces including xvYCC, scRGB, and Adobe RGB 1998, and Global Time Code (GTC) for sub 1 μs audio/video synchronisation. Also Apple Inc.'s Mini DisplayPort connector, which is much smaller and designed for laptop computers and other small devices, is compatible with the new standard.[1][12][13][14]
1.2a
[edit]DisplayPort version 1.2a was released in January 2013[15] and may optionally include VESA's Adaptive Sync.[16] AMD's FreeSync uses the DisplayPort Adaptive-Sync feature for operation. FreeSync was first demonstrated at CES 2014 on a Toshiba Satellite laptop by making use of the Panel-Self-Refresh (PSR) feature from the Embedded DisplayPort standard,[17] and after a proposal from AMD, VESA later adapted the Panel-Self-Refresh feature for use in standalone displays and added it as an optional feature of the main DisplayPort standard under the name "Adaptive-Sync" in version 1.2a.[18] As it is an optional feature, support for Adaptive-Sync is not required for a display to be DisplayPort 1.2a-compliant.
1.3
[edit]DisplayPort version 1.3 was approved on 15 September 2014.[19] This standard increases overall transmission bandwidth to 32.4 Gbit/s with the new HBR3 mode featuring 8.1 Gbit/s per lane (up from 5.4 Gbit/s with HBR2 in version 1.2), for a total data throughput of 25.92 Gbit/s after factoring in 8b/10b encoding overhead. This bandwidth is enough for a 4K UHD display (3840 × 2160) at 120 Hz with 24 bit/px RGB color, a 5K display (5120 × 2880) at 60 Hz with 30 bit/px RGB color, or an 8K UHD display (7680 × 4320) at 30 Hz with 24 bit/px RGB color. Using Multi-Stream Transport (MST), a DisplayPort port can drive two 4K UHD (3840 × 2160) displays at 60 Hz, or up to four WQXGA (2560 × 1600) displays at 60 Hz with 24 bit/px RGB color. The new standard includes mandatory Dual-mode for DVI and HDMI adapters, implementing the HDMI 2.0 standard and HDCP 2.2 content protection.[20] The Thunderbolt 3 connection standard was originally to include DisplayPort 1.3 capability, but the final release ended up with only version 1.2 for Intel 6000 Series Thunderbolt 3 Controllers. Later Intel 7000 Series Thunderbolt 3 controllers support DisplayPort 1.4 capability including HDR. The VESA's Adaptive Sync feature in DisplayPort version 1.3 remains an optional part of the specification.[21]
1.4
[edit]DisplayPort version 1.4 was published 1 March 2016.[22] No new transmission modes are defined, so HBR3 (32.4 Gbit/s) as introduced in version 1.3 still remains as the highest available mode. DisplayPort 1.4 adds support for Display Stream Compression 1.2 (DSC), Forward Error Correction, HDR10 metadata defined in CTA-861.3, including static and dynamic metadata and the Rec. 2020 color space, for HDMI interoperability,[23] and extends the maximum number of inline audio channels to 32.[24]
1.4a
[edit]DisplayPort version 1.4a was published in April 2018.[25] VESA made no official press release for this version. It updated DisplayPort's Display Stream Compression implementation from DSC 1.2 to 1.2a.[26]
2.0
[edit]On 26 June 2019, VESA formally released the DisplayPort 2.0 standard.[27] VESA stated that version 2.0 is the first major update to the DisplayPort standard since March 2016, and provides up to a ≈3× improvement in data rate (from 25.92 to 77.37 Gbit/s) compared to the previous version of DisplayPort (1.4a), as well as new capabilities to address the future performance requirements of traditional displays. These include beyond 8K resolutions, higher refresh rates and high dynamic range (HDR) support at higher resolutions, improved support for multiple display configurations, as well as improved user experience with augmented/virtual reality (AR/VR) displays, including support for 4K-and-beyond VR resolutions.
According to a roadmap published by VESA in September 2016, a new version of DisplayPort was intended to be launched in "early 2017". It would have improved the link rate from 8.1 to 10.0 Gbit/s, a 23% increase.[28][29] This would have increased the total bandwidth from 32.4 Gbit/s to 40.0 Gbit/s. However, no new version was released in 2017, likely delayed to make further improvements after the HDMI Forum announced in January 2017 that their next standard (HDMI 2.1) would offer up to 48 Gbit/s of bandwidth. According to a press release on 3 January 2018, "VESA is also currently engaged with its members in the development of the next DisplayPort standard generation, with plans to increase the data rate enabled by DisplayPort by two-fold and beyond. VESA plans to publish this update within the next 18 months."[30] At CES 2019, VESA announced that the new version would support 8K @ 60 Hz without compression and was expected to be released in the first half of 2019.[31]
DP 2.0 configuration examples
[edit]With the increased bandwidth enabled by DisplayPort 2.0, VESA offers a high degree of versatility and configurations for higher display resolutions and refresh rates. In addition to the above-mentioned 8K resolution at 60 Hz with HDR support, DP 2.0 (UHBR20) through USB-C as DisplayPort Alt Mode enables a variety of high-performance configurations:[32]
- Single display resolutions
- One 16K (15360 × 8640) display @ 60 Hz with 10 bpc (30 bit/px, HDR) RGB/Y′CBCR 4:4:4 color (with DSC)
- One 10K (10240 × 4320) display @ 60 Hz and 8 bpc (24 bit/px, SDR) RGB/Y′CBCR 4:4:4 color (uncompressed)
- Dual display resolutions
- Two 8K (7680 × 4320) displays @ 120 Hz and 10 bpc (30 bit/px, HDR) RGB/Y′CBCR 4:4:4 color (with DSC)
- Two 4K (3840 × 2160) displays @ 144 Hz and 8 bpc (24 bit/px, SDR) RGB/Y′CBCR 4:4:4 color (uncompressed)
- Triple display resolutions
- Three 10K (10240 × 4320) displays @ 60 Hz and 10 bpc (30 bit/px, HDR) RGB/Y′CBCR 4:4:4 color (with DSC)
- Three 4K (3840 × 2160) displays @ 90 Hz and 10 bpc (30 bit/px, HDR) RGB/Y′CBCR 4:4:4 color (uncompressed)
When using only two lanes on the USB-C connector via DP Alt Mode to allow for simultaneous SuperSpeed USB data and video, DP 2.0 can enable such configurations as:
- Three 4K (3840 × 2160) displays @ 144 Hz and 10 bpc (30 bit/px, HDR) RGB/Y′CBCR 4:4:4 color (with DSC)
- Two 4K × 4K (4096 × 4096) displays (for AR/VR headsets) @ 120 Hz and 10 bpc (30 bit/px, HDR) RGB/Y′CBCR 4:4:4 color (with DSC)
- Three QHD (2560 × 1440) @ 120 Hz and 8 bpc (24 bit/px, SDR) RGB/Y′CBCR 4:4:4 color (uncompressed)
- One 8K (7680 × 4320) display @ 30 Hz and 10 bpc (30 bit/px, HDR) RGB/Y′CBCR 4:4:4 color (uncompressed)
2.1
[edit]VESA announced version 2.1 of the DisplayPort standard on 17 October 2022.[33] This version incorporates the new DP40 and DP80 cable certifications, which test DisplayPort cables for proper operation at the UHBR10 (40 Gbit/s) and UHBR20 (80 Gbit/s) speeds introduced in version 2.0. Additionally, it revises some of the electrical requirements for DisplayPort devices in order to improve integration with USB4. In VESA's words:
DisplayPort 2.1 has tightened its alignment with the USB Type-C specification as well as the USB4 PHY specification to facilitate a common PHY servicing both DisplayPort and USB4. In addition, DisplayPort 2.1 has added a new DisplayPort bandwidth management feature to enable DisplayPort tunnelling to coexist with other data traffic more efficiently over the USB4 link.
2.1a
[edit]VESA announced version 2.1a of the DisplayPort standard on 8 January 2024.[34] This version replaces the DP40 cable certification with the new DP54 certification, which tests DisplayPort cables for proper operation at the UHBR13.5 (54 Gbit/s) speed introduced in version 2.0.
2.1b
[edit]VESA announced version 2.1b of the DisplayPort standard on 6 January 2025. It has been released in Spring 2025.[35]
Specifications
[edit]Main
[edit]| DisplayPort version | |||||
|---|---|---|---|---|---|
| 1.0–1.1a | 1.2–1.2a | 1.3 | 1.4–1.4a | 2.0–2.1a | |
| Release date | May 2006 (1.0)[36] Mar 2007 (1.1)[37] Jan 2008 (1.1a)[8] |
Jan 2010 (1.2)[11] May 2012 (1.2a)[37] |
Sep 2014[19] | Mar 2016 (1.4)[22] Apr 2018 (1.4a)[25] |
Jun 2019 (2.0)[27] Oct 2022 (2.1)[33] Jan 2024 (2.1a)[34] |
| Main link | |||||
| Transmission modes: | |||||
| RBR (1.62 Gbit/s per lane) | Yes[38]: §1.6.1 | Yes | Yes | Yes | Yes |
| HBR (2.70 Gbit/s per lane) | Yes[38]: §1.6.1 | Yes | Yes | Yes | Yes |
| HBR2 (5.40 Gbit/s per lane) | No | Yes[39]: §2.1.1 | Yes | Yes | Yes |
| HBR3 (8.10 Gbit/s per lane) | No | No | Yes[19] | Yes | Yes |
| UHBR 10 (10.0 Gbit/s per lane) | No | No | No | No | Yes |
| UHBR 13.5 (13.5 Gbit/s per lane) | No | No | No | No | Yes |
| UHBR 20 (20.0 Gbit/s per lane) | No | No | No | No | Yes |
| Number of lanes | [8]: §1.7.1 4 | 4 | 4 | 4 | 4 |
| Maximum total bandwidth[a] | 10.80 Gbit/s | 21.60 Gbit/s | 32.40 Gbit/s | 32.40 Gbit/s | 80.00 Gbit/s |
| Maximum total data rate[b] | 8.64 Gbit/s |
17.28 Gbit/s | 25.92 Gbit/s | 25.92 Gbit/s | 77.37 Gbit/s |
| Encoding scheme[c] | [8]: §1.7.1 8b/10b | 8b/10b | 8b/10b | 8b/10b | 128b/132b |
| Compression (optional) | – | – | – | DSC 1.2 (DP 1.4) DSC 1.2a (DP 1.4a) |
DSC 1.2a |
| Auxiliary channel | |||||
| Maximum bandwidth | [8]: Fig. 3-3 2 Mbit/s | [39]: §3.4 720 Mbit/s | 2 Mbit/s | 2 Mbit/s | 2 Mbit/s |
| Maximum data rate | [8]: §3.4 1 Mbit/s | [39]: §3.4 576 Mbit/s | 1 Mbit/s | 1 Mbit/s | 1 Mbit/s |
| Encoding scheme | [8]: §1.7.2 Manchester II | [39]: §3.4 8b/10b | Manchester II | Manchester II | Manchester II |
| Color format support | |||||
| RGB | Yes[38]: §1.6.1 | Yes | Yes | Yes | Yes |
| Y′CBCR 4:4:4 | Yes[38]: §1.6.1 | Yes | Yes | Yes | Yes |
| Y′CBCR 4:2:2 | Yes[38]: §1.6.1 | Yes | Yes | Yes | Yes |
| Y′CBCR 4:2:0 | No | No | Yes | Yes | Yes |
| Y-only (monochrome) | No | Yes[39]: §2.2.4.3 | Yes | Yes | Yes |
| Color depth support | |||||
| 6 bpc (18 bit/px) | Yes[38]: §1.6.1 | Yes | Yes | Yes | Yes |
| 8 bpc (24 bit/px) | Yes[38]: §1.6.1 | Yes | Yes | Yes | Yes |
| 10 bpc (30 bit/px) | Yes[38]: §1.6.1 | Yes | Yes | Yes | Yes |
| 12 bpc (36 bit/px) | Yes[38]: §1.6.1 | Yes | Yes | Yes | Yes |
| 16 bpc (48 bit/px) | Yes[38]: §1.6.1 | Yes | Yes | Yes | Yes |
| Color space support | |||||
| ITU-R BT.601 | Yes[8]: §2.2.4 | Yes | Yes | Yes | Yes |
| ITU-R BT.709 | Yes[8]: §2.2.4 | Yes | Yes | Yes | Yes |
| sRGB | No[d] | Yes[39]: §2.2.4.3 | Yes | Yes | Yes |
| scRGB | No | Yes[39]: §2.2.4.3 | Yes | Yes | Yes |
| xvYCC | No | Yes[39]: §2.2.4.3 | Yes | Yes | Yes |
| Adobe RGB (1998) | No | Yes[39]: §2.2.4.3 | Yes | Yes | Yes |
| DCI-P3 | No | Yes[39]: §2.2.4.3 | Yes | Yes | Yes |
| Simplified color profile | No | Yes[39]: §2.2.4.3 | Yes | Yes | Yes |
| ITU-R BT.2020 | No | No | Yes[40]: 4 | Yes | Yes |
| Audio specifications | |||||
| Max. sample rate | [8]: §1.2.5 192 kHz | [39]: §2.2.5.3 768 kHz | 768 kHz | [22] 1536 kHz | ? |
| Max. sample size | [8]: §1.2.5 24 bits | 24 bits | 24 bits | 24 bits | ? |
| Maximum audio channels | [8]: §1.2.5 8 | 8 | 8 | 32 | ? |
| 1.0–1.1a | 1.2–1.2a | 1.3 | 1.4–1.4a | 2.0–2.1a | |
| DisplayPort version | |||||
- ^ Total bandwidth (the number of binary digits transmitted per second) is equal to the bandwidth per lane of the highest supported transmission mode multiplied by the number of lanes.
- ^ While the total bandwidth represents the number of physical bits transmitted across the interface, not all of the bits represent video data. Some of the transmitted bits are used for encoding purposes, so the rate at which video data can be transmitted across the DisplayPort interface is only a portion of the total bandwidth.
- ^ The 8b/10b encoding scheme uses 10 bits of bandwidth to send 8 bits of data, so only 80% of the bandwidth is available for data throughput. The extra 2 bits are used for DC balancing (ensuring a roughly equal number of 1s and 0s). They consume bandwidth, but do not represent any data.
- ^ In DisplayPort 1.0–1.1a, RGB images are simply sent without any specific colorimetry information
Main link
[edit]The DisplayPort main link is used for transmission of video and audio. The main link consists of a number of unidirectional serial data channels which operate concurrently, called lanes. A standard DisplayPort connection has 4 lanes, though some applications of DisplayPort implement more, such as the Thunderbolt 3 interface which implements up to 8 lanes of DisplayPort.[41]: 4
In a standard DisplayPort connection, each lane has a dedicated set of twisted-pair wires, and transmits data across it using differential signaling. This is a self-clocking system, so no dedicated clock signal channel is necessary.[8]: §1.7.1 Unlike DVI and HDMI, which vary their transmission speed to the exact rate required for the specific video format, DisplayPort only operates at a few specific speeds; any excess bits in the transmission are filled with "stuffing symbols".[8]: §2.2.1.4
In DisplayPort versions 1.0–1.4a, the data is encoded using ANSI 8b/10b encoding prior to transmission. With this scheme, only 8 out of every 10 transmitted bits represent data; the extra bits are used for DC balancing (ensuring a roughly equal number of 1s and 0s). As a result, the rate at which data can be transmitted is only 80% of the physical bitrate. The transmission speeds are also sometimes expressed in terms of the "Link Symbol Rate", which is the rate at which these 8b/10b-encoded symbols are transmitted (i.e. the rate at which groups of 10 bits are transmitted, 8 of which represent data). The following transmission modes are defined in version 1.0–1.4a:
- RBR (Reduced Bit Rate): 1.62 Gbit/s bandwidth per lane (162 MHz link symbol rate)
- HBR (High Bit Rate): 2.70 Gbit/s bandwidth per lane (270 MHz link symbol rate)
- HBR2 (High Bit Rate 2): 5.40 Gbit/s bandwidth per lane (540 MHz link symbol rate), introduced in DP 1.2
- HBR3 (High Bit Rate 3): 8.10 Gbit/s bandwidth per lane (810 MHz link symbol rate), introduced in DP 1.3
DisplayPort 2.0 uses 128b/132b encoding; each group of 132 transmitted bits represents 128 bits of data. This scheme has an efficiency of 96.96%.[42] In addition, a small amount of overhead is added for the link layer control packet and other miscellaneous operations, resulting in an overall efficiency of ≈96.7%.[43]: §3.5.2.18 The following transmission modes are added in DP 2.0:
- UHBR 10 (Ultra High Bit Rate 10): 10.0 Gbit/s bandwidth per lane
- UHBR 13.5 (Ultra High Bit Rate 13.5): 13.5 Gbit/s bandwidth per lane
- UHBR 20 (Ultra High Bit Rate 20): 20.0 Gbit/s bandwidth per lane
The total bandwidth of the main link in a standard 4-lane connection is the aggregate of all lanes:
- RBR: 4 × 1.62 Gbit/s = 6.48 Gbit/s bandwidth (data rate of 5.184 Gbit/s or 648 MB/s with 8b/10b encoding)
- HBR: 4 × 2.70 Gbit/s = 10.80 Gbit/s bandwidth (data rate of 8.64 Gbit/s or 1.08 GB/s)
- HBR2: 4 × 5.40 Gbit/s = 21.60 Gbit/s bandwidth (data rate of 17.28 Gbit/s or 2.16 GB/s)
- HBR3: 4 × 8.10 Gbit/s = 32.40 Gbit/s bandwidth (data rate of 25.92 Gbit/s or 3.24 GB/s)
- UHBR 10: 4 × 10.0 Gbit/s = 40.00 Gbit/s bandwidth (data rate of 38.69 Gbit/s or 4.84 GB/s with 128b/132b encoding and FEC)
- UHBR 13.5: 4 × 13.5 Gbit/s = 54.00 Gbit/s bandwidth (data rate of 52.22 Gbit/s or 6.52 GB/s)
- UHBR 20: 4 × 20.0 Gbit/s = 80.00 Gbit/s bandwidth (data rate of 77.37 Gbit/s or 9.69 GB/s)
The transmission mode used by the DisplayPort main link is negotiated by the source and sink device (the device accepting the signal) when a connection is made, through a process called Link Training. This process determines the maximum possible speed of the connection. If the quality of the DisplayPort cable is insufficient to reliably handle HBR2 speeds for example, the DisplayPort devices will detect this and switch down to a lower mode to maintain a stable connection.[8]: §2.1.1 The link can be re-negotiated at any time if a loss of synchronization is detected.[8]: §1.7.3
Audio data is transmitted across the main link during the video blanking intervals (short pauses between each line and frame of video data).[8]: §2.2.5.3
Auxiliary channel
[edit]The DisplayPort AUX channel is a half-duplex data channel used for miscellaneous additional data beyond video and audio, such as EDID (I2C) or CEC commands.[8]: §2.4 This bidirectional data channel is required, since the video lane signals are unidirectional (simplex) from source to display. AUX signals are transmitted across a dedicated set of twisted-pair wires. DisplayPort 1.0 specified Manchester encoding with a 2 MBd signal rate (1 Mbit/s data rate).[8]: §3.4 Version 1.2 of the DisplayPort standard introduced a second transmission mode called FAUX (Fast AUX), which operated at 720 Mbit/s with 8b/10b encoding (576 Mbit/s data rate),[39]: §3.4 but it was deprecated in version 1.3.
Cables and connectors
[edit]Cables
[edit]Compatibility and feature support
[edit]All DisplayPort cables are compatible with all DisplayPort devices, regardless of the version of each device or the cable certification level.[44]
All features of DisplayPort will function across any DisplayPort cable. DisplayPort does not have multiple cable designs; all DP cables have the same basic layout and wiring, and will support any feature including audio, daisy-chaining, G-Sync/FreeSync, HDR, and DSC.
DisplayPort cables differ in their transmission speed support. DisplayPort specifies seven different transmission modes (RBR, HBR, HBR2, HBR3, UHBR 10, UHBR 13.5, and UHBR 20) which support progressively higher bandwidths. Not all DisplayPort cables are capable of all seven transmission modes. VESA offers certifications for various levels of bandwidth. These certifications are optional, and not all DisplayPort cables are certified by VESA.
Cables with limited transmission speed are still compatible with all DisplayPort devices, but may place limits on the maximum resolution or refresh rate available.
DisplayPort cables are not classified by "version". Although cables are commonly labeled with version numbers, with HBR2 cables advertised as "DisplayPort 1.2 cables" for example, this notation is not permitted by VESA.[44] The use of version numbers with cables can falsely imply that a DisplayPort 1.4 display requires a "DisplayPort 1.4 cable", or that features introduced in version 1.4 such as HDR or DSC will not function with older "DP 1.2 cables". DisplayPort cables are classified only by their bandwidth certification level (RBR, HBR, HBR2, HBR3, etc.), if they have been certified at all.
Cable bandwidth and certifications
[edit]Not all DisplayPort cables are capable of functioning at the highest levels of bandwidth. Cables may be submitted to VESA for an optional certification at various bandwidth levels. VESA offers five levels of cable certification: Standard, DP8K, DP40, DP54, and DP80.[43]: §4.1 These certify DisplayPort cables for proper operation at the following speeds:
| Transmission mode | Transmission bit rate |
Minimum required cable certification |
|---|---|---|
| RBR (Reduced Bit Rate) | 6.48 Gbit/s | Standard VESA-certified DisplayPort cable |
| HBR (High Bit Rate) | 10.80 Gbit/s | |
| HBR2 (High Bit Rate 2) | 21.60 Gbit/s | |
| HBR3 (High Bit Rate 3) | 32.40 Gbit/s | DP8K DisplayPort cable |
| UHBR10 (Ultra High Bit Rate 10) | 40.00 Gbit/s | DP40 cable |
| UHBR13.5 (Ultra High Bit Rate 13.5) | 54.00 Gbit/s | DP54 cable |
| UHBR20 (Ultra High Bit Rate 20) | 80.00 Gbit/s | DP80 cable |
In April 2013, VESA published an article stating that the DisplayPort cable certification did not have distinct tiers for HBR and HBR2 bandwidth, and that any certified standard DisplayPort cable—including those certified under DisplayPort 1.1—would be able to handle the 21.6 Gbit/s bandwidth of HBR2 that was introduced with the DisplayPort 1.2 standard.[44] The DisplayPort 1.2 standard defines only a single specification for High Bit Rate cable assemblies, which is used for both HBR and HBR2 speeds, although the DP cable certification process is governed by the DisplayPort PHY Compliance Test Standard (CTS) and not the DisplayPort standard itself.[39]: §5.7.1, §4.1
The DP8K certification was announced by VESA in January 2018, and certifies cables for proper operation at HBR3 speeds (8.1 Gbit/s per lane, 32.4 Gbit/s total).[45]
In June 2019, with the release of version 2.0 of the DisplayPort Standard, VESA announced that the DP8K certification was also sufficient for the new UHBR10 transmission mode. No new certifications were announced for the UHBR13.5 and UHBR20 modes. VESA is encouraging displays to use tethered cables for these speeds, rather than releasing standalone cables onto the market.[42]
It should also be noted that the use of Display Stream Compression (DSC), introduced in DisplayPort 1.4, greatly reduces the bandwidth requirements for the cable. Formats which would normally be beyond the limits of DisplayPort 1.4, such as 4K (3840 × 2160) at 144 Hz 8 bpc RGB/Y′CBCR 4:4:4 (31.4 Gbit/s data rate when uncompressed), can only be implemented by using DSC. This would reduce the physical bandwidth requirements by 2–3×, placing it well within the capabilities of an HBR2-rated cable.
This exemplifies why DisplayPort cables are not classified by "version"; although DSC was introduced in version 1.4, this does not mean it needs a so-called "DP 1.4 cable" (an HBR3-rated cable) to function. HBR3 cables are only required for applications which exceed HBR2-level bandwidth, not simply any application involving DisplayPort 1.4. If DSC is used to reduce the bandwidth requirements to HBR2 levels, then an HBR2-rated cable will be sufficient.
In version 2.1, VESA introduced the DP40 and DP80 cable certification tiers, which validate cables for UHBR10 and UHBR20 speeds respectively. DisplayPort 2.1a introduced DP54 cable certification for UHBR13.5 speed.
Cable length
[edit]The DisplayPort standard does not specify any maximum length for cables, though the DisplayPort 1.2 standard does set a minimum requirement that all cables up to 2 meters in length must support HBR2 speeds (21.6 Gbit/s), and all cables of any length must support RBR speeds (6.48 Gbit/s).[39]: §5.7.1, §4.1 Cables longer than 2 meters may or may not support HBR/HBR2 speeds, and cables of any length may or may not support HBR3 speeds or above.
Connectors and pin configuration
[edit]
DisplayPort cables and ports may have either a "full-size" connector or a "mini" connector. These connectors differ only in physical shape—the capabilities of DisplayPort are the same regardless of which connector is used. Using a Mini DisplayPort connector does not affect performance or feature support of the connection.
Full-size DisplayPort connector
[edit]The standard DisplayPort connector (now referred to as a "full-size" connector to distinguish it from the mini connector)[39]: §4.1.1 was the sole connector type introduced in DisplayPort 1.0. It is a 20-pin single-orientation connector with a friction lock and an optional mechanical latch. The standard DisplayPort receptacle has dimensions of 16.10 mm (width) × 4.76 mm (height) × 8.88 mm (depth).[8]: §4.2.1.7, p201
The standard DisplayPort connector pin allocation is as follows:[8]: §4.2.1
- 12 pins for the main link – the main link consists of four shielded twisted pairs. Each pair requires 3 pins; one for each of the two wires, and a third for the shield.[8]: §4.1.2, p183 (pins 1–12)
- 2 additional ground pins – (pins 13 and 14)
- 3 pins for the auxiliary channel – the auxiliary channel uses another 3-pin shielded twisted pair (pins 15–17)
- 1 pin for HPD – hot-plug detection (pin 18)
- 2 pins for power – 3.3 V power and return line (pins 19 and 20)
Mini DisplayPort connector
[edit]
The Mini DisplayPort connector was developed by Apple for use in their computer products. It was first announced in October 2008 for use in the new MacBooks and Cinema Display. In 2009, VESA adopted it as an official standard, and in 2010 the specification was merged into the main DisplayPort standard with the release of DisplayPort 1.2. Apple freely licenses the specification to VESA.
The Mini DisplayPort (mDP) connector is a 20-pin single-orientation connector with a friction lock. Unlike the full-size connector, it does not have an option for a mechanical latch. The mDP receptacle has dimensions of 7.50 mm (width) × 4.60 mm (height) × 4.99 mm (depth).[46]: §2.1.3.6, pp27–31 The mDP pin assignments are the same as the full-size DisplayPort connector.[46]: §2.1.3
DP_PWR (pin 20)
[edit]Pin 20 on the DisplayPort connector, called DP_PWR, provides 3.3 V (±10%) DC power at up to 500 mA (minimum power delivery of 1.5 W).[8]: §3.2 This power is available from all DisplayPort receptacles, on both source and display devices. DP_PWR is intended to provide power for adapters, amplified cables, and similar devices, so that a separate power cable is not necessary.
Standard DisplayPort cable connections do not use the DP_PWR pin. Connecting the DP_PWR pins of two devices directly together through a cable can create a short circuit which can potentially damage devices, since the DP_PWR pins on two devices are unlikely to have exactly the same voltage (especially with a ±10% tolerance).[47] For this reason, the DisplayPort 1.1 and later standards specify that passive DisplayPort-to-DisplayPort cables must leave pin 20 unconnected.[8]: §3.2.2
However, in 2013 VESA announced that after investigating reports of malfunctioning DisplayPort devices, it had discovered that a large number of non-certified vendors were manufacturing their DisplayPort cables with the DP_PWR pin connected:
Recently VESA has experienced quite a few complaints regarding troublesome DisplayPort operation that ended up being caused by improperly made DisplayPort cables. These "bad" DisplayPort cables are generally limited to non-DisplayPort certified cables, or off-brand cables. To further investigate this trend in the DisplayPort cable market, VESA purchased a number of non-certified, off-brand cables and found that an alarmingly high number of these were configured improperly and would likely not support all system configurations. None of these cables would have passed the DisplayPort certification test, moreover some of these cables could potentially damage a PC, laptop, or monitor.
The stipulation that the DP_PWR wire be omitted from standard DisplayPort cables was not present in the DisplayPort 1.0 standard. However, DisplayPort products (and cables) did not begin to appear on the market until 2008, long after version 1.0 had been replaced by version 1.1. The DisplayPort 1.0 standard was never implemented in commercial products.[48]
Resolution and refresh frequency limits
[edit]The tables below describe the refresh frequencies that can be achieved with each transmission mode. In general, maximum refresh frequency is determined by the transmission mode (RBR, HBR, HBR2, HBR3, UHBR10, UHBR13.5, or UHBR20). These transmission modes were introduced to the DisplayPort standard as follows:
- RBR and HBR were defined in the initial release of the DisplayPort standard, version 1.0
- HBR2 was introduced in version 1.2
- HBR3 was introduced in version 1.3
- UHBR10, UHBR13.5, and UHBR20 were introduced in version 2.0
However, transmission mode support is not necessarily dictated by a device's claimed "DisplayPort version number". For example, older versions of the DisplayPort Marketing Guidelines allowed a device to be labeled as "DisplayPort 1.2" if it supported the MST feature, even if it didn't support the HBR2 transmission mode.[49]: 9 Newer versions of the guidelines have removed this clause, and currently (as of the June 2018 revision) there are no guidelines on the usage of DisplayPort version numbers in products.[50] DisplayPort "version numbers" are therefore not a reliable indication of what transmission speeds a device can support.
In addition, individual devices may have their own arbitrary limitations beyond transmission speed. For example, NVIDIA Kepler GK104 GPUs (such as the GeForce GTX 680 and 770) support "DisplayPort 1.2" with the HBR2 transmission mode, but are limited to 540 Mpx/s, only 3⁄4 of the maximum possible with HBR2.[51] Consequently, certain devices may have limitations that differ from those listed in the following tables.
To support a particular format, the source and display devices must both support the required transmission mode, and the DisplayPort cable must also be capable of handling the required bandwidth of that transmission mode. (See: Cables and connectors)
Refresh frequency limits for common resolutions
[edit]The maximum limits for the RBR and HBR modes are calculated using standard data rate calculations.[52] For UHBR modes, the limits are based on the data efficiency calculations provided by the DisplayPort standard.[53]: §3.5.2.18 All calculations assume uncompressed RGB video with CVT-RB v2 timing. Maximum limits may differ if compression (i.e. DSC) or Y′CBCR 4:2:2 or 4:2:0 chroma subsampling are used.
Display manufacturers may also use non-standard blanking intervals rather than CVT-RB v2 to achieve even higher frequencies when bandwidth is a constraint. The refresh frequencies in the below table do not represent the absolute maximum limit of each interface, but rather an estimate based on a modern standardized timing formula. The minimum blanking intervals (and therefore the exact maximum frequency that can be achieved) will depend on the display and how many secondary data packets it requires, and therefore will differ from model to model.
| Video format | Transmission mode, and maximum data rate | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| Short- hand |
Resolution | Channel color depth (bits) |
RBR | HBR | HBR2 | HBR3 | UHBR10 | UHBR13.5 | UHBR20 |
| 5.184 Gbit/s | 8.64 Gbit/s | 17.28 Gbit/s | 25.92 Gbit/s | 38.68 Gbit/s | 52.22 Gbit/s | 77.37 Gbit/s | |||
| Maximum refresh frequency with CVT-RB v2 timing, uncompressed (Hz) | |||||||||
| 1080p | 1920 × 1080 | 8 | 95 | 154 | 288 | 406 | 555 | 688 | 884 |
| 10 | 77 | 125 | 237 | 337 | 468 | 587 | 770 | ||
| 1440p | 2560 × 1440 | 8 | 55 | 90 | 174 | 251 | 354 | 452 | 609 |
| 10 | 44 | 73 | 141 | 205 | 293 | 378 | 516 | ||
| UWQHD | 3440 × 1440 | 8 | 41 | 68 | 133 | 193 | 277 | 358 | 491 |
| 10 | 33 | 55 | 107 | 157 | 227 | 296 | 412 | ||
| 4K | 3840 × 2160 | 8 | 41 | 81 | 120 | 174 | 229 | 323 | |
| 10 | 33 | 65 | 97 | 142 | 187 | 267 | |||
| 5K | 5120 × 2880 | 8 | 47 | 69 | 102 | 136 | 195 | ||
| 10 | 37 | 56 | 82 | 110 | 159 | ||||
| 8K | 7680 × 4320 | 8 | 31 | 47 | 63 | 92 | |||
| 10 | 37 | 50 | 74 | ||||||
Refresh frequency limits for standard video
[edit]Color depth of 8 bpc (24 bit/px or 16.7 million colors) is assumed for all formats in these tables. This is the standard color depth used on most computer displays. Note that some operating systems refer to this as "32-bit" color depth—this is the same as 24-bit color depth. The 8 extra bits are for alpha channel information, which is only present in software. At the transmission stage, this information has already been incorporated into the primary color channels, so the actual video data transmitted across the cable only contains 24 bits per pixel.
| Video format | Transmission mode / maximum data rate[a] | |||||||||
|---|---|---|---|---|---|---|---|---|---|---|
| Shorthand | Resolution | Refresh rate (Hz) |
Data rate required[b] |
RBR | HBR | HBR2 | HBR3 | UHBR10 | UHBR13.5 | UHBR20 |
| 5.184 Gbit/s | 8.64 Gbit/s | 17.28 Gbit/s | 25.92 Gbit/s | 38.69 Gbit/s | 52.22 Gbit/s | 77.37 Gbit/s | ||||
| 1080p | 1920 × 1080 | 60 | 3.20 Gbit/s | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| 85 | 4.59 Gbit/s | Yes | Yes | Yes | Yes | Yes | Yes | Yes | ||
| 120 | 6.59 Gbit/s | DSC[c] | Yes | Yes | Yes | Yes | Yes | Yes | ||
| 144 | 8.00 Gbit/s | DSC | Yes | Yes | Yes | Yes | Yes | Yes | ||
| 240 | 14.00 Gbit/s | DSC | DSC | Yes | Yes | Yes | Yes | Yes | ||
| 1440p | 2560 × 1440 | 30 | 2.78 Gbit/s | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| 60 | 5.63 Gbit/s | DSC | Yes | Yes | Yes | Yes | Yes | Yes | ||
| 85 | 8.07 Gbit/s | DSC | Yes | Yes | Yes | Yes | Yes | Yes | ||
| 120 | 11.59 Gbit/s | DSC | DSC | Yes | Yes | Yes | Yes | Yes | ||
| 144 | 14.08 Gbit/s | DSC | DSC | Yes | Yes | Yes | Yes | Yes | ||
| 165 | 16.30 Gbit/s | 4:2:2 + DSC[d] | DSC | Yes | Yes | Yes | Yes | Yes | ||
| 240 | 24.62 Gbit/s | No | DSC | DSC | Yes | Yes | Yes | Yes | ||
| 4K | 3840 × 2160 | 24 | 4.93 Gbit/s | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| 30 | 6.18 Gbit/s | DSC | Yes | Yes | Yes | Yes | Yes | Yes | ||
| 60 | 12.54 Gbit/s | DSC | DSC | Yes | Yes | Yes | Yes | Yes | ||
| 75 | 15.79 Gbit/s | DSC | DSC | Yes | Yes | Yes | Yes | Yes | ||
| 120 | 25.82 Gbit/s | No | DSC | DSC | Yes | Yes | Yes | Yes | ||
| 144 | 31.35 Gbit/s | No | 4:2:0 + DSC[e] | DSC | DSC | Yes | Yes | Yes | ||
| 240 | 54.84 Gbit/s | No | No | 4:2:2 + DSC | DSC | DSC | Yes[f] | Yes | ||
| 5K | 5120 × 2880 | 24 | 8.73 Gbit/s | DSC | Yes[f] | Yes | Yes | Yes | Yes | Yes |
| 30 | 10.94 Gbit/s | DSC | DSC | Yes | Yes | Yes | Yes | Yes | ||
| 60 | 22.18 Gbit/s | No | DSC | DSC | Yes | Yes | Yes | Yes | ||
| 120 | 45.66 Gbit/s | No | No | DSC | DSC | DSC | Yes | Yes | ||
| 144 | 55.44 Gbit/s | No | No | 4:2:2 + DSC | DSC | DSC | DSC | Yes | ||
| 180 | 70.54 Gbit/s | No | No | No | DSC | DSC | DSC | Yes | ||
| 240 | 96.98 Gbit/s | No | No | No | 4:2:0 + DSC | DSC | DSC | DSC | ||
| 8K | 7680 × 4320 | 24 | 19.53 Gbit/s | 4:2:0 + DSC | DSC | DSC | Yes | Yes | Yes | Yes |
| 30 | 24.48 Gbit/s | No | DSC | DSC | Yes | Yes | Yes | Yes | ||
| 60 | 49.65 Gbit/s | No | No | DSC | DSC | DSC | Yes | Yes | ||
| 85 | 71.17 Gbit/s | No | No | No | DSC | DSC | DSC | Yes | ||
| 120 | 102.20 Gbit/s | No | No | No | No | DSC | DSC | DSC | ||
| 144 | 124.09 Gbit/s | No | No | No | No | 4:2:2 + DSC | DSC | DSC | ||
| 240 | 217.10 Gbit/s | No | No | No | No | No | No | DSC | ||
| RBR | HBR | HBR2 | HBR3 | UHBR10 | UHBR13.5 | UHBR20 | ||||
| Transmission mode | ||||||||||
- ^ Only a portion of DisplayPort's bandwidth is used for carrying video data. The RBR, HBR, HBR2, and HBR3 transmission modes use 8b/10b encoding, which means that 80% of the bits transmitted across the link represent data, and the other 20% are used for encoding purposes. The maximum bit rates of these modes (6.48, 10.8, 21.6, and 32.4 Gbit/s) therefore transport video data at rates of 5.184, 8.64, 17.28, and 25.92 Gbit/s respectively. DisplayPort UHBR modes use 128b/132b encoding with some small additional overhead, and therefore the maximum bit rates of UHBR10, 13.5, and 20 (40, 54, and 80 Gbit/s) transport data at rates of 38.69, 52.22, and 77.37 Gbit/s.
- ^ These data rates are for uncompressed 8 bpc (24 bit/px) color depth with RGB or YCBCR 4:4:4 color format and CVT-RB v2 timing. Uncompressed data rate for RGB video in bits per second is calculated as bits per pixel × pixels per frame × frames per second. Pixels per frame includes blanking intervals as defined by CVT-RB v2.
- ^ This format can only be achieved with full RGB color if DSC (display stream compression) is used.
- ^ Possible by using Y′CBCR with 4:2:2 subsampling and DSC together, which permits a lower DSC bit rate of 7 bit/px
- ^ Possible by using Y′CBCR with 4:2:0 subsampling and DSC together, which permits a lower DSC bit rate of 6 bit/px
- ^ a b Although this format slightly exceeds the maximum data rate of this transmission mode with CVT-RB v2 timing, it is close enough to be achieved with non-standard timings
Refresh frequency limits for HDR video
[edit]Color depth of 10 bpc (30 bit/px or 1.07 billion colors) is assumed for all formats in these tables. This color depth is a requirement for various common HDR standards, such as HDR10. It requires 25% more bandwidth than standard 8 bpc video.
HDR extensions were defined in version 1.4 of the DisplayPort standard. Some displays support these HDR extensions, but may only implement HBR2 transmission mode if the extra bandwidth of HBR3 is unnecessary (for example, on 4K 60 Hz HDR displays). Since there is no definition of what constitutes a "DisplayPort 1.4" device, some manufacturers may choose to label these as "DP 1.2" devices despite their support for DP 1.4 HDR extensions.[54] As a result, DisplayPort "version numbers" should not be used as an indicator of HDR support.
| Video format | Transmission mode, and maximum data rate[a] | |||||||||
|---|---|---|---|---|---|---|---|---|---|---|
| Shorthand | Resolution | Refresh rate (Hz) |
Data rate required[b] |
RBR | HBR | HBR2 | HBR3 | UHBR10 | UHBR13.5 | UHBR20 |
| 5.184 Gbit/s | 8.64 Gbit/s | 17.28 Gbit/s | 25.92 Gbit/s | 38.69 Gbit/s | 52.22 Gbit/s | 77.37 Gbit/s | ||||
| 1080p | 1920 × 1080 | 60 | 4.00 Gbit/s | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| 100 | 6.80 Gbit/s | DSC[c] | Yes | Yes | Yes | Yes | Yes | Yes | ||
| 120 | 8.24 Gbit/s | DSC | Yes | Yes | Yes | Yes | Yes | Yes | ||
| 144 | 10.00 Gbit/s | DSC | DSC | Yes | Yes | Yes | Yes | Yes | ||
| 240 | 17.50 Gbit/s | DSC | DSC | Yes[d] | Yes | Yes | Yes | Yes | ||
| 1440p | 2560 × 1440 | 30 | 3.47 Gbit/s | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| 60 | 7.04 Gbit/s | DSC | Yes | Yes | Yes | Yes | Yes | Yes | ||
| 75 | 8.86 Gbit/s | DSC | Yes[d] | Yes | Yes | Yes | Yes | Yes | ||
| 120 | 14.49 Gbit/s | DSC | DSC | Yes | Yes | Yes | Yes | Yes | ||
| 144 | 17.60 Gbit/s | DSC | DSC | Yes[d] | Yes | Yes | Yes | Yes | ||
| 200 | 25.12 Gbit/s | 4:2:0 + DSC[e] | DSC | DSC | Yes | Yes | Yes | Yes | ||
| 240 | 30.77 Gbit/s | No | DSC | DSC | DSC | Yes | Yes | Yes | ||
| 4K | 3840 × 2160 | 30 | 7.73 Gbit/s | DSC | Yes | Yes | Yes | Yes | Yes | Yes |
| 60 | 15.68 Gbit/s | DSC | DSC | Yes | Yes | Yes | Yes | Yes | ||
| 75 | 19.74 Gbit/s | 4:2:2 + DSC[e] | DSC | DSC | Yes | Yes | Yes | Yes | ||
| 98 | 26.07 Gbit/s | No | DSC | DSC | Yes[d] | Yes | Yes | Yes | ||
| 120 | 32.27 Gbit/s | No | 4:2:2 + DSC | DSC | DSC | Yes | Yes | Yes | ||
| 144 | 39.19 Gbit/s | No | 4:2:0 + DSC | DSC | DSC | Yes | Yes | Yes | ||
| 180 | 49.85 Gbit/s | No | No | DSC | DSC | DSC | Yes | Yes | ||
| 240 | 68.56 Gbit/s | No | No | 4:2:2 + DSC | DSC | DSC | DSC | Yes | ||
| 5K | 5120 × 2880 | 30 | 13.67 Gbit/s | DSC | DSC | Yes | Yes | Yes | Yes | Yes |
| 50 | 22.99 Gbit/s | 4:2:0 + DSC | DSC | DSC | Yes | Yes | Yes | Yes | ||
| 60 | 27.72 Gbit/s | No | DSC | DSC | DSC | Yes | Yes | Yes | ||
| 100 | 47.10 Gbit/s | No | No | DSC | DSC | DSC | Yes | Yes | ||
| 120 | 57.08 Gbit/s | No | No | DSC | DSC | DSC | DSC | Yes | ||
| 144 | 69.30 Gbit/s | No | No | 4:2:2 + DSC | DSC | DSC | DSC | Yes | ||
| 240 | 121.23 Gbit/s | No | No | No | 4:2:0 + DSC | DSC | DSC | DSC | ||
| 8K | 7680 × 4320 | 24 | 24.41 Gbit/s | 4:2:0 + DSC | DSC | DSC | Yes | Yes | Yes | Yes |
| 30 | 30.60 Gbit/s | No | DSC | DSC | DSC | Yes | Yes | Yes | ||
| 50 | 51.47 Gbit/s | No | No | DSC | DSC | DSC | Yes | Yes | ||
| 60 | 62.06 Gbit/s | No | No | DSC | DSC | DSC | DSC | Yes | ||
| 75 | 78.13 Gbit/s | No | No | 4:2:0 + DSC | DSC | DSC | DSC | Yes[d] | ||
| 120 | 127.75 Gbit/s | No | No | No | No | DSC | DSC | DSC | ||
| 144 | 155.11 Gbit/s | No | No | No | No | 4:2:2 + DSC | DSC | DSC | ||
| 240 | 271.37 Gbit/s | No | No | No | No | No | No | DSC | ||
| RBR | HBR | HBR2 | HBR3 | UHBR10 | UHBR13.5 | UHBR20 | ||||
| Transmission mode | ||||||||||
- ^ Only a portion of DisplayPort's bandwidth is used for carrying video data. The RBR, HBR, HBR2, and HBR3 transmission modes use 8b/10b encoding, which means that 80% of the bits transmitted across the link represent data, and the other 20% are used for encoding purposes. The maximum bit rates of these modes (6.48, 10.8, 21.6, and 32.4 Gbit/s) therefore transport video data at rates of 5.184, 8.64, 17.28, and 25.92 Gbit/s respectively. DisplayPort UHBR modes use 128b/132b encoding with some small additional overhead, and therefore the maximum bit rates of UHBR10, 13.5, and 20 (40, 54, and 80 Gbit/s) transport data at rates of 38.69, 52.22, and 77.37 Gbit/s.
- ^ These data rates are for uncompressed 10 bpc (30 bit/px) color depth with RGB or YCBCR 4:4:4 color format and CVT-RB v2 timing. Uncompressed data rate for RGB video in bits per second is calculated as bits per pixel × pixels per frame × frames per second. Pixels per frame includes blanking intervals as defined by CVT-RB v2.
- ^ This format can only be achieved with full RGB color if DSC (display stream compression) is used. A compression ratio of 3.75:1 (8 bit/px compression) is assumed here.
- ^ a b c d e Although this format slightly exceeds the maximum data rate of this transmission mode with CVT-RB v2 timing, it is close enough to be achieved with non-standard timings
- ^ a b This format can only be achieved if DSC and chroma subsampling are used together. The DisplayPort standard permits lower values for DSC output size when subsampling is used; 6 bit/px for 4:2:0 subsampling and 7 bit/px for 4:2:2 subsampling, compared to 8 bit/px for non-subsampled output (RGB and 4:4:4).
Features
[edit]| DisplayPort version | ||||||
|---|---|---|---|---|---|---|
| 1.0 | 1.1–1.1a | 1.2–1.2a | 1.3 | 1.4–1.4a | 2.0 | |
| Hot-pluggable | Yes | Yes | Yes | Yes | Yes | Yes |
| Inline audio | Yes | Yes | Yes | Yes | Yes | Yes |
| DisplayPort content protection (DPCP) |
DPCP 1.0[38]: §1.2.6 | DPCP 1.0 | DPCP 1.0 | DPCP 1.0 | DPCP 1.0 | DPCP 1.0 |
| High-bandwidth digital content protection (HDCP) |
No | HDCP 1.3[8]: §1.2.6 | HDCP 1.3[39]: §1.2.6 | HDCP 2.2[19] | HDCP 2.2 | HDCP 2.2 |
| Dual-mode (DP++) | No | Yes | Yes | Yes | Yes | Yes |
| Maximum DP++ bandwidth (TMDS Clock) |
— | 4.95 Gbit/s (165 MHz) |
9.00 Gbit/s (300 MHz) |
18.00 Gbit/s (600 MHz)[55]: 673 |
18.00 Gbit/s (600 MHz) |
18.00 Gbit/s (600 MHz) |
| Stereoscopic 3D video | No | Yes | Yes | Yes | Yes | Yes |
| Multi-stream transport (MST) | No | No | Yes | Yes | Yes | Yes |
| High-dynamic-range video (HDR) | No | No | No | No | Yes | Yes |
| Display stream compression (DSC) | No | No | No | No | DSC 1.2 (DP 1.4) DSC 1.2a (DP 1.4a) |
DSC 1.2a |
| Panel replay | No | No | No | No | No | Yes[42] |
DisplayPort Dual-Mode (DP++)
[edit]
| DisplayPort pins | DVI/HDMI mode |
|---|---|
| Main link lane 0 | TMDS channel 2 |
| Main link lane 1 | TMDS channel 1 |
| Main link lane 2 | TMDS channel 0 |
| Main link lane 3 | TMDS clock |
| AUX CH+ | DDC clock |
| AUX CH− | DDC data |
| DP_PWR | DP_PWR |
| Hot-plug detect | Hot-plug detect |
| Config 1 | Cable adapter detect |
| Config 2 | CEC (HDMI only) |
DisplayPort Dual-Mode (DP++), also called Dual-Mode DisplayPort, is a standard which allows DisplayPort sources to use simple passive adapters to connect to HDMI or DVI displays, and allows DisplayPort displays to use simple passive adapters to connect HDMI or DVI sources. Dual-mode is an optional feature, so not all DisplayPort sources necessarily support DVI/HDMI passive adapters, though in practice nearly all devices do.[56] Officially, the "DP++" logo should be used to indicate a DP port that supports dual-mode, but most modern devices do not use the logo.[57]
Devices which implement dual-mode will detect that a DVI or HDMI adapter is attached, and send DVI/HDMI TMDS signals instead of DisplayPort signals. The original DisplayPort Dual-Mode standard (version 1.0), used in DisplayPort 1.1 devices, only supported TMDS clock speeds of up to 165 MHz (4.95 Gbit/s bandwidth). This is equivalent to HDMI 1.2, and is sufficient for up to 1920 × 1200 at 60 Hz.[58]
In 2013, VESA released the Dual-Mode 1.1 standard, which added support for up to a 300 MHz TMDS clock (9.00 Gbit/s bandwidth), and is used in newer DisplayPort 1.2 devices. This is slightly less than the 340 MHz maximum of HDMI 1.4, and is sufficient for up to 1920 × 1080 at 120 Hz, 2560 × 1440 at 60 Hz, or 3840 × 2160 at 30 Hz. Older adapters, which were only capable of the 165 MHz speed, were retroactively termed "Type 1" adapters, with the new 300 MHz adapters being called "Type 2".[59]
Dual-mode limitations
[edit]
- Limited adapter speed – Although the pinout and digital signal values transmitted by the DP port are identical to a native DVI/HDMI TMDS source, the transmission lines on a DisplayPort source are AC-coupled (a series capacitor isolates the line from passing DC voltages) while DVI and HDMI TMDS are DC-coupled. As a result, dual-mode adapters must contain a level-shifting circuit which couples the signal lines to a DC source.[57]: §5.5 The presence of this circuit places a limit on how quickly the adapter can operate, and therefore newer adapters are required for each higher speed added to the standard.
- Unidirectional – Although the dual-mode standard specifies a method for DisplayPort sources to output DVI/HDMI signals using simple passive adapters, there is no counterpart standard to give DisplayPort displays the ability to receive DVI/HDMI input signals through passive adapters. As a result, DisplayPort displays can only receive native DisplayPort signals; any DVI or HDMI input signals must be converted to the DisplayPort format with an active conversion device. DVI and HDMI sources cannot be connected to DisplayPort displays using passive adapters.[60]
- Single-link DVI only – Since DisplayPort dual-mode operates by using the pins of the DisplayPort connector to send DVI/HDMI signals, the 20-pin DisplayPort connector can only produce a single-link DVI signal (which uses 19 pins). A dual-link DVI signal uses 25 pins, and is therefore impossible to transmit natively from a DisplayPort connector through a passive adapter. Dual-link DVI signals can only be produced by converting from native DisplayPort output signals with an active conversion device.[61]
- Unavailable on USB-C – The DisplayPort Alternate Mode specification for sending DisplayPort signals over a USB-C cable does not include support for the dual-mode protocol. As a result, DP-to-DVI and DP-to-HDMI passive adapters do not function when chained from a USB-C to DP adapter.[62]
Multi-Stream Transport (MST)
[edit]Multi-Stream Transport is a feature first introduced in the DisplayPort 1.2 standard. It allows multiple independent displays to be driven from a single DP port on the source devices by multiplexing several video streams into a single stream and sending it to a branch device, which demultiplexes the signal into the original streams. Branch devices are commonly found in the form of an MST hub, which plugs into a single DP input port and provides multiple outputs, but it can also be implemented on a display internally to provide a DP output port for daisy-chaining, effectively embedding a 2-port MST hub inside the display.[39]: Fig. 2-59 [63] Theoretically, up to 63 displays can be supported,[39]: 20 but the combined data rate requirements of all the displays cannot exceed the limits of a single DP port (17.28 Gbit/s for a DP 1.2 port, or 25.92 Gbit/s for a DP 1.3/1.4 port). In addition, the maximum number of links between the source and any device (i.e. the maximum length of a daisy-chain) is 7,[39]: §2.5.2 and the maximum number of physical output ports on each branch device (such as a hub) is 7.[39]: §2.5.1 With the release of MST, standard single-display operation has been retroactively named "SST" mode (Single-Stream Transport).
Daisy-chaining is a feature that must be specifically supported by each intermediary display; not all DisplayPort 1.2 devices support it. Daisy-chaining requires a dedicated DisplayPort output port on the display. Standard DisplayPort input ports found on most displays cannot be used as a daisy-chain output. Only the last display in the daisy-chain does not need to support the feature specifically or have a DP output port. DisplayPort 1.1 displays can also be connected to MST hubs, and can be part of a DisplayPort daisy-chain if it is the last display in the chain.[39]: §2.5.1
The host system's software also needs to support MST for hubs or daisy-chains to work. While Microsoft Windows environments have full support for it, Apple operating systems currently do not support MST hubs or DisplayPort daisy-chaining as of macOS 10.15 ("Catalina").[64][65] DisplayPort-to-DVI and DisplayPort-to-HDMI adapters/cables may or may not function from an MST output port; support for this depends on the specific device.[citation needed]
MST is supported by USB Type-C DisplayPort Alternate Mode, so standard DisplayPort daisy-chains and MST hubs do function from Type-C sources with a simple Type-C to DisplayPort adapter.[66]
High dynamic range (HDR)
[edit]Support for HDR video was introduced in DisplayPort 1.4. It implements the CTA 861.3 standard for transport of static HDR metadata in EDID.[22]
Content protection
[edit]DisplayPort 1.0 includes optional DPCP (DisplayPort Content Protection) from Philips, which uses 128-bit AES encryption. It also features full authentication and session key establishment. Each encryption session is independent, and it has an independent revocation system. This portion of the standard is licensed separately. It also adds the ability to verify the proximity of the receiver and transmitter, a technique intended to ensure users are not bypassing the content protection system to send data out to distant, unauthorized users.[8]: §6
DisplayPort 1.1 added optional implementation of industry-standard 56-bit HDCP (High-bandwidth Digital Content Protection) revision 1.3, which requires separate licensing from the Digital Content Protection LLC.[8]: §1.2.6
DisplayPort 1.3 added support for HDCP 2.2, which is also used by HDMI 2.0.[19]
Cost
[edit]VESA, the creators of the DisplayPort standard, state that the standard is royalty-free to implement. However, in March 2015, MPEG LA issued a press release stating that a royalty rate of $0.20 per unit applies to DisplayPort products manufactured or sold in countries that are covered by one or more of the patents in the MPEG LA license pool, which includes patents from Hitachi Maxell, Philips, Lattice Semiconductor, Rambus, and Sony.[67][68] In response, VESA updated their DisplayPort FAQ page with the following statement:[69]
MPEG LA is making claims that DisplayPort implementation requires a license and a royalty payment. It is important to note that these are only CLAIMS. Whether these CLAIMS are relevant will likely be decided in a US court.
As of September 2025, VESA's official FAQ no longer contains a statement mentioning the MPEG LA royalty fees.
While VESA does not charge any per-device royalty fees, VESA requires membership for access to said standards.[70] The minimum cost is presently $5,000 (or $10,000 depending on Annual Corporate Sales Revenue) annually.[71]
Comparison with HDMI
[edit]Although DisplayPort has much of the same functionality as HDMI, it is a complementary connection used in different scenarios.[72][73] A dual-mode DisplayPort port can emit an HDMI signal via a passive adapter.
Licensing
[edit]This section needs to be updated. (September 2025) |
As of 2008, HDMI Licensing, LLC charged an annual fee of US$10,000 to each high-volume manufacturer, and a per-unit royalty rate of US$0.04 to US$0.15.[74] DisplayPort is royalty-free, but implementers thereof are not prevented from charging (royalty or otherwise) for that implementation.[75]
Bandwidth
[edit]DisplayPort 1.2 has more bandwidth at 21.6 Gbit/s[76] (17.28 Gbit/s plus overhead) as opposed to HDMI 2.0's 18 Gbit/s[77] (14.4 Gbit/s plus overhead).
DisplayPort 1.3 increased the bandwidth to 32.4 Gbit/s (25.92 Gbit/s plus overhead). HDMI 2.1 matched that by increasing the bandwidth up to 48 Gbit/s (42.67 Gbit/s plus overhead), adding an additional TMDS link in place of clock lane. In 2019, DisplayPort 2.0 once again achieved the bandwidth superiority of 80.0 Gbit/s.
DisplayPort can also share bandwidth through the use of the Multi-Stream Transport (MST), which enables a single DP port to carry signals of several devices, to be demultiplexed at a branch hub.
Forked connectivity
[edit]HDMI has supported Consumer Electronics Control (CEC) commands since the first version. The CEC bus allows connecting multiple sources to a single display, and controlling any of these devices from any remote.[8][78][79] DisplayPort 1.3 added the possibility of transmitting CEC commands over the AUX channel.[80]
On the other hand, DisplayPort supports connecting multiple displays to one DP port via the Multi-Stream Transport (MST), allowing a single computer to have multiple displays.
These differences reflects the origins the two standards, and the priorities of their authors. HDMI originates from consumer electronics companies, whereas DisplayPort is owned by VESA, which started as an organization for computer standards.
Other areas
[edit]HDMI relies on the Vendor-Specific Block structure for features such as additional color spaces. DisplayPort uses the CEA EDID extensions.[81]
Both HDMI and DisplayPort have published specification for transmitting their signal over the USB-C connector (see USB-C § Alternate Mode partner specifications).
Market share
[edit]Figures from IDC show that 5.1% of commercial desktops and 2.1% of commercial notebooks released in 2009 featured DisplayPort.[82] The main factor behind this was the phase-out of VGA, and that both Intel and AMD planned to stop building products with FPD-Link by 2013. Nearly 70% of LCD monitors sold in August 2014 in the US, UK, Germany, Japan, and China were equipped with HDMI/DisplayPort technology, up 7.5% on the year, according to Digitimes Research.[83] IHS Markit, an analytics firm, forecast that DisplayPort would surpass HDMI in 2019.[84][needs update]
Companion standards
[edit]Mini DisplayPort
[edit]Mini DisplayPort (mDP) is a standard announced by Apple in the fourth quarter of 2008. Shortly after announcing Mini DisplayPort, Apple announced that it would license the connector technology with no fee. The following year, in early 2009, VESA announced that Mini DisplayPort would be included in the upcoming DisplayPort 1.2 specification. On 24 February 2011, Apple and Intel announced Thunderbolt, a successor to Mini DisplayPort which adds support for PCI Express data connections while maintaining backwards compatibility with Mini DisplayPort based peripherals.[85]
Micro DisplayPort
[edit]Micro DisplayPort would have targeted systems that need ultra-compact connectors, such as phones, tablets and ultra-portable notebook computers. This standard would have been physically smaller than the currently available Mini DisplayPort connectors. The standard was expected to be released by Q2 2014.[86]
DDM
[edit]Direct Drive Monitor (DDM) 1.0 standard was approved in December 2008. It allows for controller-less monitors where the display panel is directly driven by the DisplayPort signal, although the available resolutions and color depth are limited to two-lane operation.
Display Stream Compression
[edit]Display Stream Compression (DSC) is a VESA-developed video compression algorithm designed to enable increased display resolutions and frame rates over existing physical interfaces, and make devices smaller and lighter, with longer battery life.[87]
eDP
[edit]Embedded DisplayPort (eDP) is a display panel interface standard for portable and embedded devices. It defines the signaling interface between graphics cards and integrated displays. The various revisions of eDP are based on existing DisplayPort standards. However, version numbers between the two standards are not interchangeable. For instance, eDP version 1.4 is based on DisplayPort 1.2, while eDP version 1.4a is based on DisplayPort 1.3. Embedded DisplayPort has displaced LVDS as the predominant panel interface in modern laptops.[as of?] Unlike standard DisplayPort, the Embedded DisplayPort lacks backward compatibility.
eDP 1.0 was adopted in December 2008.[88] It included advanced power-saving features such as seamless refresh rate switching. Version 1.1 was approved in October 2009 followed by version 1.1a in November 2009. Version 1.2 was approved in May 2010 and includes DisplayPort 1.2 HBR2 data rates, 120 Hz sequential color monitors, and a new display panel control protocol that works through the AUX channel.[12] Version 1.3 was published in February 2011; it includes a new optional Panel Self-Refresh (PSR) feature developed to save system power and further extend battery life in portable PC systems.[89] PSR mode allows the GPU to enter a power saving state in between frame updates by including framebuffer memory in the display panel controller.[12] Version 1.4 was released in February 2013; it reduces power consumption through partial-frame updates in PSR mode, regional backlight control, lower interface voltages, and additional link rates; the auxiliary channel supports multi-touch panel data to accommodate different form factors.[90] Version 1.4a was published in February 2015; the underlying DisplayPort version was updated to 1.3 in order to support HBR3 data rates, Display Stream Compression 1.1, Segmented Panel Displays, and partial updates for Panel Self-Refresh.[91] Version 1.4b was published in October 2015; its protocol refinements and clarifications are intended to enable adoption of eDP 1.4b in devices by mid-2016.[92] Version 1.5 was published in October 2021; adds new features and protocols, including enhanced support for Adaptive-Sync, that provide additional power savings and improved gaming and media playback performance.[93]
iDP
[edit]Internal DisplayPort (iDP) is a standard that defines an internal link between a digital TV system on a chip controller and the display panel's timing controller. Version 1.0 was approved in April 2010. It aims to replace currently used internal FPD-Link lanes with a DisplayPort connection.[94] iDP features a unique physical interface and protocols, which are not directly compatible with DisplayPort and are not applicable to external connection, however they enable very high resolution and refresh rates while providing simplicity and extensibility.[12] iDP features a non-variable 2.7 GHz clock and is nominally rated at 3.24 Gbit/s per lane, with up to sixteen lanes in a bank, resulting in a six-fold decrease in wiring requirements over FPD-Link for a 1080p24 signal; other data rates are also possible. iDP was built with simplicity in mind so doesn't have an AUX channel, content protection, or multiple streams; it does however have frame sequential and line interleaved stereo 3D.[12]
PDMI
[edit]Portable Digital Media Interface (PDMI) is an interconnection between docking stations/display devices and portable media players, which includes 2-lane DisplayPort v1.1a connection. It has been ratified in February 2010 as ANSI/CEA-2017-A.
wDP
[edit]Wireless DisplayPort (wDP) enables the bandwidth and feature set of DisplayPort 1.2 for cable-free applications operating in the 60 GHz radio band. It was announced in November 2010 by WiGig Alliance and VESA as a cooperative effort.[95]
SlimPort
[edit]
SlimPort, a brand of Analogix products,[96] complies with Mobility DisplayPort, also known as MyDP, which is an industry standard for a mobile audio/video Interface, providing connectivity from mobile devices to external displays and HDTVs. SlimPort implements the transmission of video up to 4K-UltraHD and up to eight channels of audio over the micro-USB connector to an external converter accessory or display device. SlimPort products support seamless connectivity to DisplayPort, HDMI and VGA displays.[97] The MyDP standard was released in June 2012,[98] and the first product to use SlimPort was Google's Nexus 4 smartphone.[99] Some LG smartphones in LG G series also adopted SlimPort.
SlimPort is an alternative to Mobile High-Definition Link (MHL).[100][101]
DisplayID
[edit]DisplayID is designed to replace the E-EDID standard. DisplayID features variable-length structures which encompass all existing EDID extensions as well as new extensions for 3D displays and embedded displays.
The latest version 1.3 (announced on 23 September 2013) adds enhanced support for tiled display topologies; it allows better identification of multiple video streams, and reports bezel size and locations.[102] As of December 2013, many current 4K displays use a tiled topology, but lack a standard way to report to the video source which tile is left and which is right. These early 4K displays, for manufacturing reasons, typically use two 1920×2160 panels laminated together and are currently generally treated as multiple-monitor setups.[103] DisplayID 1.3 also allows 8K display discovery, and has applications in stereo 3D, where multiple video streams are used.
DockPort
[edit]DockPort, formerly known as Lightning Bolt, is an extension to DisplayPort to include USB 3.0 data as well as power for charging portable devices from attached external displays. Originally developed by AMD and Texas Instruments, it has been announced as a VESA specification in 2014.[104]
USB-C
[edit]On 22 September 2014, VESA published the DisplayPort Alternate Mode on USB Type-C Connector Standard, a specification on how to send DisplayPort signals over the newly released USB-C connector. One, two or all four of the differential pairs that USB uses for the SuperSpeed bus can be configured dynamically to be used for DisplayPort lanes. In the first two cases, the connector still can carry a full SuperSpeed signal; in the latter case, at least a non-SuperSpeed signal is available. The DisplayPort AUX channel is also supported over the two sideband signals over the same connection; furthermore, USB Power Delivery according to the newly expanded USB-PD 2.0 specification is possible at the same time. This makes the Type-C connector a strict superset of the use cases envisioned for DockPort, SlimPort, and Mini and Micro DisplayPort. However, DisplayPort Dual-Mode (DP++) is not supported under USB-C alternate mode.[105][106]
VirtualLink
[edit]VirtualLink was a proposal to allow the power, video, and data required to drive virtual reality headsets to be delivered over a single USB-C cable. The proposal was abandoned in September 2020.[107]
Products
[edit]
Since DisplayPort's introduction in 2006, it has gained popularity within the computer industry and is featured on many graphics cards, displays, and notebook computers. Dell was the first company to introduce a consumer product with a DisplayPort connector, the Dell UltraSharp 3008WFP, which was released in January 2008.[108] Soon after, AMD and Nvidia released products to support the technology. AMD included support in the Radeon HD 3000 series of graphics cards, and Nvidia first introduced support in the GeForce 9 series starting with the GeForce 9600 GT.[109][110]

Later in 2008, Apple introduced several products featuring a Mini DisplayPort.[111] The new connector – proprietary at the time – eventually became part of the DisplayPort standard, however Apple reserves the right to void the license should the licensee "commence an action for patent infringement against Apple".[112] In 2009, AMD followed suit with their Radeon HD 5000 series of graphics cards, which featured the Mini DisplayPort on the Eyefinity versions in the series.[113]
Nvidia launched a graphics card with 8 Mini DisplayPort outputs on 4 November 2015, called the NVS 810, which was intended for digital signage.[114][115]
Nvidia revealed the GeForce GTX 1080, the world's first graphics card with DisplayPort 1.4 support on 6 May 2016.[116] AMD followed with the Radeon RX 480 to support DisplayPort 1.3/1.4 on 29 June 2016.[117] The Radeon RX 400 series will support DisplayPort 1.3 HBR and HDR10, dropping the DVI connector(s) in the reference board design.
In February 2017, VESA and Qualcomm announced that DisplayPort Alt Mode video transport will be integrated into the Snapdragon 835 mobile chipset, which powers smartphones, VR/AR head-mounted displays, IP cameras, tablets and mobile PCs.[118]
Support for DisplayPort Alternate Mode over USB-C
[edit]
Currently, DisplayPort is the most widely implemented alternate mode,[who?] and is used to provide video output on devices that do not have standard-size DisplayPort or HDMI ports, such as smartphones, tablets, and laptops. A USB-C multiport adapter converts the device's native video stream to DisplayPort/HDMI/VGA, allowing it to be displayed on an external display, such as a television set or computer monitor.[citation needed]
Examples of devices that support DisplayPort Alternate Mode over USB-C include: MacBook, Chromebook Pixel, Surface Book 2, Samsung Galaxy Tab S4, iPad Pro (3rd generation), iPhone 15/15 Pro, HTC 10/U Ultra/U11/U12+, Huawei Mate 10/20/30, LG V20/V30/V40*/V50, OnePlus 7 and newer, ROG Phone, Samsung Galaxy S8 and newer, Nintendo Switch, Sony Xperia 1/5 etc.[119][120]
Participating companies
[edit]The following companies have participated in preparing the drafts of DisplayPort, eDP, iDP, DDM or DSC standards:
- Agilent
- Altera
- AMD Graphics Product Group
- Analogix[121]
- Apple
- Astrodesign
- BenQ
- Broadcom Corporation
- Chi Mei Optoelectronics
- Chrontel[122]
- Dell
- Display Labs
- Foxconn Electronics
- FuturePlus Systems
- Genesis Microchip[123]
- Gigabyte Technology
- Hardent
- Hewlett-Packard
- Hosiden
- Hirose Electric Group
- Intel
- intoPIX
- I-PEX
- Integrated Device Technology
- JAE Electronics
- Kawasaki Microelectronics (K-Micro)
- Keysight Technologies
- Lenovo
- LG Display
- Luxtera
- Molex
- NEC
- NVIDIA
- NXP Semiconductors
- Xi3 Corporation
- Parade Technologies
- Realtek Semiconductor
- Samsung[124]
- SMK
- STMicroelectronics
- Synaptics Inc.
- SyntheSys Research Inc.
- Teledyne LeCroy (QuantumData)
- Tektronix
- Texas Instruments
- TLi
- Tyco Electronics
- ViewSonic
- VTM
The following companies have additionally announced their intention to implement DisplayPort, eDP or iDP:
- Acer
- ASRock[125]
- Biostar
- Chroma
- BlackBerry
- Circuit Assembly
- DataPro[126]
- Eizo
- Fujitsu
- Hall Research Technologies
- ITE Tech.
- Matrox Graphics
- Micro-Star International[127]
- MStar Semiconductor
- Novatek Microelectronics Corp.
- Palit Microsystems Ltd.
- Pioneer Corporation
- S3 Graphics
- Toshiba
- Philips
- Quantum Data
- Sparkle Computer
- Unigraf
- Xitrix
See also
[edit]Notes
[edit]References
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- ^ VESA DisplayPort Alt Mode for USB Type‐C Standard, Feature Summary, Sept 22, 2014, accessed on line July 26, 2025.
- ^ Lang, Ben (3 September 2020). "The VirtualLink Single-cable VR Headset Connection Standard Has Been Abandoned". Road to VR. Retrieved 2 January 2025.
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- ^ "Signs of the Times: Massive Digital Signage Displays Powered by Diminutive Graphics Card". The Official NVIDIA Blog. 4 November 2015. Archived from the original on 6 November 2015. Retrieved 1 March 2024.
- ^ Williams, Daniel. "NVIDIA Launches NVS 810 Digital Signage Video Card". www.anandtech.com. Archived from the original on 5 November 2015. Retrieved 1 March 2024.
- ^ "NVIDIA GeForce 10 Series Graphics Cards". NVIDIA.
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- ^ "VESA Highlights Growing DisplayPort Alt Mode Adoption and Latest DisplayPort Developments at Mobile World Congress". VESA - Interface Standards for The Display Industry. 15 February 2017.
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External links
[edit]- DisplayPort
– the official site operated by VESA
DisplayPort
View on GrokipediaIntroduction and Fundamentals
Overview
DisplayPort is a royalty-free digital audio/video interconnection standard developed by the Video Electronics Standards Association (VESA) for connecting computers and other source devices to displays.[1][8] It primarily serves to transmit high-definition video and audio signals from source devices such as personal computers and graphics processing units to display devices including monitors, televisions, and projectors.[1][9] Key benefits of DisplayPort include its support for high resolutions, multi-monitor configurations, daisy-chaining of displays, and the ability to integrate additional data such as USB signals over a single cable.[4][9] The general architecture employs packet-based transmission, with a main link dedicated to carrying video and audio data and an auxiliary channel handling control and configuration signals.[9] VESA released the initial DisplayPort standard in May 2006.[9] It has since evolved through multiple versions to accommodate advancing display requirements.[1]Basic Principles
DisplayPort operates on a packetized data transmission protocol, where video, audio, and metadata are encapsulated into micro-packets and sent over the Main Link lanes. This approach, inspired by communication standards like Ethernet and PCI Express, allows for efficient multiplexing of multiple data streams within a single physical connection, ensuring isochronous delivery for time-sensitive content such as high-definition video and audio. Micro-packets, known as Transfer Units (TUs), include video timing information and stuffing symbols to maintain synchronization, enabling robust transport without the need for uncompressed pixel clocks typical of older interfaces.[9][10] The Main Link consists of 1, 2, or 4 differential signaling pairs, referred to as lanes, each transmitting data unidirectionally at fixed clock rates to support scalable bandwidth. These lanes operate in parallel, with inter-lane skew tolerance to mitigate noise, and are configured during link training to match the capabilities of the source and sink devices. For instance, a single-lane setup suffices for lower-resolution displays, while four lanes maximize throughput for demanding applications. Data encoding employs the ANSI 8b/10b scheme in DisplayPort versions 1.x, which converts 8 bits of data into 10-bit symbols for DC balance and clock recovery, incurring a 20% overhead; this transitions to the more efficient 128b/132b encoding in version 2.x, achieving approximately 97% efficiency by reducing overhead to about 3%.[9][10][11] The Auxiliary (AUX) Channel, a bidirectional half-duplex link running at 1 Mbps, handles control functions including hot-plug detection and Extended Display Identification Data (EDID) negotiation. Hot-plug detection uses a dedicated signal that asserts upon connection, triggering the source to poll the sink's status and initiate link training. EDID, accessed via I²C-over-AUX transactions, allows the source to query the display's capabilities, such as supported resolutions and audio formats, ensuring compatibility without manual configuration. Additionally, DisplayPort supports adaptive synchronization, enabling variable refresh rates that align the display's timing with the content's frame rate to eliminate screen tearing and reduce input lag, particularly beneficial for gaming and variable-frame-rate video.[10][9][12]History and Versions
Development History
The Video Electronics Standards Association (VESA) initiated the development of DisplayPort in the early 2000s through its Display Systems Standards Committee's DisplayPort Task Group, aiming to create a scalable, open-standard digital interface to succeed legacy connections like DVI, VGA, and LVDS by supporting higher bandwidths for emerging display technologies in PCs and consumer electronics.[13] This effort was driven by industry needs for a royalty-free protocol that could handle video, audio, and data transmission over a single cable, with contributions from key members including Analogix Semiconductor, ATI Technologies, Dell, and Genesis Microchip.[13] The first specification, DisplayPort 1.0, was finalized and released on May 1, 2006, establishing the foundational Main Link and Auxiliary Channel architecture.[13] VESA launched its DisplayPort certification program in 2008 to ensure interoperability and compliance, enabling the "DisplayPort Certified" logo for qualifying devices and marking the standard's transition to commercial availability.[14] Adoption accelerated in 2009 when Apple integrated Mini DisplayPort—initially introduced in its 2008 MacBook Pro lineup—into VESA's specifications, broadening the interface's use in laptops and peripherals while promoting its compact form factor for mobile devices.[15] Subsequent major updates were motivated by escalating demands for higher resolutions such as 4K and 8K, along with enhanced multi-monitor daisy-chaining, reflecting the standard's evolution to meet professional, gaming, and content creation requirements.[2] Today, VESA's DisplayPort development involves over 300 member companies worldwide, including prominent contributors like Intel, AMD, NVIDIA, and Dell, fostering collaborative advancements in display connectivity.[16] In a recent milestone, VESA announced DisplayPort 2.1b on January 6, 2025, emphasizing extensions for longer active cables to support ultra-high bit-rate transmissions up to 80 Gbps over distances three times greater than prior passive options, with the full specification released in spring 2025.[17]Version 1.x Overview
DisplayPort version 1.0, released in May 2006 with commercial availability in 2008, established the core architecture of the standard with a maximum bandwidth of 10.8 Gbps in High Bit Rate (HBR) mode across four lanes, supporting resolutions up to 2560×1600 at 60 Hz.[13][18] Version 1.1, approved in April 2007 and also available in 2008, offered incremental refinements primarily in audio handling, expanding support to up to eight channels of uncompressed linear pulse-code modulation (LPCM) audio at 192 kHz sampling rate and 24-bit depth, alongside High-Bandwidth Digital Content Protection (HDCP) 1.3 for secure content playback. The bandwidth remained at 10.8 Gbps, maintaining compatibility with 1.0 while enhancing multimedia integration without altering video capabilities.[19][20] Released in January 2010, version 1.2 doubled the bandwidth to 21.6 Gbps via the new High Bit Rate 2 (HBR2) mode at 5.4 Gbps per lane, enabling uncompressed 4K (3840×2160) at 60 Hz. MST became a mandatory feature, facilitating configurations such as driving two 1080p (1920×1080) monitors simultaneously over one cable in daisy-chain setups. Audio support extended to 32 channels at 1536 kHz in certain modes.[21][22] Version 1.3, published in September 2014, further elevated bandwidth to 32.4 Gbps with HBR3 at 8.1 Gbps per lane, supporting 5K (5120×2880) at 60 Hz over fewer lanes and adding HDCP 2.2 for protected 4K content; this version maintained the same raw throughput limits as later iterations but optimized lane allocation for multi-monitor and high-resolution setups.[23][24] Version 1.4, released in March 2016, retained the 32.4 Gbps HBR3 bandwidth while introducing Display Stream Compression (DSC) for visually lossless 2:1 or 3:1 compression, enabling 8K (7680×4320) at 30 Hz and HDR10 metadata transport for enhanced dynamic range and color accuracy. It also added Forward Error Correction (FEC) to improve signal integrity over longer cables and expanded audio to 32 channels at 1536 kHz with greater latency flexibility.[5][25] Version 1.4a, an update issued in April 2018, focused on minor refinements including power efficiency optimizations for embedded applications and updated certification processes to ensure broader interoperability, without changes to core bandwidth or resolution support.[26] These 1.x iterations built a robust foundation for digital display connectivity, transitioning toward the ultra-high bandwidth capabilities introduced in version 2.x.Version 2.x Overview
DisplayPort 2.x represents a significant evolution in the standard, introducing ultra-high bit rate (UHBR) link rates to achieve up to 80 Gbps of raw bandwidth across four lanes, enabling support for high-resolution displays and multi-monitor configurations previously unattainable without heavy compression.[11] Released in June 2019, DisplayPort 2.0 marked the first major update since version 1.4, delivering a maximum effective payload of 77.37 Gbps through the UHBR20 mode (20 Gbps per lane with 128b/132b encoding).[11] This bandwidth supports uncompressed 8K (7680×4320) at 60 Hz with 30 bits per pixel (bpp) in 4:4:4 HDR format or 4K (3840×2160) at 240 Hz, while mandating Display Stream Compression (DSC) 1.2 with forward error correction (FEC) for visually lossless transmission at higher demands.[11] The specification also incorporates Panel Replay, a power-saving feature that reduces bandwidth usage by over 99% during static content display, enhancing efficiency for laptops and portable devices.[11] Subsequent refinements in versions 2.0a and 2.0b, issued between 2020 and 2021, focused on clarifications to FEC implementation and Panel Replay protocols to improve signal reliability and interoperability in real-world deployments, particularly for embedded DisplayPort (eDP) integrations.[27] These updates built on the core 2.0 framework without altering bandwidth capabilities, ensuring robust performance for emerging UHBR-certified devices.[28] DisplayPort 2.1, released in October 2022, refined the UHBR13.5 (13.5 Gbps per lane) and UHBR20 modes for greater signal integrity over longer cables, extending support beyond 2 meters for DP40-rated connections and beyond 1 meter for DP80-rated ones.[6] It also enhanced USB4 tunneling by introducing bandwidth management that allows DisplayPort traffic to coexist efficiently with other data streams, reducing latency and enabling seamless integration in USB Type-C ecosystems.[6] With DSC, version 2.1 supports 16K (15360×8640) at 60 Hz in 30 bpp 4:4:4 HDR, while practical configurations include single 8K at 120 Hz HDR or triple 4K displays at 144 Hz using multi-stream transport.[6][4] The 2.1a update, released in December 2023, addressed minor errata and interoperability issues by aligning the DisplayPort physical layer (PHY) more closely with USB4 specifications and updating cable certifications, such as replacing DP40 with DP54 for 54 Gbps over 2 meters.[29] These changes ensure better compatibility across UHBR rates without impacting core performance.[29] In January 2025, VESA announced DisplayPort 2.1b, released in spring 2025, which introduces DP80LL (low-loss) certification for active cables supporting UHBR20 at full 80 Gbps over up to 3 meters—three times the length of prior passive DP80 cables.[7] This advancement, demonstrated at CES 2025, targets desktop GPU-to-display connections, mitigating signal degradation in longer runs while maintaining backward compatibility with earlier DisplayPort versions.[7]Technical Specifications
Main Link
The Main Link in DisplayPort serves as the primary unidirectional high-speed channel responsible for transmitting video and audio data from a source device to a sink device. It employs up to four lanes of low-voltage differential signaling, where each lane consists of a differential pair of AC-coupled conductors terminated at 50 Ω on both ends to minimize reflections and ensure signal integrity.[10] This structure allows scalable bandwidth by configuring 1, 2, or 4 lanes based on the capabilities of the connected devices and the channel characteristics, with all active lanes operating at the same data rate.[9] Clocking for the Main Link is embedded within the data stream, eliminating the need for a dedicated clock line and enabling more efficient use of pins compared to interfaces like DVI or HDMI. Receivers recover the clock using clock and data recovery (CDR) circuits that extract timing information from the encoded symbols, supporting symbol rates aligned to a link symbol clock (LS_Clk).[10] In DisplayPort 2.x, the Fixed Rate Link (FRL) mode introduces 128b/132b channel coding for ultra-high bit rates, further optimizing clock recovery and reducing overhead for higher throughput.[11] Lane scaling in the Main Link supports progressive data rates to accommodate evolving display requirements, starting with Reduced Bit Rate (RBR) at 1.62 Gbps per lane and High Bit Rate (HBR) at 2.7 Gbps per lane in early versions. Subsequent enhancements include HBR2 at 5.4 Gbps per lane in version 1.2, HBR3 at 8.1 Gbps per lane in versions 1.3 and later, and Ultra High Bit Rate (UHBR) modes in version 2.0—UHBR10 at 10 Gbps per lane, UHBR13.5 at 13.5 Gbps per lane, and UHBR20 at 20 Gbps per lane—enabling aggregate bandwidths up to 80 Gbps across four lanes.[11] These rates use 8b/10b encoding in versions 1.x for DC balance and clock embedding, transitioning to 128b/132b in FRL for improved efficiency.[10] Error handling in the Main Link ensures reliable transmission through mechanisms tailored to version capabilities. In versions 1.x, basic cyclic redundancy check (CRC) applies a 16-bit CRC to each video color component for detecting errors in the main stream attributes, with additional CRC-8 on secondary-data packet headers.[10] Starting with version 1.4, advanced forward error correction (FEC) using Reed-Solomon RS(254,250) encoding over GF(2^10) with 10-bit symbols and two-way symbol interleaving, capable of correcting up to 2 symbols per codeword, is mandated when using Display Stream Compression (DSC) to maintain visual fidelity over longer cables or at higher rates.[5][30] This FEC extends to version 2.x, supporting the UHBR rates in FRL mode for enhanced link integrity.[11] Power management in the Main Link is facilitated by a link training sequence that dynamically negotiates the optimal rate, lane count, and signal parameters to balance performance and power efficiency. During initialization or after error detection, the source transmits training patterns (TPS1 for clock recovery, TPS2 for equalization) while adjusting transmit voltage swing (400–1200 mV) and pre-emphasis (0–3.5 dB), with the sink providing feedback via the Auxiliary Channel to confirm alignment and minimize power dissipation in low-bandwidth scenarios.[9] This sequence, refined in later versions with additional patterns like TPS3 for HBR2 and beyond, ensures robust negotiation without excessive retries.[10]Auxiliary Channel
The Auxiliary Channel in DisplayPort serves as a dedicated bidirectional, half-duplex communication pathway for low-speed control and configuration between source and sink devices, operating at a standard data rate of 1 Mbps using Manchester encoding.[9] This channel employs a packet-based protocol with addressable transactions, typically limited to short bursts of up to 16 bytes, enabling efficient exchange of commands and responses without interfering with the high-speed main link.[9] Key functions of the Auxiliary Channel include link management, such as equalization training to optimize signal integrity and ongoing status monitoring to maintain connection quality.[9] It facilitates retrieval of display capabilities through EDID via an I²C-over-AUX tunneling mechanism, allowing sources to query supported resolutions, timings, and features from the sink.[9] Additionally, the channel supports HDCP authentication by handling key exchanges and integrity checks for protected content, as well as display control operations like Monitor Control Command Set (MCCS) adjustments and access to DisplayPort Configuration Data (DPCD) registers.[22] The Auxiliary Channel is also integral to content protection mechanisms, such as HDCP, where it conducts the necessary authentication handshakes between devices.[9] The protocol supports specific commands for device detection and connectivity, including hot-plug detection signaled via the Hot Plug Detect (HPD) line and subsequent AUX queries, as well as monitoring cable status through DC voltage levels on the AUX+ and AUX- lines to detect impedance mismatches or faults.[22] For extended display identification, the channel carries DisplayID data structures, which supersede or augment legacy EDID by providing more flexible reporting of advanced capabilities like wide color gamuts, 3D support, and higher resolutions.[22] Despite its versatility for control tasks, the Auxiliary Channel's low bandwidth limits it to auxiliary data only, excluding primary video or audio streams to avoid latency or capacity issues.[9] In DisplayPort version 1.2 and later, an optional Fast AUX mode boosts the rate to 720 Mbps using 8B/10B encoding and larger bursts up to 1024 bytes, enabling applications like USB 2.0 tunneling or low-bandwidth auxiliary video transfers, such as camera feeds up to 720p resolution in specialized configurations.[22]Bandwidth and Data Rates
DisplayPort's bandwidth capabilities are determined by the number of active lanes, the bit rate per lane, and the encoding scheme used for data transmission. The total raw bandwidth is calculated as the product of the number of lanes (typically up to four) and the bit rate per lane, while the effective payload bandwidth accounts for encoding overhead. For DisplayPort versions 1.0 through 1.4, an 8b/10b encoding scheme is employed, yielding 80% efficiency (0.8 factor), as each 10 transmitted bits represent 8 bits of data. In contrast, DisplayPort 2.x introduces a more efficient 128b/132b encoding, achieving approximately 96.875% efficiency (128/132 ≈ 0.96875), where 132 bits transmit 128 bits of payload data.[11] A representative example from DisplayPort 1.2 using High Bit Rate 2 (HBR2) mode illustrates this: with four lanes at 5.4 Gbps each, the raw bandwidth is Gbps, and the effective video bandwidth after 8b/10b encoding is Gbps. Similarly, for DisplayPort 2.1 in Ultra High Bit Rate 20 (UHBR20) mode, four lanes operate at 20 Gbps each, yielding a raw bandwidth of Gbps and an effective bandwidth of approximately Gbps after 128b/132b encoding.[4] Beyond encoding, additional overhead arises from protocol elements such as blanking packets for video timing synchronization, audio data packets, and metadata transmission. Blanking packets ensure proper frame formatting but consume a variable portion depending on resolution and refresh rate, typically 5-20% of the payload in high-resolution scenarios. Audio allocation, while flexible, supports up to 32 channels at 192 kHz and 24-bit depth, requiring no more than about 0.15 Gbps—negligible relative to total bandwidth but dynamically subtracted from video payload. Metadata for features like HDR or content protection adds minimal overhead, often under 1 Mbps.[31] DisplayPort 2.x enhances flexibility through scalable UHBR modes: UHBR10 (10 Gbps per lane, 40 Gbps raw), UHBR13.5 (13.5 Gbps per lane, 54 Gbps raw), and UHBR20 (20 Gbps per lane, 80 Gbps raw), allowing devices to negotiate rates based on cable capabilities and signal integrity for optimal performance without exceeding hardware limits. These modes enable effective bandwidths of approximately 38.75 Gbps, 52.31 Gbps, and 77.37 Gbps, respectively, after encoding.[6]Cables and Connectors
Cable Types and Compatibility
DisplayPort cables are primarily categorized into passive and active types, with the choice depending on required length and bandwidth. Passive cables use standard copper wiring without amplification, making them cost-effective for short distances but susceptible to signal degradation over longer runs. For high bit rate 3 (HBR3) transmission at 32.4 Gbps, passive cables are typically limited to 2 meters to maintain full performance, though they can extend up to 15 meters at lower rates like reduced bit rate (RBR) or high bit rate (HBR).[32][33] Active cables incorporate signal boosters or equalizers to extend reach, supporting lengths up to 15 meters or more for HBR3 while preserving quality. Introduced in DisplayPort 1.2, active cables can achieve up to five times the length of passive equivalents in high-definition setups, making them suitable for professional installations. For ultra-long distances beyond 15 meters, fiber optic active cables are employed, enabling reliable transmission over 25 meters or greater without significant loss, ideal for large-scale video walls or signage.[34][35] VESA certifies DisplayPort cables in tiers based on bandwidth capacity to ensure interoperability. DP40 cables support up to 40 Gbps (UHBR10), suitable for 4K at 144 Hz. The DP54 certification, an update to DP40, handles 54 Gbps (UHBR13.5) and validates original DP40 cables for this performance. DP80 cables achieve 80 Gbps (UHBR20) for advanced resolutions like 8K at 120 Hz. In 2025, VESA introduced DP80LL (low-loss) active cables under DisplayPort 2.1b, supporting UHBR20 over 3 meters—three times longer than standard 1-meter DP80 passive cables—enhancing flexibility for high-bandwidth applications.[36][37][7]| Certification | Maximum Bandwidth | Typical Use Case | Maximum Passive Length |
|---|---|---|---|
| DP40/DP54 | 40-54 Gbps (UHBR10/13.5) | 4K 144 Hz | 2 meters |
| DP80 | 80 Gbps (UHBR20) | 8K 120 Hz | 1 meter |
| DP80LL | 80 Gbps (UHBR20, active) | 8K 120 Hz | 3 meters |
Connector Designs and Pin Configurations
DisplayPort employs several connector designs to facilitate connections between video sources and displays, with the primary variants being the full-size connector and the smaller Mini DisplayPort connector. The full-size DisplayPort connector is a 20-pin interface measuring approximately 16 mm in length and 7.5 mm in width, designed for robust external connections on desktops and peripherals. It supports up to four differential signaling lanes for the main link, along with dedicated pins for auxiliary communication, hot plug detection, and power delivery.[10][42] The Mini DisplayPort connector, introduced in DisplayPort Version 1.2 and standardized by VESA in October 2009, is a compact 20-pin variant with dimensions of about 7.4 mm by 4.6 mm, commonly used in laptops, graphics cards, and portable devices for space-constrained applications. It maintains the same electrical signaling as the full-size version, enabling identical data rates and compatibility through adapters. Unlike proprietary smaller formats, VESA does not define a Micro DisplayPort in its standards.[43][10] DisplayPort also integrates with the USB Type-C connector via Alternate Mode, as specified in the VESA DisplayPort Alt Mode Standard Version 1 (September 2014), allowing reuse of USB-C's 24 pins for DisplayPort functionality without a dedicated connector. In this mode, the four SuperSpeed differential pairs (TX1/RX1, TX2/RX2) map to DisplayPort's main link lanes, the Sideband Use (SBU1/SBU2) pins handle the AUX channel, and the Configuration Channel (CC) pin conveys Hot Plug Detect (HPD) signals via USB Power Delivery protocols. This configuration supports full four-lane operation for maximum bandwidth or reduced lanes to coexist with USB data.[44] The pin configurations for full-size and Mini DisplayPort connectors are asymmetrical between source (e.g., graphics card) and sink (e.g., display) sides, with directions reversed on the sink. Below is the source-side pinout for the full-size 20-pin connector:| Pin | Function | Signal Type | Description |
|---|---|---|---|
| 1 | ML_Lane0 (p) | Out | Main Link Lane 0 Positive |
| 2 | GND | - | Ground |
| 3 | ML_Lane0 (n) | Out | Main Link Lane 0 Negative |
| 4 | ML_Lane1 (p) | Out | Main Link Lane 1 Positive |
| 5 | GND | - | Ground |
| 6 | ML_Lane1 (n) | Out | Main Link Lane 1 Negative |
| 7 | ML_Lane2 (p) | Out | Main Link Lane 2 Positive |
| 8 | GND | - | Ground |
| 9 | ML_Lane2 (n) | Out | Main Link Lane 2 Negative |
| 10 | ML_Lane3 (p) | Out | Main Link Lane 3 Positive |
| 11 | GND | - | Ground |
| 12 | ML_Lane3 (n) | Out | Main Link Lane 3 Negative |
| 13 | CONFIG1 | - | Configuration (grounded) |
| 14 | CONFIG2 | - | Configuration (grounded) |
| 15 | AUX_CH (p) | I/O | AUX Channel Positive |
| 16 | GND | - | Ground |
| 17 | AUX_CH (n) | I/O | AUX Channel Negative |
| 18 | HPD | In | Hot Plug Detect |
| 19 | DP_PWR | Out | 3.3V Power (500 mA max) |
| 20 | Return | - | Power Return (GND) |
| Pin | Function | Signal Type | Description |
|---|---|---|---|
| 1 | GND | - | Ground |
| 2 | HPD | In | Hot Plug Detect |
| 3 | ML_Lane0 (p) | Out | Main Link Lane 0 Positive |
| 4 | ML_Lane0 (n) | Out | Main Link Lane 0 Negative |
| 5 | ML_Lane1 (p) | Out | Main Link Lane 1 Positive |
| 6 | ML_Lane1 (n) | Out | Main Link Lane 1 Negative |
| 7 | GND | - | Ground |
| 8 | GND | - | Ground |
| 9 | ML_Lane2 (p) | Out | Main Link Lane 2 Positive |
| 10 | ML_Lane2 (n) | Out | Main Link Lane 2 Negative |
| 11 | ML_Lane3 (p) | Out | Main Link Lane 3 Positive |
| 12 | ML_Lane3 (n) | Out | Main Link Lane 3 Negative |
| 13 | GND | - | Ground |
| 14 | GND | - | Ground |
| 15 | AUX_CH (p) | I/O | AUX Channel Positive |
| 16 | AUX_CH (n) | I/O | AUX Channel Negative |
| 17 | GND | - | Ground |
| 18 | DP_PWR | Out | 3.3V Power (500 mA max) |
| 19 | GND | - | Ground |
| 20 | CONFIG1 | - | Configuration (grounded) |
Performance Capabilities
Resolution and Refresh Rate Limits
DisplayPort's resolution and refresh rate limits are primarily determined by the available bandwidth, which must support the pixel clock rate for the desired display mode. The pixel clock is computed using the formula: pixel clock = horizontal resolution × vertical resolution × refresh rate × (1 + blanking overhead), where blanking overhead accounts for horizontal and vertical blanking intervals, typically adding 15-25% to the active pixel count depending on the timing standard.[45] This ensures the total data rate fits within the link's capacity after encoding overhead (8b/10b for versions up to 1.4; 128b/132b for 2.x). Different DisplayPort versions impose varying limits based on their maximum data rates. DisplayPort 1.4, utilizing High Bit Rate 3 (HBR3) at 32.4 Gbps (25.92 Gbps effective), supports 8K (7680×4320) at 60 Hz with Display Stream Compression (DSC); uncompressed 8K is limited to 30 Hz at 8-bit color depth or with chroma subsampling. DisplayPort 2.1, with Ultra High Bit Rate 20 (UHBR20) at 80 Gbps (77.37 Gbps effective), enables uncompressed 8K at up to 85 Hz (10-bit) and, using DSC, supports 16K (15360×8640) at 60 Hz.[6][5] The following table summarizes common resolution and refresh rate combinations achievable across versions, assuming 10-bit color depth and 4:4:4 chroma subsampling (limits lower for uncompressed at 10-bit where noted), with DSC for higher demands:| Resolution | DisplayPort 1.4 (HBR3, with DSC for 8K) | DisplayPort 2.1 (UHBR20, Uncompressed) | DisplayPort 2.1 (UHBR20, with DSC) |
|---|---|---|---|
| 1080p (1920×1080) | Up to 240 Hz | Up to 900 Hz | Up to 1000 Hz (theoretical) |
| 1440p (2560×1440) | Up to 240 Hz | Up to 500 Hz | Up to 600 Hz |
| 4K (3840×2160) | Up to 120 Hz | Up to 240 Hz | Up to 300 Hz |
| 8K (7680×4320) | 60 Hz | Up to 85 Hz | 240 Hz |
| 16K (15360×8640) | Not supported | Not supported | 60 Hz |
Support for Video Standards
DisplayPort adheres to VESA's established timing standards, including the Coordinated Video Timings (CVT) with reduced blanking (CVT/R) and the Generalized Timing Formula (GTF), ensuring compatibility with a wide range of standard resolutions and refresh rates for displays.[9] The interface supports flexible color encoding formats such as RGB and YCbCr in both 4:4:4 and 4:2:2 subsampling configurations, accommodating color depths up to 16 bits per channel (48 bits per pixel total for RGB). It also enables the BT.2020 wide color gamut, facilitating high-fidelity color reproduction in modern displays.[5][49] To optimize bandwidth usage, DisplayPort integrates compression technologies like Display Stream Compression (DSC) 1.2, which delivers visually lossless performance at compression ratios up to 3:1, with DSC 2.0 and later versions becoming mandatory in subsequent standards for enhanced efficiency. Additionally, version 1.3 introduced VDC-M, a mandatory compression mode tailored for embedded applications, providing basic visually lossless reduction without the complexity of full DSC.[5][49][47] Audio is seamlessly integrated into the DisplayPort stream, supporting up to 8 channels at sample rates of 384 kHz and 32-bit depth in a single stream, with compatibility for high-definition formats such as Dolby TrueHD; later versions extend this to 32 channels at 1536 kHz for multi-stream scenarios.[5][9] For context, transmitting uncompressed 4K (3840×2160) at 60 Hz with 4:4:4 chroma subsampling and 10-bit color depth requires approximately 17.8 Gbps of bandwidth, highlighting the role of compression in achieving such performance within available link rates.[9]Advanced Features
Multi-Stream Transport (MST)
Multi-Stream Transport (MST) is a key feature of the DisplayPort standard, introduced in version 1.2 by the Video Electronics Standards Association (VESA) in 2010, that enables a single DisplayPort connection to transport multiple independent audio/video streams simultaneously.[22] This capability supports daisy-chaining of compatible displays or the use of active branching hubs, allowing one source port to drive multiple sinks while sharing the overall link bandwidth, which is limited to the capabilities of the main link (e.g., up to 17.28 Gbps video data rate in HBR2 mode for version 1.2).[9] In DisplayPort 2.0 and subsequent versions, MST support is enabled by default as a standard requirement for certified devices.[3] In operation, the source device multiplexes up to 63 individual streams into packets transmitted over the main link, while the auxiliary channel facilitates topology discovery and branch management, enabling devices to detect connected sinks, allocate bandwidth, and route specific streams accordingly.[9] This branching occurs at MST-capable hubs or displays, which demultiplex the streams for output to downstream devices, supporting flexible topologies like linear daisy-chains or star configurations.[3] Common use cases include desk-side docking setups for productivity, where a single port drives 2-3 monitors; for instance, DisplayPort 1.4 MST can deliver dual 4K (3840×2160) displays at 60 Hz by dividing the 25.92 Gbps video data rate, typically requiring Display Stream Compression (DSC) for full-color-depth support without exceeding bandwidth limits.[5] MST has inherent limitations due to bandwidth sharing, which can reduce per-stream performance (e.g., lower resolutions or refresh rates compared to single-stream transport) and requires careful allocation to avoid overload.[3] In early implementations of version 1.2, audio support was included in the specification for multiple streams but often limited to a single shared audio stream across branches in some devices, with independent audio per stream becoming more robust in versions 1.4 and later through expanded transport capabilities.[5] Effective MST setups necessitate active, VESA-certified hubs for reliable branching, as passive cables alone do not support stream demultiplexing, and certification ensures compliance with link rates, error correction, and topology handling.[9]High Dynamic Range (HDR)
DisplayPort version 1.4, released in 2016, introduced support for High Dynamic Range (HDR) content through the HDR10 format, utilizing static metadata to convey essential display characteristics such as color gamut and luminance capabilities.[5] This enables enhanced contrast, brighter highlights, and more vibrant colors compared to standard dynamic range (SDR) content. To qualify for HDR transmission, DisplayPort requires a minimum color depth of 10 bits per channel (bpc) and compatibility with the BT.2020 color space, which expands the reproducible color gamut beyond the traditional BT.709 used in SDR. DisplayPort 1.4a (April 2018), an update to version 1.4, extended HDR capabilities to include dynamic metadata formats like HDR10+, allowing scene-by-scene adjustments for optimal tone mapping and more precise HDR rendering without relying solely on fixed parameters.[11] This dynamic approach improves visual fidelity in varying content scenes, such as explosions or sunsets, by signaling real-time adjustments to brightness and contrast. HDR metadata in DisplayPort can signal peak brightness levels up to 10,000 nits, providing displays with information to accurately map content luminance for realistic rendering, though actual display capabilities often fall short of this maximum. The transmission of HDR content imposes additional bandwidth demands on DisplayPort links; for example, delivering 4K resolution at 60 Hz with HDR10 requires approximately 20% more bandwidth than equivalent SDR due to the increased color depth from 8 bpc to 10 bpc.[33] VESA's DisplayHDR certification program, which verifies HDR performance across tiers like DisplayHDR 400 (minimum 400 nits peak luminance), 600 (600 nits), and 1000 (1000 nits), mandates support for DisplayPort 1.4 or higher to ensure compatibility with HDR workflows, including proper metadata handling and color accuracy.[50] Earlier DisplayPort implementations, limited by the High Bit Rate 3 (HBR3) mode in version 1.4 with its 32.4 Gbps total bandwidth, constrain uncompressed HDR delivery to resolutions like 4K at 60 Hz, often requiring Display Stream Compression (DSC) for higher demands such as 8K. DisplayPort 2.1, with up to 80 Gbps bandwidth via Ultra High Bit Rate (UHBR) modes, overcomes these constraints to enable uncompressed 8K HDR at 60 Hz, facilitating smoother playback of high-resolution HDR video without perceptible quality loss.[11][45]Content Protection Mechanisms
DisplayPort incorporates content protection mechanisms to safeguard digital audio and video signals from unauthorized copying, primarily through support for High-bandwidth Digital Content Protection (HDCP) versions 1.4, 2.2, and 2.3, which are integrated via the auxiliary (AUX) channel for authentication and key management.[47][51] HDCP 1.4 is supported starting with DisplayPort 1.2 and later versions, enabling protection for high-definition content up to 1080p resolutions, while HDCP 2.2 integration begins with DisplayPort 1.3, allowing secure transmission of 4K Ultra HD content.[4] DisplayPort 2.x specifications further enable HDCP 2.3 with enhanced repeater support for complex topologies, ensuring compatibility with premium 4K and 8K protected media.[51][52] The HDCP authentication process in DisplayPort relies on the bidirectional AUX channel to facilitate secure key exchange between the source (transmitter) and sink (receiver) devices, where the transmitter verifies the receiver's HDCP capability by reading registers and exchanging device-specific keys to establish an encrypted link.[53][54] Following initial authentication, periodic link integrity checks are performed over the AUX channel to detect any downstream changes or tampering, maintaining encryption with 128-bit AES for video and audio data streams.[53] This process supports Multi-Stream Transport (MST) branching, where HDCP authentication propagates through daisy-chained or hub-connected displays, ensuring all branches remain protected without compromising multi-monitor setups.[55][56] Despite these capabilities, limitations exist: HDCP 2.2 mandates full re-authentication upon any topology change, such as switching inputs or adding devices, which can introduce brief delays in content playback.[57] Additionally, early DisplayPort 1.x implementations with HDCP 1.4 do not support protected 4K content, restricting secure playback to lower resolutions like 1080p to comply with HDCP 1.x bandwidth and encryption constraints.[58][59] For internal display panels in devices like laptops, DisplayPort uses an alternative mechanism called DisplayPort Content Protection (DPCP), which provides AES-128 encryption similar to HDCP but optimized for embedded connections without requiring external licensing.[18][60] DPCP operates alongside HDCP for internal signal protection, ensuring secure video paths within the device while allowing seamless integration with external HDCP-protected outputs.[18]Dual-Mode Operation (DP++)
Dual-Mode Operation, commonly referred to as DP++, enables DisplayPort sources to transmit TMDS signals compatible with DVI and HDMI displays, facilitating interoperability through adapters or cables. This feature allows DisplayPort-equipped devices, such as graphics cards and laptops, to drive legacy HDMI or DVI sinks without dedicated protocol converters in the source hardware.[61] Introduced with the DisplayPort 1.1a specification in January 2008, the initial Dual-Mode guideline (version 1.0) supported single-link TMDS output from DisplayPort transmitters, targeting DVI 1.0 and early HDMI compatibility at a maximum clock rate of 165 MHz and bandwidth of approximately 5.4 Gbps. This provided support for resolutions up to 1080p at 60 Hz with 24-bit color depth.[61] In January 2013, VESA released an updated Dual-Mode Standard version 1.1 in conjunction with DisplayPort 1.2, elevating the TMDS clock rate to 300 MHz for up to 10.2 Gbps bandwidth, equivalent to full HDMI 1.4 capabilities including 4K at 30 Hz, 1080p deep color, and 3D support. This update categorized adapters into Type 1 (limited to 165 MHz) and Type 2 (up to 300 MHz, requiring compatible sources).[62] DP++ functions in single TMDS mode for basic DVI and HDMI 1.4 outputs, mapping one DisplayPort lane pair to a single TMDS channel set, and dual TMDS mode for advanced applications like HDMI 2.0, where the four DisplayPort lanes emulate two independent TMDS links to achieve up to 18 Gbps bandwidth in DisplayPort 1.4 configurations.[4] Implementation relies on pin reconfiguration within the standard DisplayPort connector, where the main link lanes are reassigned to TMDS data pairs (TMDS0–TMDS2) and clock signals, while the bidirectional AUX channel is adapted to the unidirectional DDC bus for display detection via EDID. Sources identify attached adapters through a specific voltage level on pin 13 (Hot Plug Detect) and switch from DisplayPort packet-based signaling to direct TMDS output. This process demands hardware support in the DisplayPort transmitter, often integrated in GPUs from manufacturers like AMD and NVIDIA. Standard passive adapters handle the pin mapping for single-mode operation, while active adapters may be needed for dual-mode or higher bandwidths.[61] Key limitations of DP++ include the lack of Multi-Stream Transport (MST) for daisy-chaining displays, no AUX channel passthrough for advanced DisplayPort features like dynamic link training, and audio restricted to HDMI's basic multi-channel capabilities rather than DisplayPort's embedded audio flexibility. Early implementations, such as those under Dual-Mode 1.1, could not achieve 4K at 60 Hz with uncompressed 4:4:4 chroma subsampling due to TMDS bandwidth constraints.[61] DisplayPort 2.0, released in June 2019, extended DP++ to accommodate HDMI 2.1 specifications, supporting up to 48 Gbps bandwidth through Ultra High Bit Rate (UHBR) link rates that emulate the higher TMDS clock frequencies required for features like 8K at 60 Hz, 4K at 120 Hz, and enhanced HDR. This update ensures broader compatibility with modern HDMI ecosystems while maintaining backward compatibility with earlier modes.[11]Related Standards and Extensions
Companion DisplayPort Variants
Companion DisplayPort variants are specialized adaptations of the core DisplayPort standard developed by VESA for embedded, internal, and alternative applications, emphasizing reduced power consumption, cost efficiency, and space optimization in devices such as laptops, televisions, and portable electronics. These variants maintain compatibility with DisplayPort's packetized protocol for audio, video, and data transport while tailoring physical layers and features to specific use cases, all under royalty-free VESA specifications to promote widespread adoption.[63] The Embedded DisplayPort (eDP) standard is designed for internal connections between graphics processors and display panels in mobile computing devices like laptops and tablets, prioritizing low power and compact integration over long-distance transmission. Introduced in 2009 and evolved through multiple revisions, eDP reduces signaling voltage compared to standard DisplayPort to minimize power draw, enabling features like Panel Self-Refresh (PSR) that allow the GPU to enter low-power states while the panel holds static images. The latest versions are eDP 1.5 (October 2021) and eDP 1.5a (January 2024), the latter adding automotive-specific extensions via DisplayPort Automotive Extensions (DP AE) while maintaining core features; eDP 1.5 enhances Adaptive-Sync support for smoother gaming and video playback with reduced latency and flicker, alongside protocols for disabling the interface during vertical blanking intervals to further conserve energy. It specifies four high-speed lanes at the HBR3 rate of 8.1 Gbps each, delivering a total bandwidth of 32.4 Gbps to support resolutions up to 5K at 60 Hz or 4K at 120 Hz with HDR.[64][65][37] Internal DisplayPort (iDP), released by VESA in 2010, serves as a panel interface for large flat-panel televisions and monitors, focusing on broadcast-oriented signaling within the chassis to drive multiple display segments efficiently. Unlike eDP's point-to-point topology suited for notebooks, iDP employs a multi-drop bus architecture that supports up to 16 lanes per bank without auxiliary channels or content protection, reducing complexity and electromagnetic interference compared to legacy LVDS interfaces. It achieves nominal bandwidth of 3.24 Gbps per lane to enable Full HD at 240 Hz using just 17 signals, including eight differential pairs and a hot-plug detect line, making it ideal for high-refresh-rate TV panels.[66] Mini DisplayPort provides a compact form factor alternative to the full-sized connector, supporting the complete range of DisplayPort signaling and protocols in space-constrained devices such as ultrabooks and external adapters. Defined in VESA's Mini DisplayPort Connector Standard Version 1.0 from 2009 and integrated into DisplayPort 1.2, it uses a 20-pin configuration to deliver up to HBR3 bandwidth of 32.4 Gbps across four lanes, enabling 4K at 60 Hz or dual-monitor setups without performance loss. Micro DisplayPort, while not an official VESA standard, has appeared in some mobile and embedded applications as a further miniaturized variant, though its adoption remains limited due to compatibility challenges.[43][1] Additional companion standards extend DisplayPort's utility in niche scenarios. The Direct Drive Monitor (DDM) standard, published in 2009, facilitates direct connections from graphics subsystems to raw LCD panels without internal timing controllers, conveying timing and data management signals to lower costs in monitor manufacturing. The Portable Digital Media Interface (PDMI), incorporated into CEA-2017 standards around 2010, integrates DisplayPort as an internal link for portable media players, combining it with USB 3.0 over a 30-pin connector for multimedia output. Wireless DisplayPort (wDP), a VESA extension from 2011, enables untethered transmission using WiGig (60 GHz) bands to replicate wired DisplayPort performance wirelessly, targeting applications like docking stations though with limited commercial uptake. SlimPort, developed by Analogix as an MHL bridge technology since 2012, repurposes DisplayPort signaling over USB connectors to deliver video to mobile displays or TVs, supporting up to 4K at 30 Hz in a compact form. DisplayID, VESA's extensible identification standard evolving from EDID since 2005 and updated to version 2.0 in 2017, enhances panel data management by providing modular blocks for capabilities like HDR, high resolutions, and tiled displays, ensuring seamless plug-and-play interoperability. All these variants align with VESA's goal of royalty-free standards that reduce implementation costs and physical footprints while preserving DisplayPort's core advantages in bandwidth and flexibility.[67][68]Integration with USB-C and Other Protocols
DisplayPort integrates seamlessly with USB-C connectors through Alternate Mode, a VESA standard that enables the transmission of DisplayPort signals over USB Type-C cables and ports. This mode remaps the high-speed differential pairs of the USB-C connector—specifically the SuperSpeed pairs—to carry DisplayPort lanes, allowing for video and audio output without requiring a dedicated DisplayPort connector. Source devices such as all modern Apple MacBooks, from the 2016 MacBook Pro onward including M1/M2/M3/M4 MacBook Air and Pro models, support DisplayPort Alt Mode over their USB-C ports (Thunderbolt 3/4/5 and USB4), enabling video output up to 4K/6K/8K depending on the model and cable.[69] To verify if a USB-C port on a monitor supports DisplayPort Alternate Mode, consult the manufacturer's specifications or user manual for indications such as "USB-C with DisplayPort Alternate Mode," "DP Alt Mode," or support for video input via USB-C, often alongside power delivery capabilities. Physical indicators, such as the DisplayPort logo near the port, may also confirm support. Practically, connect a compatible source device using a full-featured USB-C cable that supports video transmission; if the monitor displays video output without requiring additional video cables, and potentially charges the source device, DisplayPort Alt Mode is supported.[70][71] A passive full-featured USB Type-C cable supports up to four DisplayPort lanes, providing the same performance as a native DisplayPort connection while also enabling USB data and power delivery over the same cable.[72] The updated DisplayPort Alternate Mode specification, released in 2020, extends this capability to USB4 devices, supporting DisplayPort 2.0 bandwidth of up to 80 Gbps across all four lanes for high-resolution displays when using USB4 Version 2.0 (80 Gbps, October 2022).[73][74] In USB4 and Thunderbolt implementations, DisplayPort signals are tunneled within the protocol to combine video output with data transfer and power delivery. USB4 Version 1.0 (up to 40 Gbps), based on the Thunderbolt 3 protocol, encapsulates DisplayPort 1.4 traffic, allowing devices to support resolutions such as 8K at 30 Hz or dual 4K at 60 Hz over a single cable. USB4 Version 2.0 doubles this to 80 Gbps symmetric bandwidth, enabling enhanced DisplayPort 2.0 tunneling for higher resolutions and refresh rates. Thunderbolt 4 (40 Gbps) builds on this by guaranteeing tunneling for DisplayPort 1.4 and extending to DisplayPort 2.0 in compatible configurations, enabling one port to drive up to two 4K displays at 60 Hz using Multi-Stream Transport (MST). Thunderbolt 5 (announced September 2023, with products available from 2024) further advances integration with up to 80 Gbps symmetric or 120 Gbps asymmetric bandwidth, supporting full DisplayPort 2.1 capabilities including 8K at 120 Hz.[74][75][76] This tunneling approach ensures backward compatibility with earlier DisplayPort versions while leveraging the aggregate bandwidth of USB4 and Thunderbolt for multi-protocol operation.[77] VirtualLink, introduced in 2018 as a specialized USB-C Alternate Mode for virtual reality applications, aimed to deliver DisplayPort video, USB data, and power through a single connector to simplify VR headset connections.[78] Developed collaboratively by NVIDIA, Oculus, Valve, AMD, and Microsoft, it supported up to four DisplayPort lanes alongside USB 3.1 and up to 15W of power. However, the standard was deprecated by 2019 due to limited industry adoption and challenges in achieving sufficient bandwidth for next-generation VR, with NVIDIA confirming its abandonment in subsequent GPU designs.[79] DockPort represents an earlier effort to combine DisplayPort with USB and power over a standard DisplayPort connector, rather than USB-C. Released by VESA in 2014 as an optional extension to DisplayPort 1.2, it enables USB 3.1 data transfer at up to 10 Gbps and DC power delivery for charging (up to 17.6W) alongside video signals on a single cable.[80] Despite its potential for docking stations and peripherals, DockPort has seen limited adoption, overshadowed by the rise of USB-C as the dominant multi-purpose connector.[81] Bandwidth management in these integrations prioritizes DisplayPort tunneling to ensure reliable video performance, with dynamic allocation across protocols. In USB4 Version 1.0, up to 90% of the link's 40 Gbps bandwidth can be dedicated to DisplayPort, USB 3.x, or PCIe traffic as needed, though video streams typically receive priority to minimize latency and maintain quality; Version 2.0 extends this to 80 Gbps.[82] For instance, when tunneling DisplayPort 1.4, the full bandwidth can support demanding configurations like 4K at 60 Hz, while leaving headroom for concurrent USB data.[74] This shared architecture allows USB4 and Thunderbolt ports to handle DisplayPort 1.4 tunneling efficiently within their limits, adapting to application demands without fixed lane assignments, with higher capabilities in Version 2.0 and Thunderbolt 5.[77]Comparisons and Adoption
Comparison with HDMI and Legacy Interfaces
DisplayPort and HDMI are both digital interfaces for transmitting high-definition video and audio, but they differ in licensing, capabilities, and use cases. DisplayPort, developed by VESA, is a royalty-free standard, allowing implementers to use the core specification without per-unit fees, whereas HDMI requires licensing through the HDMI Licensing Administrator, Inc., which imposes royalties such as $0.15 per product or $0.05 with logo usage. DisplayPort excels in multi-monitor setups due to its native support for Multi-Stream Transport (MST), enabling daisy-chaining of displays over a single cable, a feature absent in HDMI. Conversely, HDMI integrates more seamlessly with AV receivers and home theater systems, supporting audio return channel (ARC) and enhanced audio return channel (eARC) for pass-through to amplifiers without additional cables. In terms of bandwidth, DisplayPort 2.1 achieves up to 80 Gbps using UHBR20 mode across four lanes, while HDMI 2.2 (released in 2025) supports up to 96 Gbps, enabling high resolutions such as 16K at 60 Hz.[83][84][7][85] DisplayPort also provides native support for Adaptive Sync (VESA standard since version 1.2a), which synchronizes the display's refresh rate with the GPU to reduce screen tearing and stuttering in gaming, without relying on proprietary extensions like HDMI's Variable Refresh Rate (VRR), introduced in HDMI 2.1. HDMI, however, remains dominant in consumer electronics due to its broader ecosystem support.[86][87] Compared to legacy interfaces like DVI and VGA, DisplayPort serves as a modern digital replacement, supporting significantly higher resolutions (up to 16K in version 2.1) and refresh rates (e.g., 4K at 240 Hz) that exceed DVI's practical limit of 2560x1600 at 60 Hz and VGA's analog constraints of 1920x1200 at 60 Hz. Unlike VGA, which transmits analog signals prone to degradation and interference, DisplayPort is fully digital, eliminating the need for digital-to-analog conversion and improving signal integrity over longer distances within its limits. DVI, while digital, lacks audio transmission and adaptive sync, features integral to DisplayPort, and requires separate cables for audio. DisplayPort does not support analog output natively, necessitating adapters for legacy VGA displays, which can introduce quality loss.[88] For FPD-Link, a serializer/deserializer interface primarily used in automotive and internal flat-panel applications, DisplayPort is geared toward external consumer and professional connections, offering greater versatility with embedded audio, USB data, and multi-monitor support not inherent in FPD-Link's focus on serialized LVDS video over short internal links. FPD-Link excels in embedded systems like vehicle displays, where space and cost constrain cabling, but DisplayPort's packetized protocol enables broader adaptability, including bridges to FPD-Link in hybrid setups.[89][90]| Feature | DisplayPort 2.1 | HDMI 2.2 | DVI | VGA | FPD-Link |
|---|---|---|---|---|---|
| Max Bandwidth (Gbps) | 80 (UHBR20) | 96 | ~9.9 (Dual-Link) | Analog (limited ~0.4) | Variable (e.g., 4-10 Gbps serialized) |
| Resolution/Refresh Support | 16K@60Hz, 8K@240Hz | 16K@60Hz, 12K@120Hz | 2560x1600@60Hz | 1920x1200@60Hz | Up to 4K@60Hz (internal) |
| Audio Support | Yes (multi-channel) | Yes (eARC) | No | No | No (video-focused) |
| Adaptive Sync | Native (VESA) | VRR (since 2.1) | No | No | No |
| Multi-Monitor (MST) | Yes (daisy-chain) | No | No | No | Limited (internal) |
| USB/Data Carry | Yes (over USB-C Alt Mode) | No | No | No | No |
