Hubbry Logo
Connection MachineConnection MachineMain
Open search
Connection Machine
Community hub
Connection Machine
logo
8 pages, 0 posts
0 subscribers
Be the first to start a discussion here.
Be the first to start a discussion here.
Contribute something
Connection Machine
Connection Machine
Connection Machine
View on Wikipedia
from Wikipedia
Connection Machine
A Connection Machine CM-2 (1987) and accompanying DataVault on display at the Mimms Museum of Technology and Art in Roswell, Georgia. The CM-2 used the same casing as the CM-1.
Design
ManufacturerThinking Machines Corporation
Release date
  • 1986 (CM-1)
  • 1987 (CM-2)
  • 1991 (CM-5)
Units soldAt least 70[1][2]
Casing
Dimensions≈6 × 6 × 6 ft (1.8 × 1.8 × 1.8 m) (CM-1 and CM-2)
Weight1,268 lb (575 kg) (CM-2)[1]
System
CPUUp to 65,536 1-bit processors (CM-1 and CM-2)
Memory
Storage
  • Up to 80 GB with eight DataVaults (CM-1 and CM-2)
  • ≈ 2 TB (FROSTBURG CM-5)
FLOPS
  • 2.5 gigaFLOPS (CM-2)
  • 65.5 gigaFLOPS (FROSTBURG CM-5)

The Connection Machine (CM) is a member of a series of massively parallel supercomputers sold by Thinking Machines Corporation. The idea for the Connection Machine grew out of doctoral research on alternatives to the traditional von Neumann architecture of computers by Danny Hillis at Massachusetts Institute of Technology (MIT) in the early 1980s. Starting with CM-1, the machines were intended originally for applications in artificial intelligence (AI) and symbolic processing, but later versions found greater success in the field of computational science.

Origin of idea

[edit]

Danny Hillis and Sheryl Handler founded Thinking Machines Corporation (TMC) in Waltham, Massachusetts, in 1983, moving in 1984 to Cambridge, MA. At TMC, Hillis assembled a team to develop what would become the CM-1 Connection Machine, a design for a massively parallel hypercube-based arrangement of thousands of microprocessors, springing from his PhD thesis work at MIT in Electrical Engineering and Computer Science (1985).[3] The dissertation won the ACM Distinguished Dissertation prize in 1985,[4] and was presented as a monograph that overviewed the philosophy, architecture, and software for the first Connection Machine, including information on its data routing between central processing unit (CPU) nodes, its memory handling, and the programming language Lisp applied in the parallel machine.[3][5] Very early concepts contemplated just over a million processors, each connected in a 20-dimensional hypercube,[6] which was later scaled down.

Designs

[edit]
Thinking Machines Connection Machine models
1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994
Custom architecture RISC-based (SPARC)
Entry — CM-2a —
Mainstream — CM-1 CM-2 — CM-5 CM-5E
Hi-end — CM-200
expansions
Storage — DataVault —
Thinking Machines CM-2 at the Computer History Museum in Mountain View, California. One of the face plates has been partly removed to show the circuit boards inside.

Each CM-1 microprocessor has its own 4 kilobits of random-access memory (RAM), and the hypercube-based array of them was designed to perform the same operation on multiple data points simultaneously, i.e., to execute tasks in single instruction, multiple data (SIMD) fashion. The CM-1, depending on the configuration, has as many as 65,536 individual processors, each extremely simple, processing one bit at a time. CM-1 and its successor CM-2 take the form of a cube 1.5 meters on a side, divided equally into eight smaller cubes. Each subcube contains 16 printed circuit boards and a main processor called a sequencer. Each circuit board contains 32 chips. Each chip contains a router, 16 processors, and 16 RAMs. The CM-1 as a whole has a 12-dimensional hypercube-based routing network (connecting the 212 chips), a main RAM, and an input-output processor (a channel controller). Each router contains five buffers to store the data being transmitted when a clear channel is not available. The engineers had originally calculated that seven buffers per chip would be needed, but this made the chip slightly too large to build. Nobel Prize-winning physicist Richard Feynman had previously calculated that five buffers would be enough, using a differential equation involving the average number of 1 bits in an address. They resubmitted the design of the chip with only five buffers, and when they put the machine together, it worked fine. Each chip is connected to a switching device called a nexus. The CM-1 uses Feynman's algorithm for computing logarithms that he had developed at Los Alamos National Laboratory for the Manhattan Project. It is well suited to the CM-1, using as it did, only shifting and adding, with a small table shared by all the processors. Feynman also discovered that the CM-1 would compute the Feynman diagrams for quantum chromodynamics (QCD) calculations faster than an expensive special-purpose machine developed at Caltech.[7][8]

To improve its commercial viability, TMC launched the CM-2 in 1987, adding Weitek 3132 floating-point numeric coprocessors and more RAM to the system. Thirty-two of the original one-bit processors shared each numeric processor. The CM-2 can be configured with up to 512 MB of RAM, and a redundant array of independent disks (RAID) hard disk system, called a DataVault, of up to 25 GB. Two later variants of the CM-2 were also produced, the smaller CM-2a with either 4096 or 8192 single-bit processors, and the faster CM-200.

The light panels of FROSTBURG, a CM-5, on display at the National Cryptologic Museum. The panels were used to check the usage of the processing nodes, and to run diagnostics.

Due to its origins in AI research, the software for the CM-1/2/200 single-bit processor was influenced by the Lisp programming language and a version of Common Lisp, *Lisp (spoken: Star-Lisp), was implemented on the CM-1. Other early languages included Karl Sims' IK and Cliff Lasser's URDU. Much system utility software for the CM-1/2 was written in *Lisp. Many applications for the CM-2, however, were written in C*, a data-parallel superset of ANSI C.

With the CM-5, announced in 1991, TMC switched from the CM-2's hypercubic architecture of simple processors to a new and different multiple instruction, multiple data (MIMD) architecture based on a fat tree network of reduced instruction set computing (RISC) SPARC processors. To make programming easier, it was made to simulate a SIMD design. The later CM-5E replaces the SPARC processors with faster SuperSPARCs. A CM-5 was the fastest computer in the world in 1993 according to the TOP500 list, running 1024 cores with Rpeak of 131.0 GFLOPS, and for several years many of the top 10 fastest computers were CM-5s.[9]

Visual design

[edit]
The CM-5 LED panels could show randomly generated moving patterns that served purely as eye candy, as seen in Jurassic Park.

Connection Machines were noted for their striking visual design. The CM-1 and CM-2 design teams were led by Tamiko Thiel.[10] The physical form of the CM-1, CM-2, and CM-200 chassis was a cube-of-cubes, referencing the machine's internal 12-dimensional hypercube network, with the red light-emitting diodes (LEDs), by default indicating the processor status, visible through the doors of each cube.

By default, when a processor is executing an instruction, its LED is on. In a SIMD program, the goal is to have as many processors as possible working the program at the same time – indicated by having all LEDs being steady on. Those unfamiliar with the use of the LEDs wanted to see the LEDs blink – or even spell out messages to visitors. The result is that finished programs often have superfluous operations to blink the LEDs.

The CM-5, in plan view, had a staircase-like shape, and also had large panels of red blinking LEDs. Prominent sculptor-architect Maya Lin contributed to the CM-5 design.[11]

Surviving examples

[edit]

Permanent exhibits

[edit]

Past exhibits, Museum collections

[edit]

Private collections

[edit]
  • As of 2007, a preserved CM-2a was owned by the Corestore, a type of online-only museum.[21]
[edit]

See also

[edit]

References

[edit]

Further reading

[edit]
[edit]
Revisions and contributorsEdit on WikipediaRead on Wikipedia

Connection Machine

View on Grokipedia
from Grokipedia
The Connection Machine was a groundbreaking series of supercomputers developed by , designed to enable high-speed processing through thousands of interconnected simple processors, primarily for and scientific computing applications. Founded in 1983 by , who drew from his MIT PhD thesis on parallel architectures inspired by neural networks, the project aimed to overcome the limitations of conventional von Neumann computers by integrating memory and processing in fine-grained, concurrent units. The initial model, the CM-1, launched in 1986 with up to 65,536 one-bit processors organized in a 12-dimensional network, each processor equipped with 4,096 bits of memory and controlled via a (SIMD) paradigm. Subsequent iterations expanded capabilities: the CM-2 (1987) enhanced performance to 6 gigaflops with added floating-point units and 256 megawords of across 65,536 processors, while the CM-5 (1991) shifted toward a hybrid SIMD/MIMD design using up to 1,056 SPARC-based vector processors, each with 32 MB of RAM, for greater in tasks like climate modeling and genetic mapping. These machines featured innovative elements like programmable communication topologies and virtual processors, allowing efficient handling of data-parallel problems such as image processing, , and inference. Though influential in advancing —contributing to real-time applications like stock trading simulations and collaborations with figures such as —the company faced financial challenges amid shifting supercomputing priorities, filing for in 1994 after U.S. government funding cuts post-Cold War. The Connection Machine's legacy endures in modern GPU architectures and distributed systems, demonstrating the viability of massive parallelism for complex computations.

Origins and Development

Invention and Conceptual Foundations

The Connection Machine emerged from W. Daniel Hillis's doctoral research at the Massachusetts Institute of Technology (MIT) Artificial Intelligence Laboratory, conducted between 1981 and 1985. As part of his PhD thesis, submitted on May 3, 1985, Hillis proposed a novel architecture designed to address limitations in traditional von Neumann systems for tasks. This work focused on creating a fine-grained, concurrent machine that integrated processing and memory in each computational cell, allowing for massive parallelism to simulate complex phenomena beyond the reach of sequential computers. Hillis drew key inspirations from cellular automata and , recognizing their potential for distributed computation and emergent behaviors. Cellular automata, as explored in works like Stephen Wolfram's 1984 studies on universal computation through simple local rules with non-local interactions, informed the architecture's emphasis on concurrent operations across a grid of cells. Similarly, models, such as John Hopfield's 1982 framework for physical systems exhibiting collective computational abilities and Marvin Minsky's 1979 concepts assigning one processor per idea or node, shaped the vision of a brain-like system where each processor represented a basic unit of information or state. These influences motivated the design to prioritize adaptability through virtual processors and programmer-defined cell granularities, enabling efficient modeling of interconnected systems. In spring 1983, Hillis discussed his ideas for a scalable parallel architecture with during a lunch meeting, where Feynman initially dismissed the concept of a million-processor as "positively the dopiest idea" he had heard but soon engaged deeply in exploring its feasibility. These conversations centered on mimicking brain-like connections through structures, drawing parallels to neural simulations and emphasizing efficient routing for inter-processor communication to achieve . Feynman's insights into partial differential equations for network analysis further refined the theoretical underpinnings, highlighting the need for balanced connectivity in large-scale systems. At its core, the Connection Machine was conceptualized as a (SIMD) system comprising up to 65,536 simple processors, each capable of independent local computation while synchronized for global operations. This design targeted AI challenges such as in image processing and dynamic simulations of VLSI circuits or semantic networks, where sequential machines faltered due to the von Neumann bottleneck. Early theoretical sketches incorporated a topology—a n-cube interconnection network with a diameter of 12—allowing processors to connect via binary address differences for low-latency messaging, influenced by D. W. Thompson's 1978 work on efficient graph structures. The architecture was first prototyped in 1985, validating these concepts through a functional 16K-processor .

Founding of Thinking Machines Corporation

Thinking Machines Corporation was incorporated in May 1983 in Waltham, Massachusetts, by W. Daniel "Danny" Hillis and Sheryl Handler, with key involvement from AI pioneer Marvin Minsky, drawing its initial team from affiliates of the MIT Artificial Intelligence Laboratory where Hillis had developed his doctoral thesis on massively parallel computing. Hillis, a graduate student at MIT, envisioned the company as a vehicle to realize his concept of a "Connection Machine" capable of simulating brain-like processes through thousands of interconnected processors. The company secured approximately $16 million in early seed funding from private investors, including CBS founder , who was persuaded by pitches from Hillis, Minsky, and Handler despite the absence of a formal . This capital supported initial operations in a rundown mansion in Waltham, but the team relocated to the in , in the summer of 1984 to accommodate growth. In 1984, the company also received $4.5 million from the (DARPA) as government grant funding to develop the first prototype of its parallel supercomputer. Hillis assumed the role of chief designer, focusing on the technical architecture, while Handler served as president and CEO, managing operations, funding, and the company's emphasis on hardware tailored for applications. The founding team's primary goal was to commercialize supercomputers for sale to research institutions and AI developers, aiming to create tools that could handle complex simulations and advance machine intelligence beyond conventional paradigms.

Key Milestones and Challenges

The first prototype of the , featuring 16,000 processors, was demonstrated at MIT in May 1985, marking an early validation of the architecture concept. This demonstration highlighted the system's potential for handling AI and tasks through SIMD processing, though it was limited in scale compared to later models. In April 1986, commercially released the CM-1, the first full-scale version with up to 65,536 one-bit processors, targeting scientific computing and AI applications. The following year, in April 1987, the company launched the CM-2, which retained the core structure but added dedicated floating-point units via Weitek chips, enabling more efficient numerical computations and broadening its appeal for physics simulations and data processing. The CM-5 was introduced in October 1991 as a scalable MIMD system, departing from prior SIMD designs to support more flexible across thousands of nodes, each with SPARC-based vector units. Sales peaked in the early 1990s, with notable installations including a 1,024-node CM-5 at for nuclear simulations and a 16,000-processor CM-2 at Ames for research in . Development faced significant challenges, including high system costs ranging from $5 million for basic configurations to $20 million or more for large-scale deployments, which limited adoption to well-funded institutions. Manufacturing delays arose from redesigns of custom VLSI processor chips in late 1985 and early 1986, pushing back full production timelines. Intense competition from established players like Research and , who offered more mature vector and scalable systems at competitive prices, eroded amid shifting demand toward commodity clusters. These pressures culminated in Thinking Machines filing for Chapter 11 in August 1994, after reporting substantial losses and reduced government funding. Following the bankruptcy, the company's assets were reorganized, with Sun Microsystems acquiring its GlobalWorks parallel software intellectual property in November 1996 to integrate into its high-performance computing tools.

System Models and Architecture

CM-1: Initial SIMD Design

The Connection Machine CM-1, introduced in 1985, represented a pioneering implementation of massively parallel computing through its Single Instruction Multiple Data (SIMD) architecture. This design enabled a single instruction stream to be broadcast simultaneously to up to 65,536 one-bit processors, each performing operations in lockstep on local data, thereby exploiting massive concurrency for tasks amenable to uniform processing. The processors were organized into custom VLSI chips, with each chip housing 16 processor/memory cells and a dedicated router, resulting in a total of 4,096 such chips for the fully configured system. This SIMD paradigm was particularly suited for applications involving simple, data-parallel operations, such as image processing where one processor could handle each pixel in an array, facilitating efficient computations like convolutions on large grids (e.g., a 1,000 by 1,000 image). At the heart of the CM-1's interconnectivity was a 12-dimensional , connecting the processors via a packet-switched network of 4,096 router chips that supported with adaptive routing and buffering to minimize contention. Each router featured seven buffers and facilitated bidirectional communication across 24,576 wires, allowing processors to exchange data efficiently in a n-cube structure. Memory was distributed locally, with 4,096 bits (512 bytes) per processor, yielding a total capacity of 256 megabits (32 megabytes) in the maximum configuration. The system's performance emphasized high-throughput bit-level operations, achieving a peak rate of 2,000 MIPS for 32-bit integer arithmetic through serial processing, alongside sustained inter-processor bandwidth of ~3 gigabits per second for typical router communications. The CM-1 relied on a front-end host computer to manage instruction issuance and data I/O, typically interfaced with machines such as the 3600 series, which served as the primary control station for programming and oversight. These front-ends translated high-level commands into sequences broadcast to the parallel unit, treating the CM-1 as an extended memory resource. Sun workstations could also function in this role for certain setups, providing flexibility in integration with existing computational environments. This architecture laid the groundwork for subsequent enhancements, such as the CM-2 released in 1987, which built upon the same foundational SIMD framework.

CM-2: Enhanced Processing Capabilities

The Connection Machine CM-2, released in , represented a significant evolution from its predecessor by incorporating enhanced numerical capabilities while maintaining the core SIMD architecture. This model introduced optional Weitek 3132 floating-point coprocessors, each handling 32-bit operations, which enabled the system to achieve a peak performance of up to 4 GFLOPS for single-precision operations or 2.5 GFLOPS for double-precision with the accelerators. These coprocessors addressed the limitations of the CM-1's integer-only , allowing for more efficient handling of complex computations in scientific applications. The CM-2 retained the interconnection network from the CM-1 for processor communication but expanded the overall system's to support up to processors. The hybrid SIMD design of the CM-2 featured a scalar front-end processor that orchestrated instructions for , enabling seamless integration with conventional environments. This proved particularly suited for simulations demanding high precision, such as , where the floating-point units facilitated rapid evaluation of differential equations across vast datasets. In practice, the Weitek coprocessors operated in with the 1-bit processors, boosting throughput for vectorized operations without altering the fundamental data-parallel . Performance benchmarks demonstrated sustained rates approaching 1 GFLOPS in optimized fluid flow models, underscoring the CM-2's utility in . Memory capacity was substantially expanded in the CM-2, with 8 KB (64 Kbits) available per processor, yielding a total of up to 512 MB across the full configuration. This increase supported larger problem sizes compared to earlier models, accommodating intricate datasets for parallel processing. Additionally, optional DataVaults provided up to 80 GB of external , utilizing a RAID-like of disk units with transfer rates exceeding 300 MB/s when striped across multiple channels. These storage enhancements enabled efficient data staging for memory-intensive tasks, such as iterative simulations in . A distinctive feature of the CM-2 was its front-mounted 64x64 color LED panels, which served as a real-time visualization tool for monitoring processor states and diagnostic information. Each LED cluster represented subsets of the processor array, allowing operators to observe activity patterns, such as active virtual processors or communication bottlenecks, through dynamic color-coded displays. This hardware innovation not only aided but also provided an intuitive interface for understanding parallel execution dynamics in applications like precision simulations.

CM-5: Shift to MIMD Scalability

The Connection Machine CM-5, publicly announced in October 1991, marked a pivotal evolution in Thinking Machines Corporation's supercomputing lineup by transitioning from the SIMD architecture of prior models to a MIMD design, enabling greater flexibility for irregular and branching-heavy workloads that challenged earlier hypercube-based systems. This shift incorporated processing nodes, each augmented by up to four custom vector units providing 160 MFLOPS peak per node, with configurations supporting up to 1,024 processing nodes in standard setups and scalable to 16,384 nodes via a fat-tree interconnection network. The MIMD approach allowed independent instruction execution across nodes, broadening applicability to diverse computational domains beyond strictly uniform operations. The CM-5 is designed for high performance in large data-intensive applications, scaling to teraflops, with -based nodes and two networks. It combines SIMD efficiency for data-parallel tasks via vector units with MIMD flexibility. Performance benchmarks underscored the CM-5's , achieving up to 1 TFLOPS in fully configured systems equipped with vector units, while total capacity reached 64 GB across 1,024 nodes (32 or 128 MB per node with vector units). The system's modular "staircase" cabinet design facilitated incremental expansion, housing processing nodes, I/O units, and storage in a compact, partitionable form factor that supported dynamic reconfiguration for varying workload demands. with CM-2 software was ensured through recompilation of programs and integration via CMIO bus devices, allowing minimal modifications for legacy applications to run on the new . In 1993, the CM-5 demonstrated its prowess by topping the inaugural supercomputer list, with a 1,024-node installation at delivering 59.7 GFLOPS on the LINPACK benchmark; similarly, the NSA's FROSTBURG CM-5 system, upgraded to 512 nodes, attained a peak performance of 65.5 GFLOPS, highlighting the model's real-world impact on .

Technical Specifications

Processor and Memory Systems

The Connection Machine series utilized a distributed processing architecture, evolving from simple bit-serial units to more sophisticated scalar and vector processors across its models. The CM-1 featured 65,536 custom 1-bit arithmetic logic units (ALUs) designed for single-instruction multiple-data (SIMD) operations, enabling massive parallelism for data-intensive tasks. In the CM-2, processing capabilities advanced with the addition of Weitek 3132 floating-point units, providing 32-bit precision shared among groups of 32 processors to accelerate numerical computations. The CM-5 shifted toward multiple-instruction multiple-data (MIMD) scalability, incorporating SPARC RISC processors in each node alongside optional vector units capable of 64-bit floating-point and integer operations at up to 160 Mflops per node. Memory systems in the Connection Machines were strictly distributed, with no shared global address space, requiring message passing for inter-processor communication. Early models like the CM-1 and CM-2 allocated 0.5 to 128 KB of static RAM (SRAM) per processor, with the CM-1 fixed at 4 Kbits (0.5 KB) and the CM-2 configurable in 8 KB, 32 KB, or 128 KB options, supporting local data storage for virtual processor emulation and efficient SIMD access patterns. The CM-5 expanded this to up to 128 MB of dynamic RAM (DRAM) per processing node, organized in four ECC-protected banks with a 64 KB cache, allowing for larger datasets in MIMD environments while maintaining distributed locality. Power and cooling demands reflected the dense integration of these systems. The CM-1 and CM-2 required approximately 100 kW of power and employed liquid cooling with to manage heat from thousands of processors packed into a single cabinet. The CM-5 improved efficiency, drawing about 50 kW per cabinet through air-cooled designs and optimized node layouts, reducing overall thermal challenges for scalable configurations. Custom application-specific integrated circuits () were integral for and communication. Router chips, implemented in semicustom ASIC technology, facilitated among processor groups, while sequencer chips managed instruction streams and barrier across the . The in the is (N/2) × link speed, where N is the number of nodes; for a 12-dimensional (N=4,096) with 1 Mbit/s per link, this provides 2 Gbit/s aggregate bandwidth, supporting efficient parallel data movement at scales of thousands of processors.

Interconnection Networks and Routing

The Connection Machine systems employed distinct interconnection networks tailored to their architectural paradigms, enabling efficient data exchange among thousands of processors. In the CM-1 and CM-2 models, the network utilized a hypercube topology, forming a multidimensional cube where each processor node connected directly to 12 neighbors in a 12-dimensional configuration for the fully populated CM-1 with 4,096 processor chips, or up to 16 dimensions in the CM-2 to accommodate virtual processor geometries and scalability to 65,536 processors. This structure ensured short paths between nodes, with the network diameter given by the equation D=log⁡2ND = \log_2 N where NN represents the number of processors, minimizing the maximum hops required for communication in a fully connected hypercube. Routing in the CM-1 and CM-2 hypercube networks relied on a wormhole algorithm, which pipelined messages across dimensions for low-latency transmission by advancing packet headers without buffering the entire message at intermediate nodes, thereby achieving high wire utilization even under contention. Each processor integrated dedicated routing hardware, comprising 13 custom VLSI chips that handled packet switching, address decoding, and message combining operations such as bitwise OR or summation during traversal. Error detection was incorporated via parity bits appended to cube addresses, processor addresses, and data fields, with inversion on wire crossings to flag single-bit errors reliably. For short messages, this setup delivered latencies around 10 μs, supporting the SIMD parallel processing demands of the early models. In contrast, the CM-5 shifted to a MIMD architecture with a fat-tree interconnection network, a hierarchical featuring bidirectional links that fanned out from leaf nodes (processing elements and I/O) to internal routers, scaling efficiently to 16,384 nodes or more. Each processing node connected via two 20 MB/s links, providing 40 MB/s aggregate bandwidth, while internal router chips supported four child and up to four parent connections, with bandwidth doubling at each level toward the root to prevent bottlenecks. This design achieved scaling as O(Nlog⁡N)O(N \log N), where NN is the node count—for instance, 10 GB/s in a 2,048-node —enabling collective operations across thousands of nodes without disproportionate slowdown. CM-5 routers employed pseudorandom load balancing for path selection, messages upward to their least common ancestor before descending, with cut-through switching to minimize . Error handling utilized cyclic redundancy checks (CRC) on packets, supplemented by primary and secondary fault signaling to isolate defective links or nodes, allowing reconfiguration with minimal capacity loss (at most 6% of the network). Short-message latencies ranged from 3 to 7 μs, reflecting the network's optimization for scalable, hardware-efficient supercomputing.

Software Environment and Programming

The software environment for the Connection Machine (CM) series was designed to leverage its architecture, providing high-level abstractions for data-parallel and message-passing programming while integrating with front-end workstations running systems. For the CM-1 and CM-2 models, which employed a single-instruction multiple-data (SIMD) , the primary programming language was *, a dialect extending with parallel variables known as pvars. These pvars represented distributed data fields across up to 65,536 processors, enabling fine-grained parallel symbolic processing without explicit loop management. *Lisp supported processor selection via macros such as *all and *when, which activated subsets of processors for conditional operations, and included functions like pref!! for inter-processor communication. To access lower-level control, *Lisp integrated the library, the Connection Machine's Parallel Instruction Set, functioning as an assembly-like for direct hardware instructions. calls could be embedded in *Lisp code using functions like pvar-location to obtain memory addresses, allowing optimized routines for tasks requiring precise synchronization. This combination facilitated AI and symbolic applications by abstracting the underlying SIMD hardware into a unified virtual processor model, where programmers treated the of physical processors as a single, scalable entity. The CM-1 and CM-2 ran under the Connection Machine Operating System (), a custom system that managed processor firmware and front-end interactions via a host workstation. Processor firmware handled low-level SIMD execution, including instruction decoding and news propagation for , while oversaw system configuration, memory allocation, and I/O routing. relied on visual tools, including front-panel LED arrays that displayed processor states—such as activity or errors—allowing real-time visualization of parallel execution patterns across the processor grid. For the CM-5, which shifted to a multiple-instruction multiple-data (MIMD) model with scalable vector units, the software stack emphasized message-passing and data-parallel paradigms, front-ended by Unix workstations. Programming occurred through CMMD, a C-based message-passing library providing synchronous and asynchronous communication primitives for node-level coordination, callable from C, Fortran, and C++ environments. CM Fortran, an extension of Fortran 90, introduced data-parallel features like array sections, elemental operations, and grid communication intrinsics (e.g., CSHIFT for shifts along processor axes), simplifying vectorized computations. Similarly, C* extended ANSI C with parallel constructs such as dynamic shapes and the with statement for scoping parallel data regions, enabling seamless integration of sequential and parallel code. These tools abstracted the CM-5's node processors into virtual units, reducing the complexity of explicit MIMD synchronization. The CM-5 operated under CMOST, an enhanced UNIX variant (based on ) that supported , batch jobs, and resource partitioning across control processors and I/O nodes. Firmware on processing nodes included a for task scheduling and for diagnostics, with system management handled by SPARC-based partition managers. Debugging tools like Prism provided graphical breakpoints and variable inspection for data-parallel code, complemented by hardware-level error logging via the diagnostic network.

Applications and Usage

Scientific and Computational Uses

The Connection Machine systems, particularly the CM-1 and CM-2 models, were employed in physics simulations for lattice (QCD) calculations, enabling large-scale computations of particle interactions through their SIMD architecture. At institutions like Caltech during the late and early , these machines supported QCD simulations, achieving performance levels around 1 GFLOPS for modeling quark-gluon dynamics on discrete space-time grids. Such applications leveraged the CM-2's distributed-memory design to handle the intensive matrix operations required for propagators and gauge field updates, providing a scalable alternative to vector supercomputers for hadronic property predictions. In and modeling, installations utilized Connection Machines for (CFD) simulations, processing vast datasets to model aerodynamic flows and atmospheric phenomena. The CM-2, installed at in 1988, facilitated data-parallel finite element methods for solving the Navier-Stokes equations, enabling runs on grids up to 5 million points for high-resolution and pattern analyses. These efforts demonstrated the machine's efficacy in handling irregular geometries and adaptive meshing, with upgrades to the system supporting enhanced vectorizable algorithms for particle simulations and multi-grid solvers. For image processing tasks, the Connection Machine excelled in data analysis at , applying SIMD operations for pixel-parallel manipulations of large raster datasets. Researchers used the CM-2 to perform filtering, , and geometric corrections on high-volume imagery from satellites, exploiting the machine's processors to achieve near-real-time processing of multi-spectral arrays. This approach was particularly suited to handling the repetitive, data-intensive nature of , where each processor could independently operate on individual pixels or voxels. Benchmark evaluations underscored the Connection Machine's prowess in high-performance computing, with the CM-5 achieving the top ranking on the inaugural list in June 1993 based on LINPACK performance. A 1,024-node CM-5 at Los Alamos delivered 59.7 GFLOPS on the LINPACK benchmark, surpassing competitors and highlighting its scalability for dense linear algebra in scientific workloads. This result established the CM-5 as a benchmark for parallel systems in numerical simulations, influencing subsequent designs for grand challenge problems in physics and engineering.

Artificial Intelligence Implementations

The Connection Machine significantly advanced by leveraging its massively parallel architecture for computationally intensive AI paradigms, particularly training and symbolic processing. Early models like the CM-2 excelled in simulating large-scale through , enabling tasks that involved thousands of neurons. For example, implementations on the CM-2 achieved up to 500 times the performance of a VAX 780 for training connectionist models like NETtalk, a network with over 13,000 links, by distributing computations across 16,384 processors. These efforts demonstrated the machine's suitability for and recurrent neural architectures, processing visual and auditory patterns at scales infeasible on sequential hardware. In symbolic AI, the Connection Machine supported LISP-based expert systems, especially at MIT, where Connection Machine Lisp (CmLisp) facilitated parallel operations on large knowledge structures for natural language parsing. CmLisp extended Common Lisp with parallel data structures like xectors, allowing efficient handling of 200,000 to 1 million cons cells for graph-based representations in expert systems, such as semantic networks for medical diagnosis. Researchers applied relaxation networks to enable massively parallel interpretation of natural language, processing ambiguous inputs through iterative constraint satisfaction across thousands of processors. This approach supported symbolic reasoning tasks, including parsing and inference, by dynamically adjusting connections in knowledge graphs. However, the SIMD design of the CM-1 and CM-2 faced limitations in handling irregular AI tasks, such as those with variable data dependencies or asynchronous operations, often resulting in idle processors and communication bottlenecks.

Notable Projects and Users

The Connection Machine systems found widespread adoption in academic and institutions during the late 1980s and early 1990s, with approximately 35 CM-2 units installed overall, more than 20 of which were at universities including Caltech, , the at Berkeley, and . These installations supported advanced computational in fields requiring massive parallelism, such as simulations and . A 1024-node CM-5 achieved 61 gigaflops in solving the Boltzmann equation for plasma physics applications, as demonstrated by researchers at Pennsylvania State University. The U.S. Defense Advanced Research Projects Agency (DARPA) funded development of the Connection Machine through its Strategic Computing Program from 1983 to 1993, with specific contracts between 1985 and 1990 supporting AI research on vision systems for autonomous vehicles and related real-time processing. Commercial adoption was limited due to high costs, though about a dozen early systems entered non-academic use by 1987 for specialized parallel computing needs.

Legacy and Impact

Influence on Parallel Computing

The Connection Machine pioneered massive parallelism through its use of simple, replicated processor arrays—up to 65,536 single-bit processors in the CM-2 model—operating under a SIMD paradigm to handle data-parallel computations efficiently. This architecture demonstrated that vast numbers of inexpensive processing elements could achieve supercomputing speeds, influencing the evolution of affordable parallel systems like Beowulf clusters, which leveraged commodity hardware and networks to replicate similar scalability in the mid-1990s. Similarly, the Connection Machine's emphasis on massive SIMD execution foreshadowed modern GPU computing, where thousands of cores perform synchronized operations on arrays for tasks ranging from graphics rendering to machine learning, highlighting the enduring value of data-parallel designs over sequential von Neumann models. Key architectural innovations in the Connection Machine, such as the interconnection network in the CM-1 and CM-2, enabled low-latency, scalable communication among processors, setting precedents for distributed-memory systems and contributing to the foundational concepts in message-passing standards like MPI, where hypercube mappings optimize collective operations. The shift to a fat-tree network in the CM-5 further advanced this by providing full and non-blocking , innovations that directly informed the design of high-radix topologies in contemporary supercomputers and data centers, ensuring efficient all-to-all communication at exascale levels. These networks, combined with user-level access and parallel I/O, inspired enduring algorithmic frameworks, including the LogP performance model for latency-bound systems and work-stealing schedulers for load balancing. The Connection Machine also demonstrated the economic and practical viability of non-von Neumann architectures in 1990s supercomputing, where its data-parallel model bypassed sequential bottlenecks to deliver teraflop-scale performance using VLSI-replicable hardware. Assessments from the era noted its scalability to over 10,000 processors at costs of $1–10 million, making massively parallel systems competitive with vector machines like Crays and spurring investment in alternative paradigms for irregular workloads. This shift encouraged novel algorithms for scans, reductions, and remote references, as the machine's design proved that homogeneous, connection-oriented processing could economically address grand-challenge problems in science and engineering. W. Daniel Hillis received the ACM Grace Murray Hopper Award in 1989 for the conception, design, implementation, and commercialization of the Connection Machine, recognizing its transformative role in parallel computing.

Company Decline and Aftermath

In the early 1990s, encountered severe financial pressures as the supercomputing industry shifted toward cost-effective commodity cluster systems, such as clusters built from off-the-shelf processors, which eroded demand for proprietary architectures like the Connection Machine. This transition, coupled with declining government funding for specialized hardware, exacerbated the company's challenges; by 1993, it recorded a net loss of $20 million on revenues of $82 million, its last profitable year having been 1990 with $1 million in earnings on $65 million in sales. On August 15, 1994, Thinking Machines filed for Chapter 11 protection to reorganize amid mounting debts and operational strains, including ongoing lease obligations for its facility. The filing prompted immediate layoffs of 140 employees—about one-third of its 425-person workforce—with additional reductions anticipated as the company pivoted away from hardware manufacturing to focus solely on software products like tools and parallel programming environments. President Richard Fishman resigned shortly after the announcement, and the firm sought buyers or licensees for its patents and to stabilize operations. Thinking Machines emerged from bankruptcy in February 1996 following court approval of its reorganization plan and a $10 million capital infusion from investors, allowing it to continue as a software-centric entity. That November, Sun Microsystems acquired the company's GlobalWorks division, encompassing parallelizing compilers and development tools for high-performance computing. Founder and chief scientist W. Daniel Hillis departed in May 1996 to join Walt Disney Imagineering as vice president of research and development and the first Disney Fellow, while longtime president Sheryl Handler left around the same period to establish Ab Initio Software, a data management firm staffed by former Thinking Machines engineers. The remnants of the company persisted in data mining until June 1999, when Oracle Corporation purchased its assets and technology to enhance parallel processing capabilities in database applications.

Modern Relevance and Emulation Efforts

The Connection Machine's emphasis on , fine-grained processing has influenced modern hardware, particularly in simulating neural networks at scale. , the machine's inventor, designed it to emulate interconnected networks for , inspired by the brain's structure of simple, parallel components. In a 2016 , Hillis linked this vision to contemporary AI, noting that advancements in GPUs and have realized the Connection Machine's goals by enabling neural networks thousands of times more powerful for tasks like face recognition. Emulation projects in the 2020s have preserved and extended the Connection Machine's architecture for research into parallel computing. At the University of Oxford, developers created libcm, a cycle-accurate C-based simulator of the CM-1 model, which replicates its 65,536 one-bit processors and 12-dimensional hypercube topology. Accompanying Verilog RTL code supports hardware emulation on FPGAs, allowing evaluation of original programs. While benchmarks revealed inefficiencies in tensor operations—such as 700-cycle latency for vector dot products—the emulator demonstrates strengths in unstructured parallel tasks like breadth-first search, suggesting viability for larger-scale AI applications with modern enhancements.

Surviving Examples and Cultural References

Museum and Exhibit Collections

The Computer History Museum in Mountain View, California, houses one of the earliest Connection Machine systems, a CM-1 model introduced in 1985, which is on permanent display in its Revolution exhibit on supercomputers. This artifact, cataloged as X1124.93, represents the pioneering massively parallel architecture developed by Thinking Machines Corporation, featuring 16,384 one-bit processors with associated LEDs for visual feedback during computations. The museum's exhibit emphasizes the machine's role in advancing parallel processing for artificial intelligence and scientific simulations, allowing visitors to contextualize its historical significance alongside other supercomputing milestones. The (MoMA) in New York maintains a CM-2 system from 1987 in its permanent collection, acquired around 2016 to highlight the intersection of computing design and aesthetics. This model, known for its distinctive black cabinet and programmable LED array facade, was featured in MoMA's 2017–2018 exhibition "Thinking Machines: Art and Design in the Computer Age, 1959–1989," where it underscored the visual and conceptual innovations in . The exhibit drew on the machine's original design intent to evoke biological neural networks, positioning it as both a technological and artistic artifact. The Mimms Museum of Technology and Art in Roswell, Georgia, displays a complete CM-2 system from 1987, including its accompanying DataVault storage unit, as part of its extensive supercomputing collection. Acquired through private donation and restoration, this example features operational LED arrays that simulate computational activity, providing an interactive glimpse into the machine's iconic "thinking lights" interface. The museum's presentation integrates the CM-2 within a broader narrative of digital innovation, showcasing over 70 supercomputers to illustrate the evolution of high-performance computing. Restoration efforts for surviving Connection Machines have focused on reviving their visual and functional elements, particularly the LED displays that originally indicated processor activity. At the Mimms Museum, conservators expanded a partial CM-2 configuration with a custom card cage and backplane to enable programmable LED operations, supported by a donation from the Amara Foundation. These initiatives ensure that public exhibits not only preserve the hardware but also demonstrate the machines' dynamic operation, enhancing educational outreach on parallel computing history.

Private Holdings and Replicas

Replicas of the Connection Machine have been developed by hobbyists to recreate its architecture without relying on scarce original hardware. A prominent effort includes a Verilog RTL description of the CM chip from a 2023 Oxford University project, enabling the construction of functional replicas on modern field-programmable gate arrays (FPGAs) with minimal modifications to simulate the original 16-processor-per-chip configuration. Additionally, a GitHub project provides a 3D emulator for the Connection Machine's LED matrix, allowing visualization of the iconic "thinking lights." These replicas emphasize educational and demonstrative purposes, often focusing on the machine's parallel processing paradigm rather than full-scale performance replication. The overall condition of surviving Connection Machines in private hands is precarious, with many units non-functional due to obsolete custom chips and lack of support infrastructure from the defunct manufacturer. Only a few complete units are known to persist worldwide, underscoring the rarity and preservation challenges for these artifacts outside institutional settings. The Connection Machine has been portrayed in film as an emblem of futuristic computing power. In the 1993 film Jurassic Park, directed by Steven Spielberg, a Thinking Machines CM-5 supercomputer appears as a key prop in the island's central control room. The machine powers simulations of dinosaur DNA sequences, park security systems, and operational functions like rides and communications, underscoring the theme of technology enabling ambitious bioengineering. Although Michael Crichton's original novel described a Cray X-MP supercomputer, the production team selected the visually dramatic CM-5 for its array of colorful LED lights and scalable architecture; mirrors were used to double its apparent size on screen, enhancing its imposing presence. In music, the Connection Machine inspired the title track of industrial electronic group Clock DVA's 1989 single and inclusion on their album Buried Dreams. The song explores themes of interconnected networks and parallel processing through dense, rhythmic electronics and sampled audio, mirroring the machine's conceptual foundation in massively parallel computation as a metaphor for complex, emergent systems in human and technological domains. Released via Wax Trax! Records, the track captured the late-1980s zeitgeist of cybernetic optimism and industrial experimentation with machine intelligence. The distinctive pyramidal design and illuminated panels of the Connection Machine have influenced visual aesthetics in video games, serving as inspiration for retro-futuristic computer interfaces. In (2008), the game's ubiquitous terminals evoke the era's bulky, monolithic hardware with their green-glow screens and mechanical housings, symbolizing pre-war technological hubris in a post-apocalyptic setting. Similarly, (2020) incorporates elements reminiscent of the CM-5's cube-like mainframes in hidden , such as the church-based computer arrays tied to ARG-style puzzles, reinforcing tropes of corporate AI and networked dystopias. In literature, Neal Stephenson's novels reference the Connection Machine as an icon of computing ambition. In Cryptonomicon (1999), it symbolizes the blend of raw computational power and aesthetic spectacle through descriptions of its blinking lights and parallel architecture, evoking the era's blend of scientific promise and speculative excess in and .

References

  1. https://www.computerhistory.org/revolution/supercomputers/10/73
  2. https://dspace.mit.edu/bitstream/handle/1721.1/14719/18524280-MIT.pdf
  3. https://www.sciencedirect.com/topics/computer-science/connection-machine
  4. https://tamikothiel.com/theory/cm_txts/
  5. https://physicstoday.aip.org/features/richard-feynman-and-the-connection-machine
  6. https://pages.cs.wisc.edu/~markhill/restricted/computer88_cm2.pdf
  7. http://www.bitsavers.org/pdf/thinkingMachines/The_Rise_and_Fall_of_Thinking_Machines_1995.pdf
  8. https://www.inc.com/magazine/19950915/2622.html
  9. https://www.technologyreview.com/2006/11/01/227633/thinking-machines/
  10. https://www.computerworld.com/article/1586876/timeline-sputnik-and-three-decades-of-darpa-hegemony.html
  11. https://www.computerhistory.org/brochures/t-z/thinking-machines-corporation-tmc/
  12. https://top500.org/resources/top-systems/cm-5-los-alamos-national-lab/
  13. https://ntrs.nasa.gov/api/citations/20120016743/downloads/20120016743.pdf
  14. https://www.nytimes.com/1994/08/16/business/company-news-thinking-machines-to-file-for-bankruptcy.html
  15. https://www.edn.com/sun-microsystems-announces-agreement-to-purchase-thinking-machines-globalworks-assets/
  16. http://bitsavers.informatik.uni-stuttgart.de/pdf/thinkingMachines/CM2/HA87-4_Connection_Machine_Model_CM-2_Technical_Summary_Apr1987.pdf
  17. https://www.computerworld.com/article/2576785/nsa-gets-thinking-machines-supercomputer.html
  18. http://www.bitsavers.org/pdf/thinkingMachines/CM5/The_Network_Architecture_of_the_Connection_Machine_CM-5_Nov1992.pdf
  19. https://people.csail.mit.edu/bradley/cm5docs/nov06/ConnectionMachineCM-5TechnicalSummary1993.pdf
  20. https://dl.acm.org/doi/10.1145/140901.141883
  21. https://top500.org/lists/top500/list/1993/06/
  22. https://www.researchgate.net/profile/Patrick-Van-Der-Smagt/publication/272832321_An_introduction_to_neural_networks/links/5808737a08ae63c48fec7f2f/An-introduction-to-neural-networks.pdf
  23. https://dl.acm.org/doi/pdf/10.1145/2686875
  24. https://dash.harvard.edu/bitstreams/7312037d-d59c-6bd4-e053-0100007fdf3b/download
  25. https://virmuze.com/m/crypto-museum/x/supercomputers/
  26. https://people.csail.mit.edu/bradley/cm5docs/KahleKuHi89.pdf
  27. https://link.springer.com/content/pdf/10.1007/978-1-4615-2856-2_4
  28. http://bitsavers.org/pdf/thinkingMachines/CM2/starLisp_Reference_Version_5.0_Sep1988.pdf
  29. https://people.csail.mit.edu/bradley/cm5docs/nov06/ConnectionMachineModelCM-2TechnicalSummary.pdf
  30. https://www.rcsri.org/library/tmc/Getting-Started-With-StarLisp.pdf
  31. https://rcsri.org/library/tmc/Unix-and-The-Connection-Machine-OS.pdf
  32. https://people.csail.mit.edu/bradley/cm5docs/CMMDUsersGuide.pdf
  33. http://www.1000bit.it/ad/bro/thinking/CM-5_Scale4_brochure.pdf
  34. https://authors.library.caltech.edu/records/xx9ew-dbe77/files/00555412.pdf
  35. https://www.sciencedirect.com/science/article/pii/0920563289901606/pdf?md5=ca8bf39ef336eb3406f6cf4f9f71b8c3&pid=1-s2.0-0920563289901606-main.pdf&_valck=1
  36. https://ntrs.nasa.gov/api/citations/20020051211/downloads/20020051211.pdf
  37. https://ntrs.nasa.gov/api/citations/19920001075/downloads/19920001075.pdf
  38. https://pure.psu.edu/en/publications/computational-fluid-dynamics-on-the-connection-machine
  39. https://permalink.lanl.gov/object/tr?what=info:lanl-repo/lareport/LA-UR-94-2608-01
  40. https://apps.dtic.mil/sti/tr/pdf/ADA230635.pdf
  41. https://top500.org/lists/top500/1993/06/
  42. https://www.ijcai.org/Proceedings/87-1/Papers/066.pdf
  43. https://proceedings.neurips.cc/paper/1989/hash/e3796ae838835da0b6f6ea37bcf8bcb7-Abstract.html
  44. https://ed-thelen.org/comp-hist/connection-machine.html
  45. https://thesis.library.caltech.edu/7649/
  46. https://www.princeton.edu/~ota/disk1/1991/9138/913806.PDF
  47. https://ftp.eecs.berkeley.edu/projects/parallel/cm5.html
  48. https://docs.rcc.fsu.edu/history/
  49. https://www.osti.gov/biblio/46249
  50. https://monoskop.org/images/d/d4/Roland_Alex_Shiman_Philip_Strategic_Computing_DARPA_and_the_Quest_for_Machine_Intelligence_1983-1993.pdf
  51. https://www.jstor.org/stable/24979406
  52. https://dl.acm.org/doi/10.1145/3558481.3591321
  53. https://ntrs.nasa.gov/api/citations/19910023487/downloads/19910023487.pdf
  54. https://awards.acm.org/award-recipients/hillis_4558874
  55. https://www.techmonitor.ai/technology/thinking_machines_to_be_dismembered_and_sold_in_pieces
  56. https://www.washingtonpost.com/archive/business/1994/08/16/thinking-machines-corp-to-file-for-reorganization/139a378a-8786-458c-9348-18070c6001e1/
  57. https://www.latimes.com/archives/la-xpm-1994-08-16-fi-27819-story.html
  58. https://www.hpcwire.com/1996/02/16/thinking-machines-emerges-from-bankruptcy-protection/
  59. https://www.hpcwire.com/1996/05/17/danny-hillis-named-first-member-of-disney-fellows-program/
  60. https://www.nytimes.com/1999/06/08/business/thinking-machines-purchased-by-oracle.html
  61. https://www.tamikothiel.com/cm/cmProject/DannyHillis_2016-08-23_CM-legacy_interviewTamikoThiel.pdf
  62. https://www.cs.ox.ac.uk/teaching/courses/projects/sample/3rdYear/Resurrecting%20Extinct%20Computers%20-%20The%20Connection%20Machine.pdf
  63. https://www.computerhistory.org/collections/catalog/X1124.93
  64. https://www.moma.org/calendar/exhibitions/3863
  65. https://mimmsmuseum.org/exhibits/
  66. https://icm.museum/blog/?p=15
  67. https://github.com/vince-d/cm-emulator
  68. https://www.starringthecomputer.com/appearance.html?f=11&c=15
  69. http://www.svisions.com/sv/cm-dv.html
  70. https://www.discogs.com/master/5439-CLOCKDVA-Buried-Dreams
  71. https://trouserpress.com/reviews/clock-dva/
Add your contribution
Related Hubs
Contribute something
User Avatar
No comments yet.