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Meteor Lake
Meteor Lake
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Meteor Lake
General information
LaunchedDecember 14, 2023 (2023-12-14)[1]
Marketed byIntel
Designed byIntel
Common manufacturers
CPUID codeA06A4h
Product code80723[2]
Performance
Max. CPU clock rateP-cores: 5.1 GHz
E-cores: 3.8 GHz
LP E-cores: 2.5 GHz
DMI speedsx8 16 GT/s
Cache
L1 cache112 KB per P-core:
  • 64 KB instructions
  • 48 KB data

96 KB per E-core and LP E-core:
  • 64 KB instructions
  • 32 KB data
L2 cache2 MB per P-core, E-core cluster and LP E-core cluster
L3 cacheUp to 24 MB
Architecture and classification
ApplicationMobile
Technology nodeIntel 4
TSMC N5
TSMC N6
Intel 22FFL
MicroarchitectureRedwood Cove (P-cores)
Crestmont (E-cores and LP E-cores)
Instruction setx86-64
Instructionsx86-64
Extensions
Physical specifications
Cores
  • 2–6 P-cores
    8 E-cores
    2 LP E-cores
Memory (RAM)
  • Up to 96 GB
  • Up to dual-channel DDR5-5600 (except 9 W models)
  • Up to dual-channel LPDDR5X-7467 (all models)
GPUIntel Arc
Packages
Sockets
Products, models, variants
Product code name
  • MTL
Models
  • Meteor Lake-H
  • Meteor Lake-U
  • Meteor Lake-HL
  • Meteor Lake-UL
Brand name
History
PredecessorsAlder Lake (embedded and 9 W fanless mobile)
Raptor Lake (15–45 W premium fanned mobile)
SuccessorsLunar Lake (low power ultralight)
Arrow Lake (performance thin & light)
Support status
Supported

Meteor Lake is the codename for Core Ultra Series 1 mobile processors, designed by Intel[3] and officially released on December 14, 2023.[4] It is the first generation of Intel mobile processors to use a chiplet architecture which means that the processor is a multi-chip module.[3] Meteor Lake's design effort was led by Tim Wilson.[5]

Background

[edit]

In July 2021, Meteor Lake was initially announced to be coming with a 5–125W TDP range for various segments ranging from ultra low power mobile to enthusiast desktop.[6] The initial tape-in process for Meteor Lake took place in May 2021. The CPU compute tile was confirmed to be fabricated on Intel's 7nm process (since rebranded to "Intel 4").[7]

In October 2021, Intel said in an earnings call that it had taped out the CPU compute tile for Meteor Lake and after it was received it had powered on within 30 minutes and with expected performance levels.[8] In April 2022, Intel announced that an assembled Meteor Lake mobile processor had been powered-on for the first time in a development milestone.[9][10]

In March 2023, it was reported that Intel had decided to cancel development of high-end Meteor Lake-S processors for desktop.[11] Meteor Lake-S processors were being designed to fit into the LGA 1851 socket, which is identical in dimensions to LGA 1700, but the cancellation of desktop Meteor Lake meant that the LGA 1851 socket wouldn't debut until Arrow Lake in 2024.[12] The top Meteor Lake-S SKU in development contained 6 Redwood Cove P-cores and 16 Crestmont E-cores, which is two fewer P-cores than the last generation Raptor Lake Core i9-13900K.

At Intel's Innovation event in September 2023, head of Intel's Client Computing Group Michelle Johnston Holthaus confirmed that some Meteor Lake-based processors would come to desktop in 2024. Intel later clarified that socketable desktop Meteor Lake processors would not be coming to the DIY market with the LGA 1851 socket.[13][14] Instead, Meteor Lake processors in a BGA package will be available on desktop in the form of compact all-in-one PCs.[15] A reason for this, according to a statement by Intel to ComputerBase, is that "Meteor Lake is a power efficient architecture that will power innovative mobile and desktop designs".[16]

Branding

[edit]

Intel unveiled new branding in June 2023 for upcoming Meteor Lake processors after using the same "Core i" branding for over 15 years. Core branding would be simplified by dropping the 'i' with processors branded Core 3, 5 and 7 instead.[17] The new 'Core Ultra' 5, 7 and 9 branding would be reserved for "premium" processors according to Intel.[18] In addition to the new tier naming, Intel said it would be de-emphasizing processor generations in marketing material, though the processor generation number would remain in the processor number.[19] Meteor Lake processors with Core Ultra branding are classified as first generation Core Ultra.

The new Core and Core Ultra branding was perceived as creating more branding confusion rather than reducing it.[20] Josh Loeffler of TechRadar wrote that "differentiation between Core and Core Ultra is also somewhat head-scratching, especially since there will at least be some overlap between the two brands" as Core 5 and Core 7 processors will exist alongside Core Ultra 5 and Core Ultra 7 processors.[21] In the view of Digital Trends, the new branding emulated AMD and Apple's naming conventions which amounted to Intel "chasing its competitors instead of leading the pack".[22]

Intel Core branding (2020–2023)
Core i3
Core i5
Core i7
Core i9
Intel Core and Core Ultra branding (since 2023)
Core 3
Core 5
Core 7
Core Ultra 5
Core Ultra 7
Core Ultra 9

Production

[edit]
Intel's production facility in Hillsboro, Oregon, where the D1D fabrication facility is located (April 2009)

In April 2023, Meteor Lake and its "Intel 4" process were reportedly ramping to production.[23] Production on Meteor Lake with Intel 4 wafers took place at Intel's D1D fabrication facility in Hillsboro, Oregon.[24] The D1D fabrication facility has a total output of 40,000 wafers a month.[25] Secondary source production for Meteor Lake takes place at Fab 34 in the Republic of Ireland.[26][27] On September 29, 2023, Intel announced that Intel 4 products, including Meteor Lake, had entered high-volume production at Fab 34 in the Republic of Ireland.[28] The GPU, System on a chip (SoC) and I/O extender tiles in Meteor Lake are manufactured by TSMC in Taiwan.

Unveiling and release

[edit]

Meteor Lake was revealed at Intel's Innovation event on September 19, 2023, with the announcement that 'Core Ultra' branded processors would be launching on December 14.[29] However, no list of Meteor Lake SKUs was revealed at Innovation nor release details on regular 'Core' branded processors.[30]

Architecture

[edit]

Packaging

[edit]

Meteor Lake is a 64-bit x86 CPU architecture designed around low power operation and increased power efficiency over Raptor Lake. It is the first Intel microarchitecture to utilize a disaggregated multi-chip module (MCM) approach rather than using large monolithic silicon dies. Previously, in June 2017, Intel had derided AMD's disaggregated chiplet approach in their Ryzen and Epyc processors as using "glued-together" dies.[31]

The first advantage of using smaller dies in an MCM is how it brings better modularity and fabricating smaller dies increases silicon yield rates as more dies can be fitted onto a single 300mm wafer. As a result of greater yields, the use of multiple pre-tested components in an MCM removes the need for binning an entire assembled CPU as is the case with monolithic dies.[32] For example, Raptor Lake desktop silicon with defective graphics is binned into F SKUs with the integrated graphics disabled so they can still be sold while non-F SKUs have their integrated graphics enabled. Instead, Intel can assemble Meteor Lake CPUs using multiple pieces of fully functional silicon while any silicon wafer defects can be discarded entirely. The second advantage is greater flexibility in the use of process nodes. The various dies in an MCM can be fabricated on different nodes depending on their use case. Certain functions like SRAM and general I/O do not linearly scale as logic does with advancements in process node. For example, an I/O die can use a cheaper, more mature process like TSMC's N6 while the CPU die can use a more expensive, advanced node like N5 or N3 for greater power efficiency and frequency.

Process technology

[edit]

Due to its MCM construction, Meteor Lake can take advantage of different process nodes that are best suited to the use case. Meteor Lake is built using four different fabrication nodes, including both Intel's own nodes and external nodes outsourced to fabrication competitor TSMC. The "Intel 4" process used for the CPU tile is the first process node in which Intel is utilising extreme ultraviolet (EUV) lithography, which is necessary for creating nodes 7nm and smaller. The interposer base tile is fabricated on Intel's 22FFL, or "Intel 16", process.[33][34] The 22FFL (FinFET Low-power) node, first announced in March 2017, was designed for inexpensive low power operation.[35] The interposer base tile is designed to connect tiles together and allow for die-to-die communication which does not require the most advanced, expensive nodes so an older, inexpensive node can be used instead.

Tile Node EUV Die size Ref.
Compute tile Intel 4 (7nm EUV) Yes 69.67 mm2 [36]
[37]
[38]
Graphics tile TSMC N5 Yes 44.25 mm2
SoC tile TSMC N6 Yes 100.15 mm2
I/O extender tile Yes 27.42 mm2
Foveros interposer base tile Intel 16 (22FFL) No 265.65 mm2

Compute tile

[edit]

Meteor Lake's CPU compute tile features up to 6 Redwood Cove P-cores and 8 Crestmont E-cores. Each Redwood Cove P-core features SMT with two threads per core while Crestmont E-cores are limited to one thread per core. The 8 total Crestmont E-cores are organized into two 4-core clusters with shared L2 and L3 caches for each cluster. Each Crestmont E-core cluster has 2 MB of L2 cache, the same as a Gracemont E-core cluster. Crestmont maintains the same 6-wide out-of-order core design as Gracemont with enhancements to its pipeline. The branch target buffer in Crestmont gets a boost from 5120 entries to 6144 entries.[39] Intel claims that Crestmont achieves a 3% IPC increase due to the addition of Vector Neural Network Instructions (VNNI) instructions support for AI workloads but Crestmont E-cores still lack support for AVX-512 instructions[37] due to lack of AVX10 support.[40] Testing of Meteor Lake's new Redwood Cove P-cores actually showed an IPC regression in single-core workloads over the previous generation Raptor Cove core.[41]

Meteor Lake's compute tile is fabricated on the Intel 4 node which Intel claims brings a 20% increase in power efficiency and twice the area density for logic over Intel 7.[42] The CPU tile measures around 8.9mm × 8.3mm in dimensions, giving a total die size of 73.87mm2.[38] As a result, roughly 730 CPU dies can be fabricated from a single 300mm wafer, though the usable die yields will be lower than 730.[38]

Graphics tile

[edit]

The dedicated graphics tile in Meteor Lake is fabricated using TSMC's N5 node. Contained within the graphics tile are up to 8 Xe-LPG graphics cores based on the Alchemist architecture with optimizations for low-power. Intel's Arc A-series discrete graphics cards use Xe-HPG cores that are also based on the same Alchemist architecture. Each Xe core has 16 Xe Vector Engines (XVEs), giving a total of 128 XVEs across the 8 Xe-LPG cores. This 128 XVE configuration is a downgrade from the 192 XVEs Intel originally showed for Meteor Lake's graphics in a July 2021 presentation slide.[6] The move to the Alchemist architecture also brings the addition of up to 8 ray tracing units, one in each Xe-LPG core.[43] Much like the Xe-HPG variant, each Xe-LPG core contains a 192 KB L1 cache shared between all 16 XVEs. The 8 Xe-LPG cores have access to a 4 MB global L2 cache.[44] However, what the graphics tile is missing from the Alchemist architecture are Xe Matrix Extensions (XMX) units. XMX units perform in-silicon AI acceleration, similar to Nvidia's Tensor cores. The lack of XMX units means that the Xe-LPG core instead uses DP4a instructions in line with Microsoft Shader Model 6.4.[45]

Meteor Lake's graphics capabilities are greatly increased over the previous generation UHD and Iris Xe integrated graphics in Raptor Lake. Intel claims that Meteor Lake's GPU achieves a 2x increase in performance-per-watt over the Iris Xe graphics featured in Alder Lake and Raptor Lake processors.[43] The graphics tile is able to run at much higher clock speeds compared to Intel's previous integrated graphics in Alder Lake and Raptor Lake. Intel claims that Meteor Lake's GPU can "run at a much lower minimum voltage" and hit boost clock speeds of over 2.0 GHz.[46] There is full support included for the DirectX 12 Ultimate graphics API and Intel's XeSS upscaler, an alternative to Nvidia's DLSS and AMD's FSR. Intel claims that the graphics tile in Meteor Lake can give a similar level of performance to discrete graphics. Tom Petersen claimed that Meteor Lake's integrated graphics performance is "not that far from a [RTX] 3050". Intel demonstrated Dying Light 2 running on Meteor Lake's integrated graphics at 1080p with XeSS performance mode upscaling from 720p.[47] A hardware listing from Dell confirmed that in order to fully make use of the integrated Arc graphics, the system must be configured with at least 16GB of memory running in dual-channel mode. Not meeting the minimum memory requirements means that the system will report using lower performance "Intel Graphics" instead of "Arc" graphics.[48]

SoC tile

[edit]

Meteor Lake's SoC tile serves as the always-active central tile that communicates with other tiles like the CPU and GPU tiles.[37] It provides some I/O functions such as display output unit and the memory controller. Meteor Lake's memory controller is limited to supporting DDR5 and LPDDR5 memory as support for DDR4 memory is dropped. I/O components built into the SoC tile include Wi-Fi 6E and Wi-Fi 7, Bluetooth 5.4, USB4, USB 3.2 2x2, 8 DMI 4.0 lanes and up to four Thunderbolt 4 ports.[49] The SoC tile is fabricated using TSMC's N6 node as it is more cost effective.[37]

The SoC tile also contains two ultra low power Crestmont E-cores that Intel has dubbed a 'Low Power Island' that operates with lower voltage and lower frequency.[50] The SoC's low power E-cores are limited in frequency to 2.5 GHz compared to the 3.8 GHz of the E-cores. These cores are designed to handle deep background tasks for laptops in idle or sleep mode.[51] All deep background tasks being handled by two Crestmont E-cores in the SoC tile allows the inactive CPU tile to be turned off entirely.[52] This is intended to reduce power consumption and extend battery life for laptops in a sleep mode state. These low power E-cores in the SoC tile are prioritised by Intel Thread Director scheduling. If work cannot be contained on the SoC E-cores, it will then be moved to the compute tile's E-cores as the next priority cores. The final priority cores are the 6 P-cores which are used when the work cannot be contained on the compute tile E-cores. The SoC's low power E-cores lack an L3 cache that the Crestmont E-cores in the compute tile have access to. If a low power E-core encounters a data miss in the L2 cache, there is no L3 cache to fall back on so it must instead search the much slower system memory for data.[53]

Media engine

[edit]

Rather than the media engine be located on the GPU tile, it is instead placed on the SoC tile so that the GPU tile does not need to be turned on when decoding video or using a display output. This enables greater power efficiency as the GPU tile is not always active while the system is at idle or under light loads like video playback. There is support added in the media engine for AV1 hardware encoding up to 8K video with 10-bit color depth.[54] Four display pipes provide support for HDMI 2.1 and DisplayPort 2.1 UHBR20 display outputs with the ability to drive up to four 4K 60 Hz HDR monitors at once or one 8K HDR monitor. 1080p and 1440p monitors can be supported with a refresh rate up to 360 Hz.[52]

Neural Processing Unit (NPU)

[edit]

Meteor Lake features a Neural Processing Unit (NPU) to provide integrated AI capabilities.[30] The NPU, which Intel previously referred to as a Vision Processing Unit (VPU), uses the technology obtained by Intel when it acquired Movidius in September 2016.[55][56] Meteor Lake's NPU, which is marketed as Intel AI Boost, uses two Movidius 32-bit LEON microcontrollers called 'LeonRT' for processing host commands and 'LeonNN' for low level hardware scheduling.[57] It is capable of executing 1 FP16 or 2 INT8 operations per cycle but the NPU's Data Processing Unit (DPU) cannot use FP32 data. The 4K (4096) MACs operating at up to 1.4 GHz can perform up to 11 TOPS[57] with the total platform providing 34 TOPS of compute performance when including 5 TOPS from the CPU and 18 TOPS from the iGPU.[58] Meteor Lake's NPU allows AI acceleration and neural processing like Stable Diffusion to be done locally, on silicon rather than in the cloud.[59] The benefit of running such functions locally is that it provides greater privacy and does not require an internet connection or paying a fee to a third party for using their server computing power.[60] AI neural engines were previously included by Apple on their ARM-based M1 SoCs and by AMD with the integrated Ryzen AI engine on their Ryzen 7040 series mobile processors codenamed "Phoenix".[60] Intel CEO Pat Gelsinger claimed that Meteor Lake's NPU would usher in the era of the "AI PC" and compared it to Intel's Centrino chipsets that aided bringing Wi-Fi into the notebook market.[61]

I/O extender tile

[edit]

The I/O extender tile is the smallest tile in Meteor Lake, fabricated on TSMC's N6 node.[62] It provides scalable I/O blocks, which is primarily to offer additional connectivity to that of the SoC tile, such as PCIe 5.0 lanes. The I/O tile can be scaled depending on the number of PCIe lanes needed and the speed they operate at.[63]

Foveros interposer base tile

[edit]

Meteor Lake uses a passive silicon interposer placed underneath its tiles as an interconnect. The tiles are placed on top of the interposer and are bonded to the interposer using through-silicon via (TSV) connections through the two vertically stacked pieces of silicon. The TSVs connect the dies with a 36 μm pitch to enable die-to-die communication. Placing logic dies on top of an interposer requires TSVs to connect the top dies through the interposer onto the package. By contrast, AMD's chiplet approach uses multiple pieces of silicon that are interconnected via traces on the package substrate. The benefit of AMD's approach is its cost-effective scalability where the same CCDs can be used in both their Ryzen desktop and Epyc server processors. AMD's Infinity Fabric approach comes with the drawbacks of increased latency and using additional power for die-to-die communication at around 1.5 picojoules per bit.[37] Intel's communication via a silicon interposer uses less power, at around 0.3 picojoules per bit, but is more expensive to produce, is less scalable and packaging is more complex.[50] The Foveros interposer base tile is estimated to be 23.1mm × 11.5mm in dimensions with a total die area of 265.65mm2.[38]

However, Meteor Lake processors are not the first Intel processors to utilize vertical die stacking with a base tile. In June 2020, Intel launched Lakefield ultra-low power mobile processors with a 7W TDP. Lakefield used Foveros packaging with a 22nm base tile and 10nm compute tile.[64] The compute tile contained heterogenous cores with one Sunny Cove big core and four Tremont small cores, predecessors to Meteor Lake's Redwood Cove and Crestmont cores.[65] Lakefield was discontinued in July 2021.[66]

Features

[edit]

CPU

[edit]
  • Up to 16 cores:[67]
    • Up to 6 Redwood Cove performance cores (P-core)
    • 4 or 8 Crestmont efficient cores (E-core), 1 or 2 clusters with 4 cores
    • 2 low power Crestmont efficient cores (LP E-core) on the SoC tile
  • L1 instruction cache per P-core increased to 64 KB, up from 32 KB in Raptor Cove
  • 2 MB L2 cache for each P-core, E-core cluster and LP E-core cluster
  • Up to 24 MB shared L3 cache

GPU

[edit]
  • Xe-LPG architecture[68][69]
  • Up to 8 Xe cores and 128 Xe Vector Engines (XVEs)[70]
    • 16 XVEs per Xe core
  • 8K 10-bit AV1 hardware encoder[71][72]
  • Up to 2.35 GHz frequency[3]
  • FP64 native hardware support[3]

NPU

[edit]

I/O

[edit]

List of Core Ultra Series 1 processors

[edit]

Mobile processors

[edit]

Meteor Lake-H

[edit]

155H, 165H, and 185H support P-core Turbo Boost 3.0 running at the same frequency as Turbo Boost 2.0.

Processor
branding
Model Cores (threads) Base clock rate
(GHz)
Turbo Boost
(GHz)
Arc graphics Smart
cache
TDP Release date Price
(USD)[a]
P E LP-E P E LP-E P E LP-E Xe-cores
(XVEs)
Max. freq.
(GHz)
Base cTDP Turbo
Core Ultra 9 185H 6 (12) 8 (8) 2 (2) 2.3 1.8 1.0 5.1 3.8 2.5 8 (128) 2.35 24 MB 45 W 35–65 W 115 W Q4'23 $640
Core Ultra 7 165H 1.4 0.9 0.7 5.0 2.3 28 W 20–65 W Q4'23 $460
155H 4.8 2.25 Q4'23 $503
Core Ultra 5 135H 4 (8) 1.7 1.2 4.6 3.6 2.2 18 MB Q4'23 $342
125H 1.2 0.7 4.5 7 (112) Q4'23 $375
  1. ^ Price is Recommended Customer Price (RCP) at launch. RCP is the trade price that processors are sold by Intel to retailers and OEMs. Actual MSRP for consumers is higher

Meteor Lake-U

[edit]

The integrated GPU is branded as "Intel Graphics" but still use the same GPU microarchitecture as "Intel Arc Graphics" on the H series models.

All models support DDR5 memory except 134U and 164U.

Processor
branding
Model Cores (threads) Base clock rate
(GHz)
Turbo Boost
(GHz)
Intel Graphics Smart
cache
TDP Release date Price
(USD)[a]
P E LP-E P E LP-E P E LP-E Xe-cores
(XVEs)
Max. freq.
(GHz)
Base cTDP Turbo
Low power (MTL-U15)
Core Ultra 7 165U 2 (4) 8 (8) 2 (2) 1.7 1.2 0.7 4.9 3.8 2.1 4 (64) 2.0 12 MB 15 W 12–28 W 57 W Q4'23 $448
155U 4.8 1.95 Q4'23 $490
Core Ultra 5 135U 1.6 1.1 4.4 3.6 1.9 Q4'23 $332
125U 1.3 0.8 4.3 1.85 Q4'23 $363
115U 4 (4) 1.5 1.0 4.2 3.5 3 (48) 1.8 10 MB Q4'23 unspecified
Ultra low power (MTL-U9)
Core Ultra 7 164U 2 (4) 8 (8) 2 (2) 1.1 0.7 0.4 4.8 3.8 2.1 4 (64) 1.8 12 MB 9 W 9–15 W 30 W Q4'23 $448
Core Ultra 5 134U 0.7 0.5 4.4 3.6 1.75 Q4'23 $332
  1. ^ Price is Recommended Customer Price (RCP) at launch. RCP is the trade price that processors are sold by Intel to retailers and OEMs. Actual MSRP for consumers is higher

Processors for Internet of Things (IoT) devices and embedded systems (Meteor Lake-PS)

[edit]

High-power

[edit]

155HL and 165HL support P-core Turbo Boost 3.0 running at the same frequency as Turbo Boost 2.0.

Processor
branding
Model Cores (threads) Base clock rate
(GHz)
Turbo Boost
(GHz)
Arc graphics Smart
cache
TDP Release date Price
(USD)[a]
P E LP-E P E LP-E P E LP-E Xe-cores
(XVEs)
Max. freq.
(GHz)
Base cTDP Turbo
Core Ultra 7 165HL 6 (12) 8 (8) 2 (2) 1.4 0.9 0.7 5.0 3.8 2.5 8 (128) 2.3 24 MB 45 W 20–65 W 115 W Q2'24 $459
155HL 4.8 2.25 Q2'24 $438
Core Ultra 5 135HL 4 (8) 1.7 1.2 4.6 3.6 2.2 18 MB Q2'24 $341
125HL 1.2 0.7 4.5 7 (112) Q2'24 $325
  1. ^ Price is Recommended Customer Price (RCP) at launch. RCP is the trade price that processors are sold by Intel to retailers and OEMs. Actual MSRP for consumers is higher

Low-power

[edit]

The integrated GPU is branded as "Intel Graphics" but still use the same GPU microarchitecture as "Intel Arc Graphics" on the high-power models.

Processor
branding
Model Cores (threads) Base clock rate
(GHz)
Turbo Boost
(GHz)
Intel Graphics Smart
cache
TDP Release date Price
(USD)[a]
P E LP-E P E LP-E P E LP-E Xe-cores
(XVEs)
Max. freq.
(GHz)
Base cTDP Turbo
Core Ultra 7 165UL 2 (4) 8 (8) 2 (2) 1.7 1.2 0.7 4.9 3.8 2.1 4 (64) 2.0 12 MB 15 W 12–28 W 57 W Q2'24 $447
155UL 4.8 1.95 Q2'24 $426
Core Ultra 5 135UL 1.6 1.1 4.4 3.6 1.9 Q2'24 $331
125UL 1.3 0.8 4.3 1.85 Q2'24 $309
Core Ultra 3 105UL 4 (4) 1.5 1.0 4.2 3.5 3 (48) 1.8 10 MB Q2'24 $295
  1. ^ Price is Recommended Customer Price (RCP) at launch. RCP is the trade price that processors are sold by Intel to retailers and OEMs. Actual MSRP for consumers is higher

See also

[edit]

References

[edit]
Revisions and contributorsEdit on WikipediaRead on Wikipedia
from Grokipedia
Meteor Lake is the codename for Intel's Core Ultra Series 1 processors, a family of mobile system-on-chip (SoC) designs introduced for premium thin-and-light laptops and other portable devices. Launched on December 14, 2023, these processors represent Intel's first implementation of a fully disaggregated, chiplet-based architecture in client computing, utilizing Foveros 3D packaging to stack multiple specialized tiles onto a passive base tile for enhanced modularity, power efficiency, and performance. The Meteor Lake architecture comprises four primary active tiles: the Compute Tile, fabricated on Intel's 4 process node, which integrates the CPU cores—including up to six high-performance Redwood Cove P-cores, eight efficient Crestmont E-cores, and two low-power E-cores—along with a dedicated Neural Processing Unit (NPU) for AI workloads; the Graphics Tile, based on TSMC's N5 node, housing the integrated Intel Arc GPU with up to 128 execution units; the SoC Tile on TSMC N6 for system-level functions like memory controllers and display engines; and the I/O Tile on TSMC N6 managing connectivity interfaces such as PCIe, USB, and Thunderbolt. This tile-based approach allows independent optimization of each component's manufacturing process, contributing to overall improvements in power efficiency and thermal management compared to prior monolithic designs. Key features of Meteor Lake include hybrid core configurations supporting up to 22 threads across models like the Core Ultra 9 185H (16 cores: 6P + 8E + 2LP-E), integrated AI acceleration via the NPU delivering approximately 10 with the full platform reaching up to 34 for AI tasks, and enhanced capabilities enabling 1080p gaming and at higher frame rates. Targeted at power envelopes from 9W to 45W (U, P, and H series variants), the processors emphasize AI-enhanced experiences, such as real-time video effects and noise suppression, while supporting modern standards like 7, DDR5 memory, and LPDDR5X.

Background

Development and Branding

Meteor Lake, Intel's codename for its first-generation Core Ultra mobile processors, emerged from a "blank sheet" development program aimed at fundamentally rethinking system-on-chip (SoC) design. Led by Tim Wilson, the SoC development effort began approximately four years prior to its public unveiling, around 2019, and represented Intel's most significant architectural shift in over 40 years by adopting a disaggregated tile-based structure using Foveros 3D packaging technology. This approach involved hotly debated decisions to break apart traditional monolithic designs into separate compute, graphics, SoC, I/O, and base tiles, enabling optimized manufacturing on different process nodes and the integration of a dedicated neural processing unit (NPU) for AI acceleration. As Wilson noted, "For Meteor Lake, we broke things apart in ways we haven't before. It was a blank sheet program... We wanted to leverage the best of what we had in and create something new." The project aligned with Intel's broader roadmap, targeting the Intel 4 process node for production starting in 2023. In tandem with its technical evolution, Meteor Lake prompted a major rebranding of Intel's client processors, announced on June 15, 2023, to signify an in computing driven by AI capabilities. The new Intel Core Ultra brand was introduced specifically for Meteor Lake and future AI-enhanced processors, replacing the longstanding Intel Core i3, i5, i7, and i9 naming convention by dropping the "i" prefix and adopting a tiered structure: Core Ultra 5, 7, and 9 for high-end models with NPU integration. This marked Intel's first significant client branding overhaul in over 15 years, with the legacy brand retained for prior-generation (13th and 14th Gen) processors to allow multi-generational coexistence and clearer differentiation of AI-ready silicon. The update aimed to simplify consumer recognition of performance tiers and highlight advancements like built-in AI acceleration, as stated by Intel's Michelle Johnston Holthaus: "This is a pivotal moment... Core Ultra processors will bring AI to the PC."

Manufacturing Process

Meteor Lake utilizes a disaggregated consisting of multiple tiles, each fabricated on specialized process nodes to optimize performance, power consumption, and cost for their respective functions. This approach represents Intel's first use of external manufacturing for key components in a client processor, aligning with its IDM 2.0 strategy that combines in-house fabrication with partnerships like . The tiles are produced separately before being assembled into a single package, enabling the selection of the most suitable technology for each element. The Compute Tile, which houses the performance and efficiency CPU cores, is manufactured by on its Intel 4 process node—the company's first high-volume EUV-based node for logic, offering over 20% improved performance per watt compared to Intel 7. The Graphics Tile, featuring the Intel Arc-based integrated GPU, is fabricated by on its N5 (5 nm) node to support advanced graphics workloads with enhanced transistor density. The SoC Tile, integrating the NPU for AI acceleration, media processing, and display engines, is produced by on its N6 (6 nm) node, providing a cost-effective balance for these mixed-signal components. Additionally, the I/O Tile, handling connectivity such as PCIe Gen 5 and , is also made by on the N6 node. Assembly occurs using Intel's Foveros 3D packaging technology, which stacks the active tiles vertically onto a passive Base Tile for high-bandwidth, low-latency interconnections via micro-bumps and through-silicon vias. The Base Tile, serving as the for power distribution and signaling, is fabricated by on its Intel 16 process node, a refined 16 nm-class technology well-suited for this interconnect role. This multi-node, hybrid manufacturing process enhances overall efficiency by allowing each tile to leverage cutting-edge nodes where beneficial, while mitigating risks through diversified production.

Announcement and Release

Intel officially unveiled its Meteor Lake processors, codenamed for the company's 14th-generation Core architecture, during the Intel Innovation event on September 19, 2023. The announcement highlighted Meteor Lake as Intel's first disaggregated chiplet design using Foveros 3D packaging technology, marking a significant shift from monolithic dies and incorporating elements manufactured on Intel 4, TSMC N5, and TSMC N6 processes. At the event, Intel emphasized the processors' integration of CPU, GPU, NPU, and I/O tiles on a substrate, positioning them as the foundation for AI-enhanced computing in mobile platforms under the new Core Ultra branding. Production of Meteor Lake had begun ramping up earlier in 2023, with confirming in its Q1 earnings call on April 27, 2023, that wafers were entering high-volume for a second-half launch. The announcement provided detailed specifications for the initial lineup, including the Core Ultra 7 165H as the flagship model with 16 cores (6 performance, 8 efficient, 2 low-power efficient), graphics, and a dedicated NPU for AI workloads delivering up to 34 of performance. also teased partnerships with OEMs like , HP, , and for upcoming laptops, underscoring the processors' focus on thin-and-light ultrabooks with improved battery life and efficiency. Meteor Lake processors launched commercially on December 14, 2023, exclusively for mobile devices as part of the Core Ultra Series 1 family. The debut featured over 40 models from major manufacturers, including the Book4 and 13, all equipped with variants like the Core Ultra 5, 7, and 9. described the release as introducing the "most power-efficient client processor" in its history, with real-world demonstrations showing up to 50% better graphics performance and enhanced AI capabilities compared to prior generations. Desktop variants were not part of the initial rollout, with indicating future expansions to other form factors in subsequent announcements.

Architecture

Disaggregated Tile Design

Meteor Lake introduces a disaggregated tile-based , marking Intel's first implementation of such a design in a consumer system-on-chip (SoC) for client devices. This approach breaks the traditional monolithic die into modular tiles, each optimized for specific functions, which are then stacked and interconnected using Intel's Foveros 3D packaging technology. Unlike prior integrated designs where all components shared a single substrate, disaggregation enables independent fabrication of tiles on the most suitable process nodes, enhancing overall efficiency and scalability. The architecture consists of four primary tiles—a Compute Tile, Graphics Tile, SoC Tile, and I/O Tile—assembled atop a passive Base Tile that serves as the interconnect substrate. The Foveros technology facilitates vertical stacking with high-density micro-bumps, allowing for shorter interconnect paths compared to 2D layouts, which reduces latency and power consumption. This tiled structure leverages Intel 4 process for the Compute Tile while permitting other tiles to use alternative nodes like N6 for the SoC Tile, optimizing cost and performance for diverse workloads. Key advantages of this design include greater manufacturing flexibility, as tiles can be reused or varied across product lines without redesigning the entire chip, and improved management through targeted cooling for high-power tiles. It also supports future scalability, enabling to integrate like advanced AI accelerators more seamlessly. This shift represents a significant evolution from Intel's previous monolithic approaches, aligning with industry trends toward chiplet-based systems for complex SoCs.

Compute Tile

The Compute Tile in Intel's Meteor Lake architecture, part of the Core Ultra Series 1 processors, houses the primary central processing unit (CPU) resources, enabling a hybrid performance model through a combination of high-performance and efficient core types. Fabricated on Intel's 4 process node—the company's first use of extreme ultraviolet (EUV) lithography—this tile delivers over 20% improved power efficiency compared to the prior Intel 7 node, supporting enhanced performance in mobile computing scenarios. At its core, the Compute Tile integrates performance cores (P-cores) based on the Redwood Cove , designed for demanding single-threaded workloads with features like wider execution units and improved branch prediction over predecessors. These are paired with efficient cores (E-cores) using the Crestmont , optimized for lighter tasks with higher throughput per watt through deeper pipelines and advanced . Configurations vary by processor model; for instance, the high-end Core Ultra 7 155H includes 6 Redwood Cove P-cores and 8 Crestmont E-cores on this tile, contributing to a total of 16 CPU cores across the package when accounting for additional low-power E-cores on the SoC Tile. The tile features a shared last-level cache of up to 24 MB L3, which supports coherent access across cores and facilitates efficient in multi-threaded applications. Clock speeds reach up to 4.8 GHz on P-cores in turbo mode for models like the Core Ultra 7 155H, balancing peak performance with thermal constraints in thin-and-light laptops. Integrated within the disaggregated design via Foveros 3D packaging, the Compute Tile connects directly to the SoC Tile through a high-bandwidth, low-latency fabric, allowing seamless thread migration and while isolating compute-intensive IP for optimized yields and . This setup represents Intel's largest architectural shift in over 40 years, prioritizing for future iterations.

Graphics Tile

The Graphics Tile in Intel's Meteor Lake architecture houses the primary integrated (iGPU), implementing the Xe-LPG (Low Power Graphics) architecture derived from the Xe-HPG design used in discrete Arc GPUs. This tile is fabricated by on its 5 nm (N5) process node, enabling higher transistor density and improved power efficiency compared to prior generations. The die measures approximately 37 mm², based on detailed analysis of Meteor Lake-H samples. At its core, the Graphics Tile features up to 8 Xe Cores, each comprising 16 Execution Units (EUs) for a total of 128 EUs organized into 2 Render Slices, supporting rasterization, ray tracing, and compute workloads. It includes fixed-function units such as rasterizers and render output units (ROPs), along with a 4 MB L2 cache shared across the iGPU and a hierarchical L1 cache (192 KB total, with 160 KB usable for shaders). Texture caching is handled separately to optimize access patterns in pipelines. The tile's front-end manages command processing and operations, while the Xe Cores execute vector computations via 16 Vector Engines (XVEs) per core, each with 128 FP32 lanes. Key features of the Graphics Tile emphasize efficiency for mobile applications, targeting roughly 2x over the 12th-generation Xe graphics through architectural refinements like improved scheduling and . As of November 2025, driver updates enable XeSS Frame Generation on the iGPU for improved AI-based upscaling. Unlike previous integrated designs, media engines (for video encode/decode) and display interfaces are relocated to the SoC Tile, allowing the Graphics Tile to focus solely on rendering hardware while leveraging the disaggregated structure for modular scalability across processor variants. Connectivity to other tiles occurs via Intel's Scalable Fabric using the iCXL protocol, supporting LPDDR5/X memory access with up to 2.25 GHz clock speeds in high-end configurations. This design facilitates AI-accelerated graphics tasks, including Xe Matrix Extensions (XMX) for matrix multiplications in neural rendering.

SoC Tile

The SoC tile in Intel's Meteor Lake architecture serves as the central hub for system-level integration, housing key uncore components that facilitate communication between the processor's disaggregated tiles and external peripherals. Fabricated on TSMC's N6 (6 nm) process node, it is the largest of the active tiles by area and eliminates the need for a separate platform controller hub (PCH) by incorporating traditional chipset functions directly onto the die. This design choice enhances power efficiency and reduces latency in mobile platforms by centralizing I/O orchestration. Key components integrated into the SoC tile include the integrated memory controller supporting DDR5-5600 and LPDDR5X-7467 memory standards, with dual-channel configuration for up to 128 GB capacity, marking the first Intel client processor to drop DDR4 support. It also features the PCIe root complex supporting up to 28 lanes (8 PCIe 5.0 + 20 PCIe 4.0, including x8 PCIe 5.0 for external GPU connectivity), USB 4.0/Thunderbolt 4 controllers with two 40 Gbps ports, and xHCI controllers for USB 3.2 Gen 2x2 (20 Gbps) support. Additionally, the tile incorporates two low-power Efficient-cores (LP-E cores) optimized for always-on tasks, a dedicated Neural Processing Unit (NPU) for AI acceleration delivering approximately 11 TOPS (INT8), with the full platform reaching up to 34 TOPS, and a media engine handling AV1 decode/encode, H.265/HEVC, and VP9 codecs. The SoC tile employs two scalable fabrics for internal connectivity: a high-performance Network-on-Chip (NoC) on the north side linking bandwidth-intensive elements like the , LP-E cores, NPU, and media block to the compute and graphics tiles; and a south-side fabric managing lower-speed I/O interfaces such as display engines (supporting up to four 4K60 or two 8K30 displays via eDP 1.4b, 2.1, and DP 2.0) and serial I/O. This architecture, connected via Intel's Foveros 3D packaging with 36 µm die-to-die pitch, enables modular scalability across Meteor Lake variants while optimizing power delivery and thermal management through integrated voltage regulators and fabric-based .

I/O and Base Tiles

The I/O tile in Meteor Lake, also referred to as the IOE (I/O Extended) tile, is the smallest of the four active tiles and serves as the primary hub for external connectivity and peripheral interfaces. Fabricated on TSMC's N6 process node, it integrates essential I/O controllers including PCIe lanes (up to 28 total: 8 PCIe 5.0 + 20 PCIe 4.0, supporting up to x8 PCIe 5.0 for graphics and x4 PCIe 5.0 for storage), USB4/Thunderbolt 4 ports (with up to 40 Gbps bidirectional bandwidth and DisplayPort alt mode), and serial I/O such as UART and I2C for system management. This disaggregation allows the I/O tile to be optimized for high-bandwidth signaling and power efficiency, connecting to the other tiles via the Foveros direct interconnect, which provides low-latency die-to-die communication at up to 1.3 TB/s aggregate bandwidth across the package. The base functions as a passive , providing the foundational substrate upon which the four active (compute, graphics, SoC, and I/O) are stacked using Intel's Foveros 3D packaging technology. Manufactured on Intel's 16 process node (formerly 22FFL), it lacks active logic but incorporates through-silicon vias (TSVs) for vertical interconnects and redistribution layers for horizontal routing, enabling seamless integration of the tiles with the package substrate below. This design addresses power delivery, die-to-die signaling, and thermal management by distributing power rails and high-speed links, with the base tile measuring approximately 23.1 mm × 11.5 mm (~266 mm²) to accommodate the active tiles, which combined exceed 200 mm². Together, the I/O and base tiles enable Meteor Lake's modular architecture to support diverse mobile and embedded configurations, such as up to four 4 ports and PCIe bifurcation for multi-GPU setups, while the base tile's passive nature reduces complexity and cost compared to fully monolithic designs. This tile-based approach contrasts with prior generations like , where I/O was integrated into the main die, allowing to source I/O-specific fabrication from for better yield on analog-heavy components.

Features

Central Processing Unit

The (CPU) in Meteor Lake, branded as Ultra processors (Series 1), employs a hybrid integrated into the compute tile, combining high-performance Redwood Cove performance cores (P-cores) with energy-efficient Crestmont efficient cores (E-cores). This design is fabricated on Intel's Intel 4 process node, marking the first use of this advanced lithography for both core types. The Redwood Cove P-cores serve as the successor to the , delivering approximately 17% improved performance efficiency through enhancements in branch prediction, execution units, and power management. The Crestmont E-cores, in turn, build upon the Gracemont with up to 14% higher (IPC) gains, achieved via wider dispatch and retirement widths, larger caches, and optimized vector processing capabilities. Core configurations vary across mobile processor variants, with high-end models like the Core Ultra 9 185H featuring 6 P-cores, 8 E-cores, and 2 low-power efficient cores (LP-E cores, also based on Crestmont) for a total of 16 cores and 22 threads. The P-cores support , enabling two threads per core, while E-cores and LP-E cores are single-threaded. The LP-E cores, located on the SoC tile rather than the compute tile, handle lightweight background tasks with minimal power draw, contributing to overall system efficiency in always-on scenarios. Shared L3 cache on the compute tile reaches up to 24 MB in top SKUs, supporting rapid data access across core types. Performance is managed through Intel's Thread Director, an AI-assisted hardware scheduler that optimizes workload distribution between P-cores for demanding single-threaded tasks and E-cores for multi-threaded efficiency. Clock speeds exemplify this balance: in the Core Ultra 9 185H, P-cores reach up to 5.1 GHz turbo, E-cores up to 3.8 GHz, and LP-E cores up to 2.5 GHz. This setup enables up to 2.7x better multi-threaded performance compared to previous-generation processors in select workloads, while maintaining power envelopes suitable for thin-and-light laptops (typically 15-45W base). features include integrated support for Intel SGX enclaves and enhanced mitigations for transient execution vulnerabilities.

Integrated Graphics Processing Unit

The integrated graphics processing unit (iGPU) in Intel's Meteor Lake processors, branded as Intel Arc Graphics in higher-end configurations, is housed within a dedicated graphics tile as part of the chip's disaggregated design. This tile, fabricated on TSMC's N5 process node, integrates the GPU compute engines, media processing capabilities, and display controllers separately from the compute and SoC tiles to optimize power efficiency and performance. The architecture is based on Intel's Xe-LPG (Low Power Graphics), an evolution of the Xe-HPG used in discrete Arc Alchemist GPUs, tailored for integrated mobile applications with a focus on efficiency. Xe-LPG features up to 8 Xe-cores, each containing 16 Xe Vector Engines (XVEs) equivalent to execution units (EUs), for a total of 128 EUs in flagship models like the Core Ultra 7 155H. These cores support unified shaders capable of vector and scalar operations, with for ray tracing via dedicated ray-tracing units (RT units) that enable real-time ray tracing in 12 Ultimate workloads. Clock speeds reach a maximum dynamic of 2.25 GHz in high-performance SKUs, while lower-power variants like the Core Ultra 5 125H top out at 2.2 GHz. The design incorporates large L1 caches and fast dispatch hardware to enhance ray-tracing performance and overall compute throughput. Key features include support for Xe Super Sampling (XeSS), an AI-based upscaling technology similar to NVIDIA's DLSS, which leverages the integrated Neural Processing Unit (NPU) for frame generation and super-resolution in games and applications. Media capabilities encompass a dedicated AV1 hardware encoder for 8K 10-bit video at 60 Hz, alongside VP9 and H.265 decode/encode, enabling efficient content creation and streaming. Display outputs support eDP 1.4b for embedded panels, DisplayPort 2.1 with UHBR20 (up to 80 Gbps bandwidth for 8K@60Hz), and HDMI 2.1 with FRL 12 GHz for external monitors. The iGPU also delivers up to 18 TOPS of INT8 performance, contributing to AI workloads when combined with the NPU. Compared to the prior-generation Iris Xe (Xe-LP), Meteor Lake's Xe-LPG iGPU achieves approximately double the graphics performance per watt, primarily through architectural improvements in , voltage scaling, and tile-based integration that allows the GPU to operate at lower minimum voltages while sustaining higher boost clocks. Lower-end Meteor Lake variants, such as U-series processors, use a scaled-down Graphics configuration with fewer Xe-cores (e.g., 4 cores or 64 EUs) and reduced clocks (up to 1.8 GHz), branded without the Arc designation for basic integrated graphics needs. Overall, the iGPU enables gaming at moderate settings and accelerates graphics-intensive tasks like and light in thin-and-light laptops.

Neural Processing Unit

The Neural Processing Unit (NPU) in 's Meteor Lake processors, branded as Intel AI Boost, represents the company's first dedicated AI accelerator integrated into client CPUs, enabling efficient on-device inference for workloads. Located on the SoC tile, the NPU offloads AI tasks from the CPU and GPU to reduce power consumption and latency, supporting features like real-time video effects, , and image processing in applications such as or . Architecturally, the NPU employs a multi-engine with two neural compute engines that collaborate on workloads, each engine featuring 2,048 Multiply-Accumulate (MAC) units for a total of 4,096 MACs across the unit. Each MAC supports one FP16 operation or two INT8 operations per cycle, paired with 4 MB of dedicated low-latency SRAM for near-compute memory to minimize data movement overhead. Operating at a fixed 1.16 GHz clock speed, this configuration prioritizes power efficiency over raw speed, targeting always-on AI scenarios in mobile and edge devices. The NPU integrates with Intel's toolkit for model optimization and deployment, facilitating support for frameworks like and . In terms of performance, the NPU delivers approximately 10-11 (Tera Operations Per Second) in INT8 precision, contributing to the overall platform's up to 34 of AI compute when combined with the CPU and GPU. This enables low-power execution of common AI models; for instance, it achieves background segmentation in video calls at under 2W, outperforming CPU-only implementations by up to 4x in efficiency. While not intended for large models, the NPU excels in for consumer AI PCs, aligning with Microsoft's Copilot+ requirements for local AI processing. Benchmarks show it handling tasks like image generation in about 20 seconds on a Core Ultra 7 155H, though complex models may still leverage the iGPU for higher throughput. The NPU's design emphasizes security and scalability, with hardware isolation for AI workloads and compatibility across Meteor Lake variants, from mobile U-series to higher-end H-series processors. Future iterations, such as in Lunar Lake, build on this foundation by increasing TOPS to 48 while maintaining similar architectural principles.

Input/Output Capabilities

Meteor Lake processors, part of Intel's Core Ultra Series 1, integrate advanced input/output features within their disaggregated tile architecture, primarily through the SoC tile and I/O tile. These components enable high-speed connectivity for peripherals, displays, storage, and wireless networking, optimized for thin-and-light laptops and mobile devices. The design supports flexible SerDes interfaces that can be configured for various protocols, including PCIe, USB, and DisplayPort, allowing OEMs to tailor configurations based on power and performance needs.

PCIe Support

The processors provide robust PCIe connectivity for GPUs, storage, and other expansion devices. For H-series variants (28-45W TDP), up to 8 PCIe 5.0 lanes and 20 PCIe 4.0 lanes are available, with typical allocations of 12 PCIe 4.0 lanes dedicated to storage (e.g., NVMe SSDs) and 8 PCIe 4.0 lanes for general I/O. U-series variants (9-15W TDP) support up to 20 PCIe 4.0 lanes, without PCIe 5.0, emphasizing efficiency for ultrathin designs. These lanes enable high-bandwidth connections, such as x4 NVMe SSDs at up to 64 GT/s for PCIe 5.0 or 32 GT/s for PCIe 4.0, enhancing data transfer rates for AI workloads and .

USB and Thunderbolt Connectivity

Meteor Lake integrates support via the SoC tile, compatible with 4 protocols at up to 40 Gbps bidirectional throughput per port. H-series processors support up to 4 4 () ports, enabling daisy-chaining of peripherals, external displays, and high-speed data transfer with Power Delivery up to 140W. Additionally, configurations include 2 USB 3.2 Gen 2x1 ports (10 Gbps) and up to 10 USB 2.0 ports for legacy devices. U-series models typically feature 2 4 ports alongside similar USB complements, prioritizing low power while maintaining versatility for docking stations and . This setup supports advanced features like PCIe tunneling over for eGPUs.

Display Interfaces

The integrated graphics in Meteor Lake support multiple high-resolution display outputs through the SoC tile's display engine. Key interfaces include 2.1 (up to UHBR20, 80 Gbps) and HDMI 2.1, enabling configurations of up to 4 independent displays at 4K@60Hz or a single 8K@60Hz output with 10-bit HDR. Embedded DisplayPort (eDP) 1.4b is provided for internal laptop screens, supporting up to 4K@120Hz. These capabilities facilitate multi-monitor setups for productivity and hardware decoding/encoding for efficient video playback and streaming.

Storage and Platform Interfaces

Storage I/O leverages the PCIe lanes for NVMe SSDs, with support for up to 4x PCIe 4.0 x4 interfaces in H-series for configurations or high-capacity drives. The platform uses (DMI) 4.0 x8 (up to 63.0 GT/s) for connectivity to external chipsets or docks. While native support is limited, USB and PCIe tunneling allow compatibility with traditional HDDs. These features ensure scalable storage solutions for and AI inference tasks.

Networking Features

Wireless connectivity is integrated into the I/O tile, with support for 7 (802.11be) offering multi-gigabit speeds up to 5.8 Gbps and improved efficiency in dense environments, alongside with Wi-Fi 6E. Bluetooth 5.4 provides enhanced range, lower latency, and features like periodic advertising for IoT device syncing. Ethernet is not natively integrated but can be added via PCIe or USB adapters, with 2.5GbE common in platform designs. These capabilities position Meteor Lake for seamless wireless ecosystems in mobile AI PCs.
FeatureH-SeriesU-Series
PCIe Lanes8x Gen5 + 20x Gen420x Gen4
Thunderbolt 4 PortsUp to 4Up to 2
USB Ports2x 3.2 Gen2x1 + 10x 2.02x 3.2 Gen2x1 + 10x 2.0
Display OutputsUp to 4x (DP 2.1/HDMI 2.1)Up to 4x (DP 2.1/HDMI 2.1)
WirelessWi-Fi 7, BT 5.4Wi-Fi 7, BT 5.4

Processor Variants

Mobile Processors

The Meteor Lake mobile processors, branded as Intel Core Ultra Series 1, target laptops and ultrabooks, emphasizing AI acceleration, improved graphics, and power efficiency through a chiplet-based design. Launched on December 14, 2023, these processors integrate a dedicated Neural Processing Unit (NPU) named Intel AI Boost, delivering 11 TOPS of INT8 performance for AI inference tasks such as image recognition and video processing. They support up to 96 GB of LPDDR5X-7467 memory, DDR5-5600, or LPDDR5-6400, and include connectivity options like Thunderbolt 4 and PCIe 5.0. The H-series variants are optimized for high-performance in thin-and-light laptops, with base power consumption ranging from 28 W to 45 W and maximum turbo power up to 115 W. These processors use Redwood Cove performance cores (P-cores), Crestmont efficiency cores (E-cores), and low-power E-cores (LP-E cores) on the compute tile, combined with graphics for enhanced visual workloads. The series includes models across Core Ultra 5, 7, and 9 tiers, with higher-end SKUs featuring more P-cores and larger cache for demanding applications like and gaming.
Processor ModelCore Configuration (P + E + LP-E)ThreadsMax Turbo Frequency (GHz)L3 Cache (MB)Integrated GraphicsBase Power (W) / Max Turbo Power (W)
Core Ultra 9 185H6 + 8 + 2225.124 (8 Xe-cores, up to 2.35 GHz)45 / 115
Core Ultra 7 155H6 + 8 + 2224.824 (8 Xe-cores, up to 2.25 GHz)28 / 115
Core Ultra 5 125H4 + 8 + 2184.518 (7 Xe-cores, up to 2.2 GHz)28 / 115
The U-series processors focus on ultra-low power consumption for fanless or slim designs, with a 15 W base TDP and up to 57 W turbo power, prioritizing battery life and always-on capabilities. They reduce the number of P-cores to emphasize efficiency while retaining the NPU and support for AI features. These are suited for everyday productivity in portable devices, with integrated scaled down for lower thermal envelopes.
Processor ModelCore Configuration (P + E + LP-E)ThreadsMax Turbo Frequency (GHz)L3 Cache (MB)Integrated Base Power (W) / Max Turbo Power (W)
Core Ultra 7 155U2 + 8 + 2144.812 (4 Xe-cores, up to 1.95 GHz)15 / 57
Core Ultra 5 125U2 + 8 + 2144.312 (4 Xe-cores, up to 1.85 GHz)15 / 57
Additional variants, such as the HL-series (e.g., Core Ultra 7 165HL), offer customized configurations for specific OEM platforms, maintaining similar architecture but with adjusted power profiles. All mobile Meteor Lake processors support vPro enterprise features in select SKUs for enhanced security and manageability.

Embedded and IoT Processors

Meteor Lake processors, branded as Intel Core Ultra Series 1, have been adapted for embedded and Internet of Things (IoT) applications primarily through modular form factors and industrial-grade systems developed by partner manufacturers, leveraging the architecture's efficiency and AI capabilities for edge computing. Unlike dedicated embedded lines such as previous-generation Intel Atom processors, Meteor Lake variants like the Core Ultra 7 155H and Core Ultra 5 125H (H-series) are employed in rugged, fanless designs suitable for industrial automation, smart retail, and IoT gateways, offering up to 16 cores (including performance, efficient, and low-power efficient cores) with a base thermal design power (TDP) configurable from 28W to 115W. These processors integrate an AI Boost Neural Processing Unit (NPU) delivering 11 of INT8 performance for AI inference, enabling real-time edge processing in IoT scenarios such as and without relying on cloud connectivity. The tile-based design, including a compute on Intel 4 process and I/O on N6, supports scalability in compact form factors like 3.5-inch single-board computers (SBCs) and Computer-on-Modules (COMs), with examples including the iBase IB962 SBC featuring Core Ultra 7/5 U/H-series for up to 64GB DDR5 memory and multiple display outputs. In IoT deployments, Meteor Lake's integrated graphics (up to 8 Xe-cores) and low-power efficient cores facilitate energy-efficient operation in battery-constrained or remote environments, as seen in AAEON's UP Xtreme i14 edge system, which supports connectivity and AI-optimized workloads for applications. Embedded implementations emphasize reliability with extended temperature ranges (-40°C to 85°C) and compliance with standards like COM Express 3.1, as in congatec modules using Meteor Lake-H for real-time control in and medical devices. This integration marks a shift toward AI-ready embedded platforms.

References

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