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SONOS
View on WikipediaSONOS, short for "silicon–oxide–nitride–oxide–silicon", more precisely, "polycrystalline silicon"—"silicon dioxide"—"silicon nitride"—"silicon dioxide"—"silicon",[1]: 121 is a cross sectional structure of MOSFET (metal–oxide–semiconductor field-effect transistor), realized by P.C.Y. Chen of Fairchild Camera and Instrument in 1977.[2] This structure is often used for non-volatile memories, such as EEPROM and flash memories. It is sometimes used for TFT LCD displays.[3] It is one of CTF (charge trap flash) variants. It is distinguished from traditional non-volatile memory structures by the use of silicon nitride (Si3N4 or Si9N10) instead of "polysilicon-based FG (floating-gate)" for the charge storage material.[4]: Fig. 1 A further variant is "SHINOS" ("silicon"—"hi-k"—"nitride"—"oxide"—"silicon"), which is substituted top oxide layer with high-κ material. Another advanced variant is "MONOS" ("metal–oxide–nitride–oxide–silicon").[5]: 137 [6]: 66 Companies offering SONOS-based products include Cypress Semiconductor, Macronix, Toshiba, United Microelectronics Corporation and Floadia Archived 2022-11-01 at the Wayback Machine.
Description
[edit]
A SONOS memory cell is formed from a standard polysilicon N-channel MOSFET transistor with the addition of a small sliver of silicon nitride inserted inside the transistor's gate oxide. The sliver of nitride is non-conductive but contains a large number of charge trapping sites able to hold an electrostatic charge. The nitride layer is electrically isolated from the surrounding transistor, although charges stored on the nitride directly affect the conductivity of the underlying transistor channel. The oxide/nitride sandwich typically consists of a 2 nm thick oxide lower layer, a 5 nm thick silicon nitride middle layer, and a 5–10 nm oxide upper layer.
When the polysilicon control gate is biased positively, electrons from the transistor source and drain regions tunnel through the oxide layer and get trapped in the silicon nitride. This results in an energy barrier between the drain and the source, raising the threshold voltage Vt (the gate-source voltage necessary for current to flow through the transistor). The electrons can be removed again by applying a negative bias on the control gate.
A SONOS memory array is constructed by fabricating a grid of SONOS transistors which are connected by horizontal and vertical control lines (wordlines and bitlines) to peripheral circuitry such as address decoders and sense amplifiers. After storing or erasing the cell, the controller can measure the state of the cell by passing a small voltage across the source-drain nodes; if current flows the cell must be in the "no trapped electrons" state, which is considered a logical "1". If no current is seen the cell must be in the "trapped electrons" state, which is considered as "0" state. The needed voltages are normally about 2 V for the erased state, and around 4.5 V for the programmed state.
Comparison with Floating-Gate structure
[edit]Generally SONOS is very similar to traditional FG (floating gate) type memory cell,[1]: 117 but hypothetically offers higher quality storage. This is due to the smooth homogeneity of the Si3N4 film compared with polycrystalline film which has tiny irregularities. Flash requires the construction of a very high-performance insulating barrier on the gate leads of its transistors, often requiring as many as nine different steps, whereas the oxide layering in SONOS can be more easily produced on existing lines and more easily combined with CMOS logic.
Additionally, traditional flash is less tolerant of oxide defects[citation needed] because a single shorting defect will discharge the entire polysilicon floating gate. The nitride in the SONOS structure is non-conductive, so a short only disturbs a localized patch of charge. Even with the introduction of new insulator technologies this has a definite "lower limit" around 7 to 12 nm, which means it is difficult for flash devices to scale smaller than about 45 nm linewidths. But, Intel-Micron group have realized 16 nm planar flash memory with traditional FG technology.[7]: 13 [8] SONOS, on the other hand, requires a very thin layer of insulator in order to work, making the gate area smaller than flash. This allows SONOS to scale to smaller linewidth, with recent examples being produced on 40 nm fabs and claims that it will scale to 20 nm.[9] The linewidth is directly related to the overall storage of the resulting device, and indirectly related to the cost; in theory, SONOS' better scalability will result in higher capacity devices at lower costs.
Additionally, the voltage needed to bias the gate during writing is much smaller than in traditional flash. In order to write flash, a high voltage is first built up in a separate circuit known as a charge pump, which increases the input voltage to between 9 V to 20 V. This process takes some time, meaning that writing to a flash cell is much slower than reading, often between 100 and 1000 times slower. The pulse of high power also degrades the cells slightly, meaning that flash devices can only be written to between 10,000 and 100,000 times, depending on the type. SONOS devices require much lower write voltages, typically 5–8 V, and do not degrade in the same way. SONOS does suffer from the converse problem however, where electrons become strongly trapped in the ONO layer and cannot be removed again. Over long usage this can eventually lead to enough trapped electrons to permanently set the cell to the "0" state, similar to the problems in flash. However,[citation needed] in SONOS this requires on the order of a 100 thousands write/erase cycles,[10] 10 to 100 times worse compared with legacy FG memory cell.[11]
History
[edit]Background
[edit]In 1957, Frosch and Derick were able to manufacture the first silicon dioxide field effect transistors at Bell Labs, the first transistors in which drain and source were adjacent at the surface.[12] Subsequently, Dawon Kahng led a paper demonstrating a working MOSFET with their Bell Labs team in 1960. Their team included E. E. LaBate and E. I. Povilonis who fabricated the device; M. O. Thurston, L. A. D’Asaro, and J. R. Ligenza who developed the diffusion processes, and H. K. Gummel and R. Lindner who characterized the device.[13][14]
Later, Kahng went on to invent the floating-gate MOSFET with Simon Min Sze at Bell Labs, and they proposed its use as a floating-gate (FG) memory cell, in 1967.[15] This was the first form of non-volatile memory based on the injection and storage of charges in a floating-gate MOSFET,[16] which later became the basis for EPROM (erasable PROM), EEPROM (electrically erasable PROM) and flash memory technologies.[17]
Charge trapping at the time was an issue in MNOS transistors, but John Szedon and Ting L. Chu revealed in June 1967 that this difficulty could be harnessed to produce a nonvolatile memory cell. Subsequently, in late 1967, a Sperry research team led by H.A. Richard Wegener invented the metal–nitride–oxide–semiconductor transistor (MNOS transistor),[18] a type of MOSFET in which the oxide layer is replaced by a double layer of nitride and oxide.[19] Nitride was used as a trapping layer instead of a floating gate, but its use was limited as it was considered inferior to a floating gate.[20] Charge trap (CT) memory was introduced with MNOS devices in the late 1960s. It had a device structure and operating principles similar to floating-gate (FG) memory, but the main difference is that the charges are stored in a conducting material (typically a doped polysilicon layer) in FG memory, whereas CT memory stored charges in localized traps within a dielectric layer (typically made of silicon nitride).[16]
Development
[edit]SONOS was first conceptualized in the 1960s. MONOS is realized in 1968 by Westinghouse Electric Corporation.[21][22] In the early 1970s initial commercial devices were realized using PMOS transistors and a metal-nitride-oxide (MNOS) stack with a 45 nm nitride storage layer. These devices required up to 30V to operate. In 1977, P.C.Y. Chen of Fairchild Camera and Instrument introduced a SONOS cross sectional structured MOSFET with tunnel silicon dioxide of 30 Ångström thickness for EEPROM.[2] According to NCR Corporation's patent application in 1980, SONOS structure required +25 volts and −25 volts for writing and erasing, respectively.[23] It was improved to +12 V by PMOS-based MNOS (metal-nitride-oxide-semiconductor) structure.[24]
By the early 1980s, polysilicon NMOS-based structures were in use with operating voltages under 20 V. By the late 1980s and early 1990s PMOS SONOS structures were demonstrating program/erase voltages in the range of 5–12 volts.[25] On the other hand, in 1980, Intel realized highly reliable EEPROM with double layered polysilicon structure, which is named FLOTOX,[26] both for erase and write cycling endurance and for data retention term.[27] SONOS has been in the past produced by Philips Semiconductors, Spansion, Qimonda and Saifun Semiconductors.
Recent efforts
[edit]In 2002, AMD and Fujitsu, formed as Spansion in 2003 and later merged with Cypress Semiconductor in 2014, developed a SONOS-like MirrorBit technology based on the license from Saifun Semiconductors, Ltd.'s NROM technology.[28][29][30] As of 2011 Cypress Semiconductor developed SONOS memories for multiple processes,[31] and started to sell them as IP to embed in other devices.[32] UMC has already used SONOS since 2006 [33] and has licensed Cypress for 40 nm[34] and other nodes. Shanghai Huali Microelectronics Corporation (HLMC) has also announced[35] to be producing Cypress SONOS at 40 nm and 55 nm.
In 2006, Toshiba developed a new double tunneling layer technology with SONOS structure, which utilize Si9N10 silicon nitride.[36][37] Toshiba also researches MONOS ("Metal-Oxide-Nitride-Oxide-Silicon") structure for their 20 nm node NAND gate type flash memories.[38] Renesas Electronics uses MONOS structure in 40 nm node era.[39][40]: 5 which is the result of collaboration with TSMC.[41]
While other companies still use FG (floating gate) structure.[42]: 50 For example, GlobalFoundries use floating-gate-based split-gate SuperFlash ESF3 cell for their 40 nm products.[43] Some new structure for FG (floating gate) type flash memories are still intensively studied.[44] In 2016, GlobalFoundries developed FG-based 2.5V Embedded flash macro.[45] In 2017, Fujitsu announced to license FG-based ESF3/FLOTOX structure,[26][27] which is originally developed by Intel in 1980, from Silicon Storage Technology for their embedded non-volatile memory solutions.[46][47][48] As of 2016, Intel-Micron group have disclosed that they stayed traditional FG technology in their 3-dimensional NAND flash memory.[7] They also use FG technology for 16 nm planar NAND flash.[8]
See also
[edit]References
[edit]- ^ a b Micheloni, Rino; Crippa, Luca; Marelli, Alessia (2010). Inside NAND Flash Memories (Google Books). Springer Science & Business Media. ISBN 9789048194315.
- ^ a b Chen, P. C. Y. (1977). "Threshold-alterable Si-gate MOS devices". IEEE Transactions on Electron Devices. 24 (5): 584–586. Bibcode:1977ITED...24..584C. doi:10.1109/T-ED.1977.18783. ISSN 0018-9383. S2CID 25586393.
- ^ Chen, S. C.; Chang, T. C.; Liu, P. T.; Wu, Y. C.; Lin, P. S.; Tseng, B. H.; Shy, J. H.; Sze, S. M.; Chang, C. Y.; Lien, C. H. (2007). "A Novel Nanowire Channel Poly-Si TFT Functioning as Transistor and Nonvolatile SONOS Memory". IEEE Electron Device Letters. 28 (9): 809–811. Bibcode:2007IEDL...28..809C. doi:10.1109/LED.2007.903885. ISSN 0741-3106. S2CID 40413991.
- ^ Lee, M. C.; Wong, H. Y. (2013). "Charge Loss Mechanisms of Nitride-Based Charge Trap Flash Memory Devices". IEEE Transactions on Electron Devices. 60 (10): 3256–3264. Bibcode:2013ITED...60.3256L. doi:10.1109/TED.2013.2279410. ISSN 0018-9383. S2CID 41506023.
- ^ Prince, Betty (2007). Emerging Memories: Technologies and Trends. Springer Science & Business Media. ISBN 9780306475535.
- ^ Remond, I.; Akil, N. (May 2006). "Modeling of transient programming and erasing of SONOS non-volatile memories". Technical Note PR-TN 2006/00368. Koninklijke Philips Electronics N.V. CiteSeerX 10.1.1.72.314.
- ^ a b "NAND Flash Memory Roadmap" (PDF). TechInsights Inc. June 2016. Archived from the original (PDF) on 2018-06-25. Retrieved 2018-03-23.
- ^ a b CHOE, JEONGDONG. "Deep dive into the Intel/Micron 3D 32L FG-NAND". www.techinsights.com.
- ^ Samsung unwraps 40nm "charge trap flash" device // ElectroIQ, 2006-09
- ^ Wang, S. Y.; Lue, H. T.; Hsu, T. H.; Du, P. Y.; Lai, S. C.; Hsiao, Y. H.; Hong, S. P.; Wu, M. T.; Hsu, F. H.; Lian, N. T.; Lu, C. P.; Hsieh, J. Y.; Yang, L. W.; Yang, T.; Chen, K. C.; Hsieh, K. Y.; Lu, C. Y. (2010). "A high-endurance (≫100K) BE-SONOS NAND flash with a robust nitrided tunnel oxide/Si interface". 2010 IEEE International Reliability Physics Symposium. pp. 951–955. doi:10.1109/IRPS.2010.5488698. ISBN 978-1-4244-5430-3. S2CID 23505564.
- ^ Arai, F.; Maruyama, T.; Shirota, R. (1998). "Extended data retention process technology for highly reliable flash EEPROMs of 10/Sup 6/ To 10/Sup 7/ W/E cycles". 1998 IEEE International Reliability Physics Symposium Proceedings 36th Annual (Cat No 98CH36173) RELPHY-98. pp. 378–382. doi:10.1109/RELPHY.1998.670672. ISBN 0-7803-4400-6. S2CID 110355820.
- ^ Frosch, C. J.; Derick, L (1957). "Surface Protection and Selective Masking during Diffusion in Silicon". Journal of the Electrochemical Society. 104 (9): 547. doi:10.1149/1.2428650.
- ^ KAHNG, D. (1961). "Silicon-Silicon Dioxide Surface Device". Technical Memorandum of Bell Laboratories: 583–596. doi:10.1142/9789814503464_0076. ISBN 978-981-02-0209-5.
{{cite journal}}: ISBN / Date incompatibility (help) - ^ Lojek, Bo (2007). History of Semiconductor Engineering. Berlin, Heidelberg: Springer-Verlag Berlin Heidelberg. p. 321. ISBN 978-3-540-34258-8.
- ^ Kahng, Dawon; Sze, Simon Min (July–August 1967). "A floating gate and its application to memory devices". The Bell System Technical Journal. 46 (6): 1288–1295. Bibcode:1967ITED...14Q.629K. doi:10.1002/j.1538-7305.1967.tb01738.x.
- ^ a b Ioannou-Soufleridis, V.; Dimitrakis, Panagiotis; Normand, Pascal (2015). "Chapter 3: Charge-Trap Memories with Ion Beam Modified ONO Stracks". Charge-Trapping Non-Volatile Memories: Volume 1 – Basic and Advanced Devices. Springer. pp. 65–102 (65). ISBN 9783319152905.
- ^ "Not just a flash in the pan". The Economist. March 11, 2006. Retrieved 10 September 2019.
- ^ Wegener, H. A. R.; Lincoln, A. J.; Pao, H. C.; O'Connell, M. R.; Oleksiak, R. E.; Lawrence, H. (October 1967). The variable threshold transistor, a new electrically-alterable, non-destructive read-only storage device. 1967 International Electron Devices Meeting. Vol. 13. p. 70. doi:10.1109/IEDM.1967.187833.
- ^ Brodie, Ivor; Muray, Julius J. (2013). The Physics of Microfabrication. Springer Science & Business Media. p. 74. ISBN 9781489921604.
- ^ Prall, Kirk; Ramaswamy, Nirmal; Goda, Akira (2015). "Chapter 2: A Synopsis on the State of the Art of NAND Memories". Charge-Trapping Non-Volatile Memories: Volume 1 – Basic and Advanced Devices. Springer. pp. 37–64 (39). ISBN 9783319152905.
- ^ Dummer, G. W. A. (2013). Electronic Inventions and Discoveries: Electronics from Its Earliest Beginnings to the Present Day (Google Books). Elsevier. ISBN 9781483145211.
- ^ Keshavan, B. V.; Lin, H. C. (October 1968). "MONOS memory element". 1968 International Electron Devices Meeting. Vol. 14. pp. 140–142. doi:10.1109/IEDM.1968.188066.
- ^
TRUDEL, L; DHAM, V (1980-09-11). "Application WO1981000790: Silicon gate non-volatile memory device". Google Patents. NCR Corporation.
The initialization procedure (steps 1, 4 and 7), i.e. obtaining the initial written and erased state threshold voltages, involved applying +25 volts for three seconds and -25 volts for three seconds, respectively, at room temperature to the gates of the memory FETs. Source, drain and substrate were all tied to ground during this initialization.
- ^ TRUDEL, MURRAY L; LOCKWOOD, GEORGE C; EVANS, EVANS G (1980-10-01). "Patent US4353083: Low voltage nonvolatile memory device". Google Patents. NCR Corporation.
- ^ White, M.H.; Adams, D.A.; Bu, J. (2000). "On the go with SONOS". IEEE Circuits and Devices Magazine. 16 (4): 22–31. doi:10.1109/101.857747.
- ^ a b Johnson, W.; Perlegos, G.; Renninger, A.; Kuhn, G.; Ranganath, T. (1980). "A 16Kb electrically erasable nonvolatile memory". 1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. Vol. XXIII. pp. 152–153. doi:10.1109/ISSCC.1980.1156030. S2CID 44313709.
- ^ a b
Euzent, B.; Boruta, N.; Lee, J.; Jenq, C. (1981). "Reliability Aspects of a Floating Gate E2 PROM". 19th International Reliability Physics Symposium. pp. 11–16. doi:10.1109/IRPS.1981.362965. S2CID 41116025.
The Intel 2816 uses the FLOTOX structure, which has been discussed in detail in the literaturel. Basically, it utilizes an oxide of less than 200A thick between the floating polysilicon gate and the N+ region as shown in Figure 1. - ^ "AMD, FUJITSU AND SAIFUN ANNOUNCE COLLABORATION - News Room - FUJITSU". pr.fujitsu.com.
- ^ Vogler, Debra (November 2007). "Spansion makes diversity play with SONOS-based MirrorBit technology | Solid State Technology". electroiq.com. Retrieved 23 March 2018.
- ^ "Spansion Unveils Plans for SONOS-based MirrorBit(R) ORNAND(TM) Family". www.cypress.com. Spansion Inc.
- ^ Ramkumar, Krishnaswamy; Jin, Bo (29 Sep 2011). "Advantages of SONOS memory for embedded flash technology". EE Times.
- ^ Cypress SONOS Technology
- ^ LaPedus, Mark (19 Apr 2006). "UMC fabs Sonos memory chip". EE Times.
- ^ Cypress Press Release, 21 Jan 2015
- ^ "HLMC and Cypress Announce Initial Production Milestone of Embedded Flash Using 55-Nanometer Low Power Process Technology with SONOS Flash". PRNewswire. 12 Apr 2017.
- ^ Ohba, R.; Mitani, Y.; Sugiyama, N.; Fujita, S. (2006). "25 nm Planar Bulk SONOS-type Memory with Double Tunnel Junction". 2006 International Electron Devices Meeting. pp. 1–4. doi:10.1109/IEDM.2006.346945. ISBN 1-4244-0438-X. S2CID 5676069.
- ^ LaPedus, Mark (2007-12-12). "Toshiba puts new twist on SONOS | EE Times". EETimes.
- ^ Sakamoto, W.; Yaegashi, T.; Okamura, T.; Toba, T.; Komiya, K.; Sakuma, K.; Matsunaga, Y.; Ishibashi, Y.; Nagashima, H.; Sugi, M.; Kawada, N.; Umemura, M.; Kondo, M.; Izumida, T.; Aoki, N.; Watanabe, T. (2009). "Reliability improvement in planar MONOS cell for 20nm-node multi-level NAND Flash memory and beyond". 2009 IEEE International Electron Devices Meeting (IEDM). pp. 1–4. doi:10.1109/IEDM.2009.5424211. ISBN 978-1-4244-5639-0. S2CID 29253924.
- ^ Kono, T.; Ito, T.; Tsuruda, T.; Nishiyama, T.; Nagasawa, T.; Ogawa, T.; Kawashima, Y.; Hidaka, H.; Yamauchi, T. (2013). "40nm embedded SG-MONOS flash macros for automotive with 160MHz random access for code and endurance over 10M cycles for data". 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers. pp. 212–213. doi:10.1109/ISSCC.2013.6487704. ISBN 978-1-4673-4516-3. S2CID 29355030.
- ^ Fischer, T.; Nam, B. G.; Chang, L.; Kuroda, T.; Pertijs, M. A. P. (2013). "Highlights of the ISSCC 2013 Processors and High Performance Digital Sessions". IEEE Journal of Solid-State Circuits. 49 (1): 4–8. doi:10.1109/JSSC.2013.2284658. ISSN 0018-9200.
- ^ Yoshida, Junko (2012-05-28). "Renesas, TSMC tout licensable MCU platform using 40-nm eFlash | EE Times". EETimes.
- ^ Dimitrakis, Panagiotis (2017). Charge-Trapping Non-Volatile Memories: Volume 2--Emerging Materials and Structures (Google Books). Springer. ISBN 9783319487052.
- ^ Luo, L. Q.; Teo, Z. Q.; Kong, Y. J.; Deng, F. X.; Liu, J. Q.; Zhang, F.; Cai, X. S.; Tan, K. M.; Lim, K. Y.; Khoo, P.; Jung, S. M.; Siah, S. Y.; Shum, D.; Wang, C. M.; Xing, J. C.; Liu, G. Y.; Diao, Y.; Lin, G. M.; Tee, L.; Lemke, S. M.; Ghazavi, P.; Liu, X.; Do, N.; Pey, K. L.; Shubhakar, K. (May 2016). "Functionality Demonstration of a High-Density 2.5V Self-Aligned Split-Gate NVM Cell Embedded into 40nm CMOS Logic Process for Automotive Microcontrollers" (PDF). 2016 IEEE 8th International Memory Workshop (IMW). pp. 1–4. doi:10.1109/IMW.2016.7495271. ISBN 978-1-4673-8833-7. S2CID 36398631.
- ^ Zhou, Ye; Han, Su-Ting; Yan, Yan; Huang, Long-Biao; Zhou, Li; Huang, Jing; Roy, V. A. L. (31 October 2013). "Solution processed molecular floating gate for flexible flash memories". Scientific Reports. 3 (1). Macmillan Publishers Limited: 3093. Bibcode:2013NatSR...3E3093Z. doi:10.1038/srep03093. ISSN 2045-2322. PMC 3813938. PMID 24172758.
- ^ Luo, L. Q.; Teo, Z. Q.; Kong, Y. J.; Deng, F. X.; Liu, J. Q.; Zhang, F.; Cai, X. S.; Tan, K. M.; Lim, K. Y.; Khoo, P.; Jung, S. M.; Siah, S. Y.; Shum, D.; Wang, C. M.; Xing, J. C.; Liu, G. Y.; Diao, Y.; Lin, G. M.; Tee, L.; Lemke, S. M.; Ghazavi, P.; Liu, X.; Do, N.; Pey, K. L.; Shubhakar, K. (May 2016). "Functionality Demonstration of a High-Density 2.5V Self-Aligned Split-Gate NVM Cell Embedded into 40nm CMOS Logic Process for Automotive Microcontrollers" (PDF). 2016 IEEE 8th International Memory Workshop (IMW). pp. 1–4. doi:10.1109/IMW.2016.7495271. ISBN 978-1-4673-8833-7. S2CID 36398631.
- ^ "Mie Fujitsu and SST Announce Automotive Platform Development on 40nm Technology : MIE FUJITSU SEMICONDUCTOR LIMITED". www.fujitsu.com. 2017-08-07.
- ^ "Embedded Non-Volatile Memory Solutions : MIE FUJITSU SEMICONDUCTOR LIMITED". www.fujitsu.com. Fujitsu.
- ^ Broome, Sarah. "Mie Fujitsu and SST Announce Automotive Platform Development on 40nm Technology". www.sst.com. Silicon Storage Technology.
External links
[edit]- Chen, P.C.Y. (1977). "Threshold-alterable Si-gate MOS devices". IEEE Transactions on Electron Devices. 24 (5): 584–586. Bibcode:1977ITED...24..584C. doi:10.1109/T-ED.1977.18783. S2CID 25586393.
- White, M.H.; Adams, D.A.; Murray, J.R.; Wrazien, S.; Yijie Zhao; Yu Wang; Khan, B.; Miller, W.; Mehrotra, R. (2004). "Characterization of scaled SONOS EEPROM memory devices for space and military systems". Proceedings. 2004 IEEE Computational Systems Bioinformatics Conference. pp. 51–59. doi:10.1109/NVMT.2004.1380804. ISBN 0-7803-8726-0. S2CID 3034615.
- Gutmann (2001) papaer: "Data Remanence in Semiconductor Devices" | USENIX
SONOS
View on GrokipediaHistory
Founding and early years
Sonos was founded in 2002 in Santa Barbara, California, by John MacFarlane, Tom Cullen, Trung Mai, and Craig Shelburne as Rincon Audio, Inc., a startup dedicated to developing wireless multi-room audio systems for the home.[7] The founders, who had previously worked together at Software.com, drew inspiration from the rise of digital music distribution like Napster and sought to create a modern stereo system that leveraged emerging wireless technologies for synchronized playback across multiple rooms.[7] Their vision emphasized simplicity and reliability, aiming to eliminate the need for cumbersome wiring or centralized servers common in traditional audio setups.[4] Development in the early years was marked by significant technical challenges, particularly in engineering a proprietary wireless mesh network to deliver uncompressed audio streams without latency or dropouts.[8] Standard Wi-Fi at the time was prone to interference and insufficient for real-time multi-room synchronization, so the team invested heavily in custom protocols that allowed devices to communicate directly in a self-healing mesh, bypassing many of Wi-Fi's limitations.[8] By summer 2004, after iterative prototyping and debugging, Sonos achieved functional reliability, enabling the first demonstrations of the technology.[9] These prototypes were showcased at the 2004 International Consumer Electronics Show and a Wall Street Journal conference, where they impressed industry observers with seamless playback across zones.[7] To fuel this innovation, Sonos raised early capital, including a $2.25 million Series A round in January 2005 led by investors such as Index Ventures.[10] A follow-on $15 million Series A extension in August 2005 provided further resources for scaling production and refinement.[11] These funds supported the completion of the inaugural product line. The company's first commercial offering, the Sonos Digital Music System, launched on January 27, 2005, consisting of the ZonePlayer ZP100 (a wired amplifier with wireless connectivity) and the CR100 Controller (a handheld device for music selection and control).[9] Priced at around $1,200 for a starter bundle, it allowed users to connect up to 32 zones for gapless, synchronized audio playback from sources like PCs or network-attached storage, all without a central hub—relying instead on the distributed mesh network for coordination.[7] Initial sales targeted high-end audio retailers, and the system received acclaim for its innovative approach to wireless home audio.[9]Corporate expansion and financial milestones
Sonos went public on August 2, 2018, listing on the NASDAQ under the ticker symbol SONO, with shares priced at $15 each. The initial public offering involved the sale of 13,888,888 shares, providing the company with gross proceeds of $95.8 million before underwriting discounts and expenses.[12] This milestone marked Sonos' transition from a privately held firm to a publicly traded entity, enabling broader access to capital for expansion amid growing competition in the smart audio market.[13] To bolster its technological capabilities, Sonos pursued strategic acquisitions in the years following its IPO. In November 2019, the company acquired Snips, a French AI voice platform developer, for approximately $37.5 million, integrating on-device voice processing expertise to enhance privacy-focused smart speaker features.[14] In April 2022, Sonos expanded its acoustic innovation by purchasing Mayht Holding BV, a Dutch firm specializing in advanced transducer technology, for about $100 million in cash, aiming to improve sound quality across its product lineup.[15] These moves supported Sonos' push into AI and premium audio engineering, diversifying beyond core multi-room systems. Financial growth accelerated post-IPO, with Sonos achieving its first billion-dollar revenue year in fiscal 2021, reporting $1.716 billion in sales, a 29% increase from the prior year driven by strong demand for home audio during the pandemic.[16] By fiscal 2025, annual revenue reached $1.443 billion, reflecting resilience despite market challenges. In the fourth quarter of fiscal 2025, revenue grew 13% year-over-year to $287.9 million, exceeding analyst expectations and signaling recovery momentum.[17] Leadership transitions underscored Sonos' evolution in 2025. Patrick Spence, who assumed the CEO role in January 2017 after serving as chief commercial officer, stepped down in January 2025 amid efforts to address operational hurdles, including the fallout from a problematic 2024 app update that temporarily impacted customer satisfaction and sales.[18] Tom Conrad, a board member since 2017 and former executive at Loudeye and Pandora, was appointed interim CEO effective immediately and later confirmed as permanent CEO in July 2025.[19] Under Conrad's leadership, Sonos announced a pivot to a direct-to-consumer sales model in late 2025, aiming to capture higher margins by reducing reliance on third-party retailers and targeting existing users for upgrades and expansions. This strategy, outlined in the fiscal 2025 earnings, emphasizes efficiency and customer retention to drive sustainable growth.[17]Product development timeline
Sonos' product development began with the launch of its first all-in-one wireless speaker, the Play:5, in November 2009, marking a significant shift toward standalone Wi-Fi-enabled audio devices that integrated amplification and streaming without requiring separate components.[4] This innovation allowed users to stream music wirelessly across multiple rooms, building on earlier ZonePlayer products that needed external speakers. The Play:5's introduction democratized multi-room audio by reducing setup complexity and cost, positioning Sonos as a leader in wireless home sound systems. In 2012, Sonos discontinued production of its dedicated hardware controllers, such as the CR200, transitioning fully to app-based control via smartphones and tablets to simplify user interaction and leverage the growing ubiquity of mobile devices.[20] This move eliminated the need for proprietary remotes, enabling seamless management through the Sonos app, which had debuted for iOS in 2009 and expanded to Android in 2011. The change streamlined the ecosystem, fostering broader adoption as users could control playback, grouping, and streaming services directly from their phones. The company advanced voice integration with the Sonos One in October 2017, its first smart speaker featuring built-in microphones and Amazon Alexa support at launch, followed by Google Assistant in 2018.[21] Priced at $199, the Sonos One emphasized privacy with user-disableable mics and expanded Sonos' multi-room capabilities to include hands-free voice commands for music playback and smart home control. This launch represented a pivot toward voice-assisted audio, enhancing accessibility while maintaining high-fidelity sound. In 2020, Sonos rolled out its S2 operating system on June 8, introducing support for high-resolution audio, Dolby Atmos, and expanded streaming services, but requiring compatible hardware and leaving older devices on the legacy S1 platform without access to new features.[22] The update split the ecosystem into S1 and S2, with S1-relegated products like the original Play:5 unable to upgrade, prompting users to either retain legacy functionality or purchase newer models for full compatibility. This bifurcation aimed to future-proof the platform amid evolving audio standards, though it drew criticism for potentially stranding early adopters. Sonos expanded its lineup with the Era series on March 28, 2023, launching the Era 100 and Era 300 speakers with upgraded far-field microphone arrays for enhanced voice pickup and improved Trueplay room calibration.[23] The Era 100, succeeding the Sonos One, offered stereo sound in a compact form, while the Era 300, priced at $449, introduced spatial audio with Dolby Atmos support via six drivers. These models prioritized future-ready connectivity, including Bluetooth and line-in options, reflecting Sonos' focus on immersive listening without sacrificing multi-room synchronization. Venturing into personal audio, Sonos debuted its first headphones, the Ace, in May 2024, available from June 5 at $449, featuring active noise cancellation, 30-hour battery life, and integration with Sonos soundbars for private TV listening.[24] The over-ear design emphasized premium materials and aware mode for ambient sound, extending Sonos' ecosystem to mobile use while supporting lossless audio over Wi-Fi. By 2025, Sonos shifted emphasis to software enhancements, announcing AI-powered speech enhancement features in April for improved dialogue clarity in home theater setups, alongside plans for AI-driven "personalities" in voice interactions without introducing new hardware until at least Q2 2026.[25] These updates targeted existing customers with free over-the-air improvements, focusing on ecosystem density through app refinements and service integrations to boost relevance amid competitive AI audio advancements.[26]Branding and marketing evolution
Sonos' branding began with a simple wordmark logo introduced in 2002, featuring the company name in a clean, sans-serif font without additional graphical elements, which remained in use until 2011.[27] In 2015, the brand underwent a significant redesign led by Bruce Mau Design, introducing a minimalist wave icon that created an optical illusion resembling a pulsating speaker to evoke high-fidelity sound waves; this ambigram logo could be read in multiple orientations and marked a shift toward a more dynamic visual identity.[28][29] Early marketing efforts in the mid-2000s relied heavily on word-of-mouth recommendations among audio enthusiasts and in-person tech demonstrations, such as the public unveiling of the ZP100 player at CES in 2005, which helped build grassroots awareness without large-scale advertising budgets.[4] By the late 2010s, Sonos shifted toward high-profile partnerships and artist endorsements to broaden appeal, including collaborations with designers like HAY in 2018 for limited-edition speakers and the launch of Sonos Radio in 2019 featuring curated content from Grammy-winning artists such as Brittany Howard and Thom Yorke.[25][30] In the 2020s, marketing emphasized sustainability, with the introduction of the Climate Action Plan in 2020 committing to carbon neutrality by 2030 and annual "Listen Better" reports highlighting eco-friendly practices like recycled materials and energy-efficient designs.[25] A 2023 brand refresh maintained the 2015 logo but introduced a seasonal color palette inspired by Santa Barbara's natural scenery—Sky, Rose, Sand, Rust, and Pine—to enhance visual flexibility and integration with product apps and interfaces.[31] The same year, the "Listen Better" initiative promoted music advocacy and multi-room listening experiences through grants supporting artists' rights and immersive audio campaigns like the "Frisson Trigger," which used sound to evoke emotional responses in shared environments.[32][33] In response to reputational challenges from a 2024 app update debacle, Sonos hired advertising executive Colleen DeCourcy as chief marketing officer in January 2026 to lead brand revival efforts, focusing on innovative strategies including AI-enhanced voice and audio personalization to reengage customers.[34][26] This move aligns with Sonos' broader 2025 pivot toward AI integration in products to differentiate in the competitive smart audio market.[35]Products
Current speakers and components
Sonos offers a range of current speakers and components designed for seamless integration into multi-room audio setups, emphasizing wireless connectivity, high-fidelity sound, and compatibility across the ecosystem.[36] These products include bookshelf speakers, portable options, subwoofers, amplifiers, architectural audio components, and headphones, all supporting streaming via Wi-Fi and Bluetooth while prioritizing ease of use and acoustic precision. The Sonos Era 100, released in 2023, is a mid-range stereo bookshelf speaker that delivers balanced sound through three Class-D digital amplifiers, a single tweeter, and a mid-woofer, housed in a compact matte-finish enclosure measuring 7.19 inches high by 4.72 inches wide by 5.14 inches deep and weighing 4.45 pounds.[37] It features Wi-Fi 6, Bluetooth 5.0 for direct streaming, and a USB-C line-in port for connecting analog sources like turntables, enabling versatile playback options including Apple AirPlay 2 and voice control via Alexa or Sonos Voice Control.[37] Trueplay tuning optimizes audio for room acoustics using a smartphone, ensuring clear stereo imaging suitable for smaller spaces.[37] The Sonos Era 100 Pro, launched in January 2025, is a professional installation variant of the Era 100, featuring Power over Ethernet (PoE+) connectivity and zone capability for commercial and custom residential audio systems. It retains the same acoustic design with three Class-D amplifiers, tweeter, and mid-woofer, but adds enhanced networking for zoned playback and integration with professional setups.[38] The Sonos Era 300, released on March 28, 2023, at a price of $449 USD, is a premium wireless smart speaker designed for spatial audio with Dolby Atmos support. It features six Class-D amplifiers driving six drivers — four tweeters (one upward-firing, two side-firing, and one forward-firing) and two mid-woofers — for directional sound, creating an immersive soundstage with height effects in a design that stands 6.3 inches high by 10.24 inches wide by 7.28 inches deep and weighs 9.85 pounds.[39] Connectivity mirrors the Era 100 with Wi-Fi 6, Bluetooth 5.0, and USB-C line-in, allowing for line-in adapter use and stereo pairing for enhanced home audio experiences.[39] As of early 2026, the Era 300 remains a current product with ongoing support, including recent firmware updates such as version 92.0-72171 released on January 6, 2026, for bug fixes and performance improvements.[40] It integrates well with newer Sonos products like the Arc Ultra soundbar and Sub (Gen 4) for enhanced immersive audio setups in home theater configurations.[41] The Sonos Era 300 excels in immersive spatial audio (Dolby Atmos), delivering a wide, detailed, and dynamic soundstage from a single speaker with punchy bass and strong performance for streaming and multi-room use. However, traditional hi-fi speakers (passive separates with amplifiers) generally offer superior detail, accuracy, stereo imaging, and upgradability for critical music listening, though they require more setup and lack built-in smart features or spatial audio support.[42][43] The Sonos Ace, released in May 2024, are over-ear wireless headphones supporting Dolby Atmos with head-tracking spatial audio, active noise cancellation, and integration with the Sonos ecosystem for TV Audio Swap with compatible soundbars. They feature Bluetooth 5.4, up to 30 hours of battery life, and a premium build, priced at MSRP $449 (currently $399 as of November 2025).[44] When connected via Bluetooth to Windows devices, the Sonos Ace headphones are compatible with Equalizer APO, enabling system-wide EQ adjustments. Custom EQ profiles for the Sonos Ace are available through community projects like AutoEq, designed for use with Equalizer APO and Peace GUI. No specific compatibility issues have been reported in user discussions or reviews.[45][46] For portability, the Sonos Roam 2, updated in 2024, is an ultra-compact Bluetooth speaker with IP67 dust- and waterproof rating, capable of submersion in up to 3 feet of water for 30 minutes, and offers up to 10 hours of battery life at moderate volumes in a cylindrical form factor standing 6.61 inches high and weighing 0.95 pounds.[47] It supports Wi-Fi and Bluetooth 5.2 streaming, automatic Trueplay tuning, and drop resistance up to 5 feet, facilitating on-the-go use with quick USB-C charging and integration into Sonos multi-room systems via the app.[47] The speaker's mid-woofer and tweeter configuration provides mono sound with surprising bass for its size.[47] The Sonos Move 2, refreshed in 2023, serves as a larger portable speaker with IP56 weather resistance, up to 24 hours of battery life, and a removable battery for extended use, enclosed in a 9.49-inch-high by 6.3-inch-wide by 5-inch-deep body weighing 6.61 pounds with a handle for easy transport.[48] Equipped with three Class-D amplifiers, two tweeters, and a mid-woofer, it delivers stereo sound over Wi-Fi 6 and Bluetooth 5.0, including USB-C charging and line-in capabilities via adapter, while supporting sound calibration for indoor or outdoor environments.[48] Its robust build handles varied settings, from home patios to travel.[48] The Move 2 must be set up on a Wi-Fi network using the Sonos app before Bluetooth connectivity can be used.[49] Wi-Fi setup steps:- Plug the included charging base into power and place the Move 2 on the charging base; a blinking green light on the front indicates it is ready to set up.
- Download the Sonos app for iOS or Android.
- Open the app; for a new system, follow the "Get started with setup" prompts, or for an existing system, go to Settings > Add Speaker or Component.
- Follow the on-screen prompts to connect the speaker to your Wi-Fi network.
- Press and hold the Bluetooth button on the back of the Move 2 until you hear a chime and the status LED starts flashing blue.
- On your Bluetooth-enabled device, go to Bluetooth settings and select "Sonos Move 2" from the list of available devices. Upon successful pairing, a chime sounds and the LED turns solid blue briefly.[50]
