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Broadwell (microarchitecture)
Broadwell (microarchitecture)
Broadwell (microarchitecture)
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Broadwell
General information
LaunchedOctober 27, 2014; 11 years ago (October 27, 2014)
DiscontinuedNovember 2018[1]
Marketed byIntel
Designed byIntel
Common manufacturer
  • Intel
CPUID code0306D4h
Product code
  • 80658 (mainstream desktop/mobile, Xeon E3)
  • 80660 (Xeon E5)
  • 80669 (Xeon E7)
  • 80671 (enthusiast desktop)
  • 80674 (Xeon D)
  • 80682 (Xeon D, Hewitt Lake)
Performance
QPI speeds6.4 GT/s to 9.6 GT/s
DMI speeds4 GT/s
Physical specifications
Cores
    • 2–4 (mainstream)
    • 6–10 (enthusiast)
    • 4–24 (Xeon)
GPUs
  • HD 5300
  • HD 5500
  • HD 5700P
  • HD 6000
  • HD 6100
  • HD 6200
  • HD 6300P
  • HD Graphics
Sockets
Cache
L1 cache64 KB per core
L2 cache256 KB per core
L3 cache2-6 MB (shared)
L4 cache128 MB of eDRAM (Iris Pro models only)
Architecture and classification
Technology node14 nm (Tri-Gate)
MicroarchitectureHaswell
Instruction setx86-16, IA-32, x86-64
Extensions
Products, models, variants
Product code name
  • Rockwell
Brand name
History
Predecessors
SuccessorSkylake (tock/architecture)
Support status
Unsupported
Haswell and Broadwell feature a Fully Integrated Voltage Regulator.

Broadwell (previously Rockwell) is the fifth generation of the Intel Core processor. It is Intel's codename for the 14 nanometer die shrink of its Haswell microarchitecture. It is a "tick" in Intel's tick–tock principle as the next step in semiconductor fabrication.[2][3][4] Like some of the previous tick-tock iterations, Broadwell did not completely replace the full range of CPUs from the previous microarchitecture (Haswell), as there were no low-end desktop CPUs based on Broadwell.[5]

Some of the processors based on the Broadwell microarchitecture are marketed as "5th-generation Core" i3, i5 and i7 processors. This moniker is however not used for marketing of the Broadwell-based Celeron, Pentium or Xeon chips. This microarchitecture also introduced the Core M processor branding.

Broadwell's H and C variants are used in conjunction with Intel 9 Series chipsets (Z97, H97 and HM97),[6] in addition to retaining backward compatibility with some of the Intel 8 Series chipsets.[citation needed]

Design and variants

[edit]

Broadwell has been launched in three major variants:[7]

  • BGA package:
    • Broadwell-Y: system on a chip (SoC); 4.5 W and 3.5 W thermal design power (TDP) classes, for tablets and certain ultrabook-class implementations. GT2 GPU was used, while maximum supported memory is 8 GB of LPDDR3-1600.[8] These were the first chips to roll out, in Q3/Q4 2014. At Computex 2014, Intel announced that these chips would be branded as Core M.[9] TSX instructions are disabled in this series of processors because a bug that cannot be fixed with a microcode update exists.[10]
    • Broadwell-U: SoC; two TDP classes – 15 W for 2+2 and 2+3 configurations (two cores with a GT2 or GT3 GPU) as well as 28 W for 2+3 configurations.[11] Designed to be used on motherboards with the PCH-LP chipset for Intel's ultrabook and NUC platforms. Maximum supported is up to 16 GB of DDR3 or LPDDR3 memory, with DDR3-1600 and LPDDR3-1867 as the maximum memory speeds. The 2+2 configuration is scheduled for Q4 2014, while the 2+3 is estimated for Q1 2015.[7] For Broadwell-U models with integrated 5x00 GPUs, die size is 82 mm2 with a total of 1.3 billion transistors, while for the models with 6100 and 6200 GPUs the die size is 133 mm2 with a total of 1.9 billion transistors.
    • Broadwell-H: 37 W and 47 W TDP classes, for motherboards with HM86, HM87, QM87 and the new HM97 chipsets for "all-in-one" systems, mini-ITX form-factor motherboards, and other small footprint formats. It was expected to come in two different variants, as single and dual chips; the dual chips (4 cores, 8 threads) would have GT3e and GT2 GPU, while a single chip (SoC; two cores, four threads) would have GT3e GPU. Maximum supported memory is 32 GB of DDR3-1600.[8] These are scheduled for Q2 2015.[7]
  • LGA 1150 socket:
  • LGA 2011-1 socket:
    • Broadwell-EX: Brickland platform, for mission-critical servers. Intel QuickPath Interconnect (QPI) is expected to be updated to version 1.1, enabling seamless scaling beyond eight-socket systems. Maximum supported memory speeds are expected to be DDR3-1600 and DDR4-1866.[13][14] Up to 24 core and 48 threads, up to 60 MB of L3 cache and 32 PCI Express 3.0 lanes, with 115–165 W TDP.
  • LGA 2011-v3 socket:
    Intel i7 6800K
    • Broadwell-EP: to be marketed as Xeon E5-2600 v4 etc., while using the C610 Wellsburg chipset platform. Up to 22 cores and 44 threads, up to 55 MB of total cache and 40 PCI Express 3.0 lanes, with 55–160 W TDP classes. Maximum supported memory speed is quad-channel DDR4-2400.[15]
    • Broadwell-E: HEDT platform, for enthusiasts. Announced at Computex 2016, it was released in July that year. Consisting of four processors: the 6800K, 6850K, 6900K, and the deca-core 6950X, with clock speeds ranging from 3 GHz to 4 GHz as well as up to 25 MB of L3 cache.

Architecture changes compared to Haswell

[edit]

Unusually for a "tick", Broadwell introduces some instruction set architecture extensions[16][17] not present in earlier versions of the Haswell microarchitecture:

CPU

[edit]

GPU

[edit]

I/O

[edit]
  • 90 series chipset: H97 and Z97
  • Add PCIe M.2 support (only H97 and Z97)

All versions of Haswell except for the Haswell-EX variants has been fixed with a new CPU stepping level.Erratum: In fact, among Broadwell i3, i5 and i7 CPUs, only four of them support TSX instructions (i7 5650U and 5600U, i5 5350U and 5300U); it is not even precised on Intel's website whether i5 5200U does support TSX instructions.

List of Broadwell processors

[edit]

Desktop processors

[edit]
Processor branding
and model 		Cores
(threads) 		GPU model CPU frequency TDP Graphics clock rate L3 cache L4 cache[a] Release
date 		Price
(USD) 		Socket
Base Turbo Base Max
Core i7 5775C 4 (8) Iris Pro 6200 3.3 GHz 3.7 GHz 65 W 300 MHz 1.15 GHz 6 MB 128 MB June 2, 2015 (2015-06-02)[32] $366 LGA
1150
Core i5 5675C 4 (4) 3.1 GHz 3.6 GHz 1.1 GHz 4 MB $276

"Broadwell-E" HEDT (14 nm)

[edit]
Model sSpec
number 		Cores Clock rate Turbo L2
cache 		L3
cache 		TDP Socket I/O bus Memory Release date Part
number(s) 		Release
price (USD)
Core i7-6950X
  • SR2PA
 10 3.0 GHz 3.5 GHz 10 × 256 KiB 25 MB
140 W
LGA 2011-3 4 × DDR4-2400 May 30, 2016
  • BX80671I76950X
  • BXC80671I76950X
 $1723
Core i7-6900K
  • SR2PB
 8 3.2 GHz 3.7 GHz 8 × 256 KiB 20 MB
140 W
LGA 2011-3 4 × DDR4-2400 Q2 2016
  • BX80671I76900K
  • BXC80671I76900K
 $1089
Core i7-6850K
  • SR2PC
 6 3.6 GHz 3.8 GHz 6 × 256 KiB 15 MB
140 W
LGA 2011-3 4 × DDR4-2400 Q2 2016
  • BX80671I76850K
  • BXC80671I76850K
 $617
Core i7-6800K
  • SR2PD
 6 3.4 GHz 3.6 GHz 6 × 256 KiB 15 MB
140 W
LGA 2011-3 4 × DDR4-2400 Q2 2016
  • BX80671I76800K
  • BXC80671I76800K
 $434

Embedded processors

[edit]
Processor branding
and model 		Cores
(threads) 		GPU model CPU frequency TDP Graphics clock rate L3
cache 		L4
cache[a] 		Release date Price
(USD) 		Socket
Base Turbo Base Max
Core i7 5775R 4 (8) Iris Pro 6200 3.3 GHz 3.8 GHz 65 W 300 MHz 1.15 GHz 6 MB 128 MB June 2, 2015 (2015-06-02)[32] $348 BGA
1364
Core i5 5675R 4 (4) 3.1 GHz 3.6 GHz 1.1 GHz 4 MB $265
5575R 2.8 GHz 3.3 GHz 1.05 GHz $244
Xeon E3 1284Lv4 4 (8) Iris Pro P6300 2.9 GHz 3.8 GHz 47 W 1.15 GHz 6 MB OEM
1278Lv4 2.0 GHz 3.3 GHz 800 MHz 1.0 GHz $546
1258Lv4 P5700 1.8 GHz 3.2 GHz 700 MHz N/a $481

Mobile processors

[edit]
Processor branding
and model 		Cores
(threads) 		GPU model Base
frequency 		Turbo frequency TDP cTDP down Graphics
clock rate 		L3
cache 		Release date Price
(USD)
Single Core Dual Core Base Max

Core i7 5950HQ 4 (8) Iris Pro 6200 2.9 GHz 3.7 GHz N/a 47 W N/a 300 MHz 1.15 GHz 6 MB June 2015 $623
5850HQ 2.7 GHz 3.6 GHz N/a N/a 1.1 GHz $434
5750HQ 2.5 GHz 3.4 GHz N/a 600 MHz / 37 W 1.05 GHz $434
5700HQ HD 5600 2.7 GHz 3.5 GHz N/a $378
5650U 2 (4) HD 6000 2.2 GHz 3.2 GHz 3.1 GHz 15 W 600 MHz / 9.5 W 1 GHz 4 MB Q1 2015 $426
5600U HD 5500 2.6 GHz 600 MHz / 7.5 W 950 MHz $393
5557U Iris 6100 3.1 GHz 3.4 GHz 3.4 GHz 28 W N/A / 23 W 1.1 GHz $426
5550U HD 6000 2.0 GHz 3.0 GHz 2.9 GHz 15 W 600 MHz / 9.5 W 1 GHz $426
5500U HD 5500 2.4 GHz 600 MHz / 7.5 W 950 MHz $393
Core i5 5350H Iris Pro 6200 3.1 GHz 3.5 GHz N/a 47 W N/a 1.05 GHz June 2015 $289
5350U HD 6000 1.8 GHz 2.9 GHz 2.7 GHz 15 W 600 MHz / 9.5 W 1 GHz 3 MB Q1 2015 $315
5300U HD 5500 2.3 GHz 600 MHz / 7.5 W 900 MHz $281
5287U Iris 6100 2.9 GHz 3.3 GHz 3.3 GHz 28 W 600 MHz / 23 W 1.1 GHz $315
5257U 2.7 GHz 3.1 GHz 3.1 GHz 1.05 GHz $315
5250U HD 6000 1.6 GHz 2.7 GHz 2.5 GHz 15 W 600 MHz / 9.5 W 950 MHz $315
5200U HD 5500 2.2 GHz 600 MHz / 7.5 W 900 MHz February 2015[33] $281
Core i3 5157U Iris 6100 2.5 GHz N/a N/a 28 W 600 MHz / 23 W 1 GHz January 2015 $315
5020U HD 5500 2.2 GHz N/a N/a 600 MHz / 10 W 900 MHz March 2015 $281
5015U 2.1 GHz N/a N/a 850 MHz $275
5010U N/a N/a 900 MHz January 2015 $281
5005U 2.0 GHz N/a N/a 850 MHz $275
Pentium 3825U HD Graphics 1.9 GHz N/a N/a 2 MB March 2015
3805U 2 (2) N/a N/a 100 MHz 800 MHz Q1 2015 $161
Celeron 3755U 1.7 GHz N/a N/a $107
3205U 1.5 GHz N/a N/a $107

Core M Ultra Low Power Mobile Processors

[edit]
Processor
Branding & Model 		Cores
(Threads) 		GPU Model Programmable TDP[34]: 69–72  CPU Turbo Graphics Clock rate L3
Cache 		Release
Date 		Price
(USD)
SDP[35][36]: 71  cTDP down[a] Nominal TDP[b] cTDP up[c] 1-core Normal Turbo

Core M (vPro) 5Y71 2 (4)[37] HD 5300 
(GT2)[38] 		3.5 W 3.5 W / 600 MHz 4.5 W / 1.2 GHz 6 W / 1.4 GHz 2.9 GHz 300 MHz 900 MHz 4 MB October 27, 2014 (2014-10-27) $281
5Y70 N/a N/a 4.5 W / 1.1 GHz N/a 2.6 GHz 100 MHz 850 MHz September 5, 2014 (2014-09-05)
Core M 5Y51 3.5 W 3.5 W / 600 MHz 6 W / 1.3 GHz 300 MHz 900 MHz October 27, 2014 (2014-10-27)
5Y31 4.5 W / 900 MHz 6 W / 1.1 GHz 2.4 GHz 850 MHz
5Y10c 4.5 W / 800 MHz 6 W / 1 GHz 2.0 GHz 800 MHz
5Y10a N/a N/a N/a 100 MHz September 5, 2014 (2014-09-05)
5Y10[39] 4 W / ? MHz
  1. When a cooler or quieter mode of operation is desired, this mode specifies a lower TDP and lower guaranteed frequency versus the nominal mode.[34]: 71–72 
  2. This is the processor's rated frequency and TDP.[34]: 71–72 
  3. When extra cooling is available, this mode specifies a higher TDP and higher guaranteed frequency versus the nominal mode.[34]: 71–72 

Server processors

[edit]

SoC processors

[edit]
Processor branding
and model 		Cores
(threads) 		Base
frequency 		Turbo
frequency 		TDP Socket Memory L3
cache 		Release date Price
(USD)
Single core All cores Type Channel

Xeon D D-1587 16 (32) 1.7 GHz N/a 2.3 GHz 65 W FCBGA 1667 DDR4
up to
128 GB
w/ ECC
support 		Dual 24 MB Q1 2016 $1754
D-1577 1.3 GHz 2.1 GHz 45 W Q1 2016 $1477
D-1571 1.3 GHz 2.1 GHz Q1 2016 $1222
D-1567 12 (24) 2.1 GHz 2.7 GHz 65 W 18 MB Q1 2016 $1299
D-1559 1.5 GHz 2.1 GHz 45 W Q2 2016 $883
D-1557 1.5 GHz 2.1 GHz Q1 2016 $844
D-1553N 8 (16) 2.3 GHz 2.7 GHz 65 W 12 MB Q3 2017 $855
D-1548 2.0 GHz 2.6 GHz 45 W Q4 2015 $675
D-1543N 1.9 GHz 2.4 GHz Q3 2017 $652
D-1541 2.1 GHz 2.7 GHz Q4 2015 $581
D-1540 2.0 GHz 2.6 GHz Q1 2015 $581
D-1539 1.6 GHz 2.2 GHz 35 W Q2 2016 $590
D-1537 1.7 GHz 2.3 GHz Q4 2015 $571
D-1533N 6 (12) 2.1 GHz 2.7 GHz 45 W 9 MB Q3 2017 $470
D-1531 2.2 GHz 2.7 GHz Q4 2015 $348
D-1529 4 (8) 1.3 GHz 1.3 GHz 20 W 6 MB Q2 2016 $324
D-1528 6 (12) 1.9 GHz 2.5 GHz 35 W 9 MB Q4 2015 $389
D-1527 4 (8) 2.2 GHz 2.7 GHz 6 MB Q4 2015 $259
D-1523N 2.0 GHz 2.6 GHz 45 W Q3 2017 $256
D-1521 2.4 GHz 2.7 GHz Q4 2015 $199
D-1520 2.2 GHz 2.6 GHz Q1 2015 $199
D-1518 2.2 GHz 2.2 GHz 35 W Q4 2015 $234
D-1513N 1.6 GHz 2.2 GHz Q3 2017 $192
Pentium D D1519 1.5 GHz 2.1 GHz 25 W Q2 2016 $200
D1517 1.6 GHz 2.2 GHz Q4 2015 $194
D1509 2 (2) 1.5 GHz TBA 19 W 3 MB $156
D1508 2 (4) 2.2 GHz 2.6 GHz 25 W $129
D1507 2 (2) 1.2 GHz TBA 20 W $103

Server CPUs

[edit]
Processor
branding and model 		Cores
(threads) 		GPU
model 		CPU
clock rate 		Graphics
clock rate 		L3
cache 		TDP Release
date 		Release
price
(USD)
tray / box 		Motherboard
Normal Turbo Normal Turbo Socket Interface Memory

Xeon E3 v4 1285v4 4 (8) Iris Pro P6300 3.5 GHz 3.8 GHz 300 MHz 1.15 GHz 6 MB 95 W Q2 15 $556 / — LGA
1150 		DMI 2.0
PCIe 3.0 		DDR3 or DDR3L
1333/1600/1866
with ECC
1285Lv4 3.4 GHz 65 W $445 / —
1265Lv4 2.3 GHz 3.3 GHz 1.05 GHz 35 W $417 / —

Single/dual socket CPUs

[edit]
  • Socket: LGA 2011-3 Just like Haswell-EP, the Broadwell-EP Xeon E5 has three different die configurations. The largest die (454 mm2), and highest core count (16 - 22) SKUs still work with a two-ring configuration connected by two bridges. The second configuration supports 12 to 15 cores and is a smaller version (306mm2). These dies still have two memory controllers. The smallest 10-core die uses only one dual ring, two columns of cores, and only one memory controller.
  • Interface: PCIe 3.0
Processor
branding and model 		Cores
(threads) 		CPU clock rate L3
cache 		TDP Release
date 		Release
price 		Sockets Memory

Support

Normal Turbo

Xeon E5 v4 2699A v4 22 (44) 2.4 GHz 3.6 GHz 55 MB 145 W Q2 16 $4938 2 DDR4
1600/1866/2133/2400
with ECC


(Note: 2696 v4 and
2686 v4 additionally
supports, DDR3
1333/1600/1866
with ECC)
2699 v4 22 (44) 2.2 GHz 3.6 GHz 55 MB 145 W Q1 16 $4115
2698 v4 20 (40) 2.2 GHz 3.6 GHz 50 MB 135 W $3226
2697 v4 18 (36) 2.3 GHz 3.6 GHz 45 MB 145 W $2702
2697A v4 16 (32) 2.6 GHz 3.6 GHz 40 MB 145 W $2891
2696 v4 22 (44) 2.2 GHz 3.7 GHz 55 MB 150 W OEM
2695 v4 18 (36) 2.1 GHz 3.3 GHz 45 MB 120 W $2424
2690 v4 14 (28) 2.6 GHz 3.5 GHz 35 MB 135 W $2090
2689 v4 10 (20) 3.1 GHz 3.8 GHz 25 MB 165 W $2723
2687W v4 12 (24) 3.0 GHz 3.5 GHz 30 MB 160 W $2141
2686 v4 18 (36) 2.3 GHz 3.0 GHz 45 MB 145 W OEM
2683 v4 16 (32) 2.1 GHz 3.0 GHz 40 MB 120 W $1846
2680 v4 14 (28) 2.4 GHz 3.3 GHz 35 MB 120 W $1745
2667 v4 8 (16) 3.2 GHz 3.6 GHz 25 MB 135 W $2057
2660 v4 14 (28) 2.0 GHz 3.2 GHz 35 MB 105 W $1445
2658 v4 2.3 GHz 2.8 GHz $1832
2650 v4 12 (24) 2.2 GHz 2.9 GHz 30 MB 105 W $1166
2650L v4 14 (28) 1.7 GHz 2.5 GHz 35 MB 65 W $1329
2648L v4 1.8 GHz 2.5 GHz 75 W $1544
2643 v4 6 (12) 3.4 GHz 3.7 GHz 20 MB 135 W $1552
2640 v4 10 (20) 2.4 GHz 3.4 GHz 25 MB 90 W $939 DDR4
1600/1866/2133
with ECC
2637 v4 4 (8) 3.5 GHz 3.7 GHz 15 MB 135 W $996 DDR4
1600/1866/2133/2400
with ECC
2630 v4 10 (20) 2.2 GHz 3.1 GHz 25 MB 85 W $667 DDR4
1600/1866/2133
with ECC
2630L v4 1.8 GHz 2.9 GHz 55 W $612
2628L v4 12 (24) 1.9 GHz 2.4 GHz 30 MB 75 W $1364
2623 v4 4 (8) 2.6 GHz 3.2 GHz 10 MB 85 W $444
2620 v4 8 (16) 2.1 GHz 3.0 GHz 20 MB $417
2618L v4 10 (20) 2.2 GHz 3.2 GHz 25 MB 75 W $779
2609 v4 8 (8) 1.7 GHz 1.7 GHz 20 MB 85 W $306 DDR4
1600/1866
with ECC
2608L v4 8 (16) 1.6 GHz 1.7 GHz 50 W $363
2603 v4 6 (6) 1.7 GHz 1.7 GHz 15 MB 85 W $213
1680 v4 8 (16) 3.4 GHz 4.0 GHz 20 MB 140 W Q2 16 $1723 1 DDR4
1600/1866/2133/2400
with ECC
1660 v4 3.2 GHz 3.8 GHz $1113
1650 v4 6 (12) 3.6 GHz 4.0 GHz 15 MB $617
1630 v4 4 (8) 3.7 GHz 4.0 GHz 10 MB $406
1620 v4 3.5 GHz 3.8 GHz $294

Roadmap and history

[edit]
Main article: Tick–tock model

On September 10, 2013, Intel showcased the Broadwell 14 nm processor in a demonstration at IDF. Intel CEO Brian Krzanich claimed that the chip would allow systems to provide a 30 percent improvement in power use over the Haswell chips released in mid-2013. Krzanich also claimed that the chips would ship by the end of 2013;[40] however, the shipment was delayed due to low yields from Intel's 14 nm process.[41]

On October 21, 2013, a leaked Intel roadmap indicated a late 2014 or early 2015 release of the K-series Broadwell on the LGA 1150 platform, in parallel with the previously announced Haswell refresh. This would coincide with the release of Intel's 9-series chipset, which would be required for Broadwell processors due to a change in power specifications for its LGA 1150 socket.[42][43]

On May 18, 2014, Reuters quoted Intel's CEO promising that Broadwell-based PCs would be on shelves for the holiday season, but probably not for the back-to-school shopping.[44]

Mobile CPUs were expected in Q4 2014 and high-performance quad-core CPUs in 2015. The mobile CPUs would benefit from the reduced energy consumption of the die shrink.[45][46]

On June 18, 2014, Intel told CNET that while some specialized Broadwell-based products would be out in Q4 2014, "broader availability" (including mobile CPUs) would only happen in 2015.[47]

As of July 2014, Broadwell CPUs were available to Intel's hardware partners in sample quantities.[48] Intel was expected to release 17 Broadwell U series family microprocessors at CES 2015.[49] Also, according to a leak posted on vr-zone, Broadwell-E chips would be available in 2016.[50]

On August 11, 2014, Intel unveiled formally its 14 nm manufacturing process, and indicated that mobile variants of the process would be known as Core M products. Additionally, Core M products were announced to be shipping during the end of 2014, with desktop variants shipping shortly after.[51]

With Broadwell, Intel focused mainly on laptops, miniature desktops, and all-in-one systems.[52] This left traditional desktop users with no new socketed CPU options beyond fourth-generation Haswell, which first arrived in 2013. Even though the company finally introduced two Broadwell desktop chips in the summer of 2015, it launched its high-end sixth-generation Skylake CPUs very shortly thereafter. In September 2015, Kirk Skaugen, senior vice president and general manager of Intel's Client Computing Group, admitted that skipping desktops with Broadwell was a poor decision. Between the end-of-life for Windows XP in 2014 and the lack of new desktop chips, Intel had not given desktop PC users any good reasons to upgrade in 2015.[52]

Releases

[edit]

On September 5, 2014, Intel launched the first three Broadwell-based processors that belong to the low-TDP Core M family, Core M 5Y10, Core M 5Y10a and Core M 5Y70.[53]

On October 9, 2014, the first laptop with Broadwell Intel Core M 5Y70 CPU, Lenovo Yoga 3 Pro, was launched.[54]

On October 31, 2014, four more Broadwell based CPUs were launched belonging to Core M Family, increasing the number of launched Broadwell CPUs to seven.[55]

On January 5, 2015, 17 additional Broadwell laptop CPUs were launched for the Celeron, Pentium and Core i3, i5 and i7 series.[56]

On March 31, 2016, Intel officially launched 14 nm Broadwell-EP Xeon E5 V4 CPUs.[57]

On May 30, 2016, Intel officially launched 14 nm Broadwell-E Core i7 69xx/68xx processor family.

See also

[edit]

Notes

[edit]

References

[edit]
[edit]
Revisions and contributorsEdit on WikipediaRead on Wikipedia

Broadwell (microarchitecture)

View on Grokipedia
from Grokipedia
Broadwell is the codename for Intel's fifth-generation Core , a shrink of the preceding Haswell architecture that leverages second-generation Tri-Gate (FinFET) transistors to deliver enhanced power efficiency and performance-per-watt. Unveiled in September 2014 and first commercialized with the low-power Core M processor family for fanless designs, Broadwell targets mobile, desktop, and server applications, with initial products emphasizing up to 1.5 hours longer battery life compared to Haswell equivalents. The CPU core retains Haswell's out-of-order execution engine, capable of dispatching up to 8 micro-operations per cycle with a 192-entry reorder buffer and support for AVX2 and FMA3 instructions, but introduces optimizations such as reduced floating-point multiply latency from 5 to 3 cycles and improved throughput for gather/scatter operations (e.g., VPGATHERDD latency dropping from 20 to 19 cycles for 256-bit vectors). These tweaks yield about 5% higher (IPC) overall, alongside new instructions like ADOX/ADCX for multi-precision arithmetic and RDSEED for . The includes 32 KB L1 instruction/ caches and 256 KB L2 per core, with a shared L3 up to 55 MB in server variants (e.g., E5-2600 v4 family), and memory support extends to DDR4-2400 for bandwidths up to 77 GB/s in quad-channel configurations. benefits from per-core P-states and refined Turbo Boost, enabling configurations from 4.5 W TDP in mobile to 165 W in servers, with core counts scaling from 2 to 24. Broadwell's integrated graphics, available as Intel HD Graphics 5500/6000 or Iris Graphics 6100 with up to 48 execution units, provide up to 24% better performance than Haswell's generation through architectural refinements and clock boosts, supporting 4K Ultra HD output, 12, 4.3, and hardware decoding for HEVC/ codecs. In "Crystal Well" variants like the Core i7-5775C, 128 MB of on-package serves as a high-bandwidth L4 cache, alleviating main pressure for both and CPU workloads to enable richer visual experiences in thin clients. Server implementations, such as the E5-2600 v4 launched in 2016, prioritize multi-socket scalability with up to 44 threads per socket and enhanced virtualization features like posted interrupts. Despite its advancements, Broadwell's desktop adoption was limited, with shifting focus to the subsequent Skylake by mid-2015.

Design and development

Background and process technology

Broadwell represents Intel's "tick" in the tick-tock development model, serving as a process shrink of the preceding Haswell microarchitecture to the 14 nm node. This transition marked the first time Intel applied a full generation shrink using second-generation FinFET (fin field-effect transistor) technology across its client processors, enabling higher transistor density and improved power efficiency compared to Haswell's 22 nm Tri-Gate process. Originally codenamed Rockwell, the was renamed Broadwell around 2012 as part of Intel's evolving conventions. The 14 nm employed second-generation High-K (HKMG) transistors integrated with FinFET structures, which provided enhanced gate control, reduced leakage, and better overall power efficiency over the first-generation implementation in Haswell. These advancements allowed for taller fins and tighter fin pitches, contributing to a scaling factor of approximately 0.65x in area compared to the 22 nm node. In typical client implementations, the core die features approximately 1.3 billion transistors and measures around 82 mm² for standard dual-core variants (without ); variants with Iris Pro Graphics feature around 1.9 billion transistors on a 133 mm² die, while server dies range from 246 mm² for low-core count variants to up to 456 mm² for high-core count variants with additional integrated components. Fabrication occurred at Intel's 14 nm production facilities, including upgrades at sites like Fab 28 in , where yields progressively improved as the process matured beyond the initial challenges of Haswell's 22 nm rollout.

Key design goals and optimizations

The primary design goals for the Broadwell microarchitecture centered on achieving significant power efficiency improvements while maintaining or enhancing levels, particularly for mobile and low-power applications. Intel targeted a 20-30% reduction in power consumption at equivalent compared to the preceding Haswell architecture, enabled by optimizations in the 14 nm process technology. This focus prioritized the mobile segment, with initial implementations like the Core M series aimed at enabling fanless, ultrathin devices under 9 mm thick, such as 2-in-1 laptops and tablets. A key optimization was the emphasis on system-on-chip (SoC) integration to support thinner form factors and improved thermal management. Broadwell's design incorporated a 50% smaller package size and 30% thinner profile relative to Haswell equivalents, alongside reductions in board area by 25%, facilitating more compact and efficient system designs. These changes, combined with advanced and , contributed to over 2x lower TDP in low-power variants like Broadwell-Y compared to Haswell-Y. For battery life in ultrabooks and tablets, optimizations included system-level enhancements, such as second-generation fully integrated voltage regulators (FIVR), which doubled battery life relative to 2010-era platforms while halving battery size requirements. GPU accelerations were prioritized for media and graphics tasks to boost efficiency in portable devices. The integrated graphics in Broadwell variants delivered 20% more compute performance and 50% higher sampler throughput than Haswell, with support for 4K video decoding and encoding via improved Quick Sync technology. In select Iris Pro configurations, an embedded DRAM (eDRAM) cache served as a 128 MB L4 layer, providing lower access latency (approximately 1.5-2x faster than typical DDR4) and higher bandwidth compared to DDR4 system memory, which significantly enhanced graphics performance for bandwidth-intensive workloads.

Architectural changes from Haswell

CPU enhancements

Broadwell introduced a modest 5% uplift in (IPC) compared to Haswell, achieved through targeted microarchitectural tweaks aimed at improving instruction throughput and prediction accuracy. Branch prediction was also refined, reducing misprediction penalties in control-intensive workloads. These changes, combined with the benefits of the 14 nm process shrink, focused on balancing gains with power efficiency. The (FPU) received notable optimizations to accelerate vector and scalar computations. Floating-point multiply (FMUL) latency was reduced to 3 cycles from 5 cycles in Haswell for both scalar and AVX instructions such as MULPS and MULPD, improving the execution of floating-point heavy applications. Broadwell maintains full support for AVX2 instructions, leveraging a 64-entry scheduler in the engine to handle wider 256-bit vector operations more effectively. These FPU enhancements contribute to better overall throughput in scientific and workloads without requiring significant die area increases. Broadwell also introduced new instructions including ADOX and ADCX for multi-precision arithmetic and RDSEED for hardware-based . Additionally, gather and scatter operations saw minor latency improvements, such as VPGATHERDD reducing from 20 to 19 cycles for 256-bit vectors, aiding vectorized access patterns. (TSX) were implemented in hardware to facilitate lock-free programming paradigms, allowing developers to execute critical sections transactionally and abort on conflicts. TSX operates in two modes: restricted transactional (RTM), which provides explicit transaction begin, end, and abort instructions, and hardware lock elision (HLE), which uses prefixes to elide locks implicitly. This support, inherited and stabilized from Haswell, enables higher concurrency in multithreaded applications by reducing lock contention overhead. The cache hierarchy saw no changes to the per-core L1 instruction and data caches (32 KB each) or the private L2 cache (256 KB), preserving the low-latency access patterns of Haswell. The shared L3 cache size varies by configuration, from 2 MB in dual-core to 55 MB in 22-core server variants, providing about 1.5-2.5 MB per core in inclusive caching setups. Select variants, notably those integrated with Iris Pro graphics, incorporate 128 MB of embedded DRAM (eDRAM) as a victim L4 cache, extending capacity for bandwidth-sensitive tasks while maintaining compatibility with the L3 structure. Power management was enhanced through refined gating mechanisms, enabling deeper states (C-states) that reduce leakage and dynamic power in low-utilization scenarios. These improvements yield a 10-15% decrease in idle power consumption relative to Haswell, supporting longer battery life in mobile implementations without compromising active performance. The architecture's per-core and power integrates seamlessly with the 14 nm process to optimize energy efficiency across varying workloads.

GPU improvements

The Broadwell microarchitecture introduced the Intel Gen8 graphics for its integrated GPUs, marking a shift from the Gen7.5 used in Haswell processors. This included optimizations in design and overall efficiency, with GT2 configurations offering 24 s (vs. 20 in Haswell GT2) and GT3e up to 48 s (vs. 40 in Haswell GT3e), resulting in approximately 20% greater compute performance for parallel workloads. Gen8's shader architecture featured enhancements in texture sampling and , with dual samplers per and improved fixed-function geometry units to handle more complex primitives efficiently. These changes supported 11.2 fully and DirectX 12 at feature level 11_1, allowing better compatibility with advanced rendering techniques like tiled resources and improved multi-threading for graphics pipelines. In Iris Pro variants, such as those in GT3e configurations, an on-package 128 MB cache served as a level 4 (L4) cache shared between the CPU and GPU, providing high-bandwidth access at up to 68 GB/s to alleviate bottlenecks in system memory. This cache delivered significant uplifts in cache-sensitive scenarios, including gaming and media processing, with performance gains of 20-50% in titles and applications limited by texture or bandwidth. Broadwell's media capabilities advanced through Quick Sync Video enhancements, introducing hardware-accelerated decoding for HEVC (H.265) at 4K resolutions in 8-bit Main profile, alongside hybrid encoding support for the same codec to enable efficient 4K video playback and transcoding on integrated hardware. Power efficiency for the integrated GPU improved with the 14 nm , targeting 10-15 W TDP allocations within low-power SoCs like the U-series, complemented by dynamic voltage and to adapt to bursty graphics workloads and reduce idle consumption.

I/O and

The Broadwell microarchitecture features an integrated supporting DDR3L memory at speeds up to 1600/1866 MT/s in dual-channel configuration, with a maximum capacity of 32 GB, enabling efficient bandwidth for client and mobile applications. For mobile variants, LPDDR3 support extends to 1600/1866 MT/s, optimizing power efficiency in and tablet designs while maintaining compatibility with low-voltage operations at 1.35 V. This configuration delivers up to 29.86 GB/s of peak bandwidth, balancing performance and thermal constraints in implementations. Broadwell processors provide up to 16 PCIe 3.0 lanes in client configurations, configurable as 1x16, 2x8, or 1x8 + 2x4, supporting high-speed peripherals like SSDs and graphics cards. Server variants, such as those in the E5 v4 family, scale to 40 PCIe 3.0 lanes, enabling robust expansion for workloads with configurations up to x16 per socket. Some implementations align with PCIe 3.1 specifications for enhanced link equalization and compliance, though primary operation remains at PCIe 3.0 speeds of 8 GT/s. Display connectivity in Broadwell integrates support for eDP 1.4, enabling embedded panels up to (3840x2160) at 60 Hz with four lanes, suitable for high-density laptop screens. HDMI 1.4 outputs handle up to 4K at 30 Hz (3840x2160, 24 bpp), while 1.2 with High Bit Rate 2 (HBR2) supports 4K at 60 Hz (30 bpp) on compatible ports, including Multi-Stream Transport (MST) for daisy-chaining on select DDIs. Up to three simultaneous displays are possible via dedicated transcoders and pipes, with analog CRT support via FDI in certain packages for legacy compatibility. USB integration includes support for (equivalent to USB 3.1 Gen 1 at 5 Gbps) through the (PCH), with up to 14 ports configurable across 3.0 and 2.0 standards in server-oriented designs. For desktop platforms, Broadwell maintains compatibility with 9-series chipsets like H97 and Z97, though select unlocked models align with emerging 100-series infrastructure for transitional upgrades. In low-power SoC variants, Broadwell employs a multi-chip package (MCP) design that integrates the processor and PCH on a single substrate, reducing overall pin count from over 1,000 to approximately 600 and enabling thinner form factors for ultramobile devices. This integration streamlines I/O routing, lowers power delivery complexity, and supports compact layouts without external southbridge components, as seen in U- and Y-series processors with TDPs as low as 4.5 W.

Processor implementations

Client processors

The Broadwell client processors targeted consumer desktop, , and low-power mobile devices, emphasizing integrated performance and power efficiency for everyday , , and light productivity tasks. These processors were designed for compatibility with existing platforms where possible, leveraging the socket for desktops and various mobile form factors for laptops and ultrabooks. Desktop implementations focused on premium unlocked models in the "C" series, such as the quad-core i5-5675C and Core i7-5775C, both operating at a 65W TDP and featuring the Iris Pro 6200 graphics with 128MB of for enhanced visual workloads like gaming and video editing. These processors used the socket and were compatible with 9-series chipsets, including Z97 and H97, enabling and upgrades in enthusiast systems. The cache improved GPU performance by reducing latency in graphics-intensive applications. For high-performance mobile devices like gaming laptops and workstations, the H-series included the quad-core Intel Core i7-6770HQ, with a 47W TDP, base frequency of 2.60 GHz, and turbo boost up to 3.50 GHz, paired with Iris Pro Graphics 580 for demanding tasks such as and . These processors supported vPro technology in select business-oriented variants for remote management and security features. Compatibility extended to 5th-generation mobile chipsets like HM97, facilitating integration into thicker chassis with discrete GPU options. Ultra-low-power U- and Y-series processors catered to thin-and-light laptops, tablets, and fanless 2-in-1 devices, prioritizing battery life and silent operation. The dual-core i3-5010U, at 15W TDP and 2.10 GHz, used Intel HD Graphics 5500 for basic web browsing and office productivity. The fanless Core M series, such as the dual-core M-5Y10 (4.5W base TDP, up to 2.00 GHz) and M-5Y70 (4.5W base TDP, up to 2.60 GHz), integrated Iris Graphics 6100 for improved media playback and light editing in portable form factors. support appeared in enterprise configurations for secure . These were paired with 5th-generation mobile chipsets optimized for low-power designs.
Processor ModelCores/ThreadsBase/Turbo FrequencyTDPGraphicsKey Features
Core i5-5675C (Desktop)4/43.10 GHz / 3.60 GHz65WIris Pro 6200 (128MB eDRAM)Unlocked, LGA 1150, 9-series chipsets
Core i7-5775C (Desktop)4/83.30 GHz / 3.70 GHz65WIris Pro 6200 (128MB eDRAM)Unlocked, LGA 1150, 9-series chipsets
Core i7-6770HQ (Mobile H)4/82.60 GHz / 3.50 GHz47WIris Pro 580vPro in business models, HM97 chipset
Core i3-5010U (Mobile U)2/42.10 GHz15WHD 5500Low-power laptops, 5th-gen mobile chipsets
Core M-5Y10 (Mobile Y)2/40.80 GHz / 2.00 GHz4.5WHD 5300Fanless ultrabooks, 5th-gen mobile chipsets
Core M-5Y70 (Mobile Y)2/41.10 GHz / 2.60 GHz4.5WIris 6100Fanless, vPro support

Server and embedded processors

The Broadwell-based server processors were primarily embodied in the Xeon E5 v4 family, designed for dual-socket scalable systems emphasizing high core counts and enterprise-grade reliability. This family supported up to 22 cores per socket, as exemplified by the E5-2699 v4 processor, which featured a base frequency of 2.2 GHz, 55 MB of shared L3 cache, and a (TDP) of 145 W, utilizing the LGA 2011-3 socket for compatibility with existing server infrastructure. These processors incorporated (RAS) extensions, including error-correcting code ( support and advanced error detection mechanisms to enhance in mission-critical environments. For system-on-chip (SoC) variants tailored to network appliances and edge computing, the Xeon D-1500 series (Broadwell-DE) provided integrated solutions with up to 8 cores, a TDP of 45 W, and built-in 10 GbE Ethernet controllers to reduce external component needs and improve power efficiency in compact deployments. These SoCs supported DDR4 memory configurations, enabling scalable I/O for multi-socket setups while maintaining low power consumption suitable for embedded applications like storage and networking. High-end server variants, such as the E5 v4 family, supported up to 1.5 TB of DDR4 memory per socket with ECC, facilitating large-scale and in enterprise settings. variants supported up to 128 GB of DDR4 . High-end desktop (HEDT) and variants under the Broadwell-E umbrella, such as the Core i7-6950X, extended server-like to enthusiast and workloads with 10 cores, a 3.0 GHz base , 140 W TDP, and the LGA 2011-3 socket, supporting quad-channel DDR4 for demanding and tasks. These configurations shared architectural similarities with server processors, providing enhanced reliability features, though lacking official ECC support for and system uptime in environments.

Release and legacy

Development timeline and delays

Broadwell was publicly announced at Intel's Developer Forum (IDF) in September 2013 as the 14 nm process successor to the Haswell microarchitecture, originally targeted for a desktop launch in the second half of 2014. Shortly after, in October 2013, Intel revealed significant delays stemming from yield problems during early 14 nm manufacturing trials, pushing the start of volume production from late 2013 to the first quarter of 2014. These process technology challenges, including difficulties in achieving acceptable defect densities on the advanced FinFET transistors, prolonged validation and ramp-up efforts. The delays resulted in a mobile-first rollout strategy, with low-power variants like the Core M processor entering production and availability in the fourth quarter of 2014, while higher-performance desktop implementations were postponed to the second quarter of 2015. Key development milestones included in mid-2013 ahead of initial risk production and first silicon validation during 2014, enabling prototypes such as the Core M to be demonstrated at in June 2014. Within Intel's tick-tock development cadence, Broadwell was positioned as the "tick" phase—a die shrink optimizing Haswell's design on the new 14 nm node—intended to bridge to the architectural "tock" of Skylake later in 2015, though the 14 nm complexities disrupted this biennial rhythm and compressed the transition. Early rumors suggested potential partnerships with foundries like to alleviate 14 nm bottlenecks, but these were debunked as Intel committed to fully internal fabrication across its facilities.

Market reception and successors

Broadwell's initial release focused on mobile and low-power segments, with the Core M processors launching in September 2014 for fanless tablets and 2-in-1 devices such as the 3 Pro. Desktop variants, including the Core i5-5675C and Core i7-5775C, arrived in June 2015, but adoption was limited as Intel prioritized the impending Skylake launch, resulting in few options and minimal for socketed desktop systems. Market reception highlighted Broadwell's strengths in power efficiency, with mobile implementations delivering up to 1.5 hours of additional battery life compared to Haswell predecessors, enabling thinner designs and quieter operation. However, critics noted modest CPU performance gains of around 5% in instructions per clock over Haswell, alongside frustrations with the delayed desktop rollout, which diminished enthusiasm for upgrades. Broadwell found strong uptake in premium ultrabooks, powering devices like the Dell XPS 13 and HP Spectre x360, though it faced competition from AMD's Carrizo APUs in budget segments and overall laptop market share remained dominated by Intel's broader portfolio. In the server space, the E5-2600 v4 series, released in March 2016, enhanced efficiency with up to 5.5% IPC improvements and support for higher core counts, contributing to reduced power consumption in enterprise workloads and sustaining deployments in HPC environments. Skylake succeeded Broadwell in August 2015 as Intel's next 14 nm architecture, introducing broader optimizations that curtailed Broadwell's lifecycle to under a year in segments. Long-term, Broadwell's embedded variants maintained support into the through legacy drivers and industrial applications, while its fanless capabilities and advanced integrated Iris Pro paved the way for hybrid CPU-GPU designs in ultrathin devices.

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