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Key Information

HiSilicon
Simplified Chinese海思半导体有限公司
Traditional Chinese海思半導體有限公司
Literal meaningHaisi Semiconductor Limited Company
Transcriptions
Standard Mandarin
Hanyu PinyinHǎisī Bàndǎotǐ Yǒuxiàn Gōngsī

HiSilicon (Chinese: 海思; pinyin: Hǎisī) is a Chinese fabless semiconductor company based in Shenzhen, Guangdong province and wholly owned by Huawei. HiSilicon purchases licenses for CPU designs from ARM Holdings, including the ARM Cortex-A9 MPCore, ARM Cortex-M3, ARM Cortex-A7 MPCore, ARM Cortex-A15 MPCore,[2][3] ARM Cortex-A53, ARM Cortex-A57 and also for their Mali graphics cores.[4][5] HiSilicon has also purchased licenses from Vivante Corporation for their GC4000 graphics core.

HiSilicon is reputed to be the largest domestic designer of integrated circuits in China.[6] In 2020, the United States instituted rules that require any American firms providing equipment to HiSilicon or non-American firms who use American technologies or IPR (such as TSMC) that supply HiSilicon to have licenses[7] as part of the ongoing trade dispute, and Huawei announced it will stop producing its Kirin chipsets from 15 September 2020 onwards[8] due to this disruption of its supply chain. On 29 August 2023, Huawei announced the first fully domestically fabricated chip, the Kirin 9000S, which is used on its latest Mate 60 Pro phablet series of phones and MatePad 13.2 tablets.

History

[edit]

HiSilicon was Huawei's ASIC design center, which was founded in 1991.[9]

  • 2004– Shenzhen HiSilicon Semiconductor Co., Ltd. was registered and the company was formally established.
  • 2016– HiSilicon's Kirin 960 chipset was rated one of the "best of Android 2016" in performance by Android Authority.[10]
  • 2019– Shanghai HiSilicon, a wholly owned subsidiary of Huawei, was established.[11]

Smartphone application processors

[edit]
HiSilicon Hi6250

HiSilicon develops SoCs based on the ARM architecture. Though not exclusive, these SoCs see preliminary use in handheld and tablet devices of its parent company Huawei.

K3V2

[edit]

The first well known product of HiSilicon is the K3V2 used in Huawei Ascend D Quad XL (U9510) smartphones[12] and Huawei MediaPad 10 FHD7 tablets. This chipset is based on the ARM Cortex-A9 MPCore fabbed at 40 nm and uses a 16 core Vivante GC4000 GPU.[13] The SoC supports LPDDR2-1066, but actual products are found with LPDDR-900 instead for lower power consumption.

Model Number Fab CPU GPU Memory Technology Nav Wireless Sampling availability Devices using
ISA Microarchitecture Cores Frq (GHz) Microarchitecture Frq (MHz) Type Bus width (bit) Bandwidth (GB/s) Cellular WLAN PAN
K3V2 (Hi3620) 40 nm ARMv7 Cortex-A9 L1: 32 KB instruction + 32 KB data, L2: 1 MB 4 1.4 Vivante GC4000 240 MHz

(15.3GFlops)

LPDDR2 64-bit dual-channel 7.2 (up to 8.5) — — — — Q1 2012
List

K3V2E

[edit]

This is a revised version of K3V2 SoC with improved support of Intel baseband. The SoC supports LPDDR2-1066, but actual products are found with LPDDR-900 instead for lower power consumption.

Model Number Fab CPU GPU Memory Technology Nav Wireless Sampling availability Devices using
ISA Microarchitecture Cores Frq (GHz) Microarchitecture Frq (MHz) Type Bus width (bit) Bandwidth (GB/s) Cellular WLAN PAN
K3V2E (Hi3620) 40 nm ARMv7 Cortex-A9 L1: 32 KB instruction + 32 KB data, L2: 1 MB 4 1.5 Vivante GC4000 240 MHz

(15.3GFlops)

LPDDR2 64-bit dual-channel 7.2 (up to 8.5) — — — — 2013
List

Kirin 620

[edit]

• supports – USB 2.0 / 13 MP / 1080p video encode

Model Number Fab CPU GPU Memory Technology Nav Wireless Sampling availability Devices using
ISA Microarchitecture Cores Frq (GHz) Microarchitecture Frq (MHz) Type Bus width (bit) Bandwidth (GB/s) Cellular WLAN PAN
Kirin 620 (Hi6220)[14] 28 nm ARMv8-A Cortex-A53 8[15] 1.2 Mali-450 MP4 500 MHz (32GFLOPs in FP32) LPDDR3 (800 MHz) 32-bit single-channel 6.4 — Dual SIM LTE Cat.4 (150 Mbit/s) — — Q1 2015
List

Kirin 650, 655, 658, 659

[edit]
Model number Fab CPU GPU Memory technology Nav Wireless Sampling
availability 		Devices using
ISA μarch Cores Freq (GHz) μarch Freq
(MHz) 		Type Bus
width
(bit) 		Band
width
(GB/s) 		Cellular WLAN PAN
Kirin 650 (Hi6250) 16 nm
FinFET+ 		ARM v8-A Cortex-A53
Cortex-A53 		4+4 2.0 (4x A53)
1.7 (4x A53) 		Mali-T830 MP2 900 MHz
(57.6 GFlops in FP32) 		LPDDR3
(933 MHz)		 64-bit
dual-channel
(2x 32-bit) [16]		 A-GPS, Glonass Dual SIM LTE Cat.6 (300 Mbit/s) WIFI 4 (802.11n) Bluetooth 4.1 Q2 2016
List
Kirin 655 2.12 (4x A53)
1.7 (4x A53)		 Q4 2016
List
Kirin 658 2.35 (4x A53)
1.7 (4x A53)		 WIFI 5 (802.11ac) Q2 2017
List
  • P10 Lite

Kirin 710

[edit]
Model Number Fab CPU GPU Memory Technology Nav Wireless Sampling availability Devices using
ISA Microarchitecture Cores Frq (GHz) Microarchitecture Frq (MHz) Type Bus width (bit) Bandwidth (GB/s) Cellular WLAN PAN
Kirin 710 (Hi6260) TSMC 12 nm FinFET ARMv8-A Cortex-A73
Cortex-A53 		4+4 2.2 (A73)

1.7 (A53)

Mali-G51 MP4 1000 MHz
(64 GFLOPS in FP32) 		LPDDR3 LPDDR4 32-bit A-GPS, GLONASS Dual SIM LTE Cat.12 (600 Mbit/s) WIFI 4 (802.11 b/g/n) Bluetooth v4.2 Q3 2018
List
  • Huawei Nova 3i, Honor 10 Lite, Huawei P Smart+, Huawei P Smart 2019, Huawei Mate 20 Lite, Honor 8X, Huawei Y9 (2019), Huawei P30 Lite，Huawei Y9 Prime 2019, Huawei Y9s, Huawei Mate 20 Lite, Honor 20i
Kirin 710F[17]
List
  • Honor 9X, Huawei P40 lite E, Huawei Y8p
Kirin 710A SMIC 14 nm FinFET[18] 2.0 (A73)

1.7 (A53)

List
  • Honor Play 4T, Huawei P smart 2021, Huawei Nova Y70, Huawei Nova Y71, Huawei Nova Y72, Huawei MatePad SE 11

Kirin 810 and 820

[edit]
  • DaVinci NPU based on Tensor Arithmetic Unit
  • Kirin 820 supported 5G NSA & SA
Model number Fab CPU GPU Memory technology Nav Wireless Sampling
availability 		Devices using
ISA μarch Cores Freq (GHz) μarch Freq
(MHz) 		Type Bus
width
(bit) 		Band
width
(GB/s) 		Cellular WLAN PAN
Kirin 810
(Hi6280) 		7 nm
FinFET 		ARM v8.2-A Cortex-A76
Cortex-A55
(big.LITTLE) 		2+6 2.27 (2x A76)
1.90 (6x A55) 		Mali-G52 MP6 820 MHz
(157.4 GFLOPS in FP32) 		LPDDR4X
(2133 MHz)		 64-bit (16-bit
quad-channel) 		31.78 A-GPS, Glonass, BDS Dual SIM LTE Cat.12
(600 Mbit/s)		 WIFI 5 (802.11ac) Bluetooth 5.0 Q2 2019
List
    • Huawei Nova 5
    • Huawei Honor 9x
    • Huawei Honor 9x Pro
    • Huawei Mate 30 Lite
    • Huawei P40 Lite
    • Huawei Nova 7i
    • Huawei nova 6 SE
    • Huawei P smart Pro 2019
    • Huawei nova 5z
    • Huawei nova 5i Pro
    • Huawei Honor 20S
    • Huawei MatePad 10.4
Kirin 820 5G
(Hi6290L V100) 		(1+3)+4 2.36 (1x A76 H)
2.22 (3x A76 L)
1.84 (4x A55) 		Mali-G57 MP6 Balong 5000 (Sub-6 GHz Only; NSA & SA) Q1 2020
List
    • Honor 30S
    • Honor X10 5G
Kirin 820E 5G 3+3 2.22 (3x A76 L)
1.84 (3x A55) 		Mali-G57 MP6 Balong 5000 (Sub-6 GHz Only; NSA & SA) Q1 2021

Kirin 8000

[edit]

HiSilicon Kirin 8000 is a mid-range Kirin 8 series chip not officially announced, however, it was released along with the announcement of Huawei nova 12.[19]

Model number Fab CPU GPU Memory technology Nav Wireless Sampling
availability 		Devices using
ISA μarch Cores Freq (GHz) μarch Freq
(MHz) 		Type Bus width (bit) Band
width
(GB/s) 		Cellular WLAN PAN
Kirin 8000
(Hi6290V110) 		SMIC N+2
7 nm FinFET 		ARM
v8.2-A 		Cortex-A77
Cortex-A55
(big.LITTLE) 		1+3+4 2.40 (1x A77 H)
2.19 (3x A77 L)
1.84 (4x A55) 		Mali-G610
MP4 		864 MHz
(442.4 GFLOPS in FP32) 		LPDDR4X
-4266		 64-bit (16-bit
quad-channel) 		51.2 GPS, A-GPS, Glonass, BeiDou, Galileo, QZSS Balong modem Wi-Fi 6
(802.11ax)		 Bluetooth 5.2 Q2 2019
List
    • Huawei Nova 12
    • Huawei Nova 12 Pro
    • Huawei Nova Flip
Kirin T80
(Hi6290V110) 		Q1 2025 Huawei MatePad 11.5 PaperMatte (2025)

Kirin 910 and 910T

[edit]
Model Number Fab CPU GPU Memory Technology Nav Wireless Sampling availability Devices using
ISA Microarchitecture Cores Frq (GHz) Microarchitecture Frq (MHz) Type Bus width (bit) Bandwidth (GB/s) Cellular WLAN PAN
Kirin 910 (Hi6620) 28 nm HPM ARMv7 Cortex-A9 4 1.6 Mali-450 MP4 533 MHz
(32 GFLOPs in FP32) 		LPDDR3 32-bit single-channel 6.4 — LTE Cat.4 — — H1 2014
List
  • HP Slate 7 VoiceTab Ultra, Huawei MediaPad X1,[20] Huawei P6 S,[21] Huawei MediaPad M1,[22] Huawei Honor 3C 4G
Kirin 910T 1.8 700 MHz
(41.8 GFLOPs in FP32) 		— — — H1 2014
List
  • Huawei Ascend P7

Kirin 920, 925 and 928

[edit]

• The Kirin 920 SoC also contains an image processor that supports up to 32-megapixel

Model Number Fab CPU GPU Memory Technology Nav Wireless Sampling availability Devices using
ISA Microarchitecture Cores Frq (GHz) Microarchitecture Frq (MHz) Type Bus width (bit) Bandwidth (GB/s) Cellular WLAN PAN
Kirin 920 28 nm HPM ARMv7 Cortex-A15
Cortex-A7
big.LITTLE		 4+4 1.7 (A15)
1.3 (A7) 		Mali-T628 MP4 600 MHz
(76.8 GFLOPs in FP32) 		LPDDR3 (1600 MHz) 64-bit dual-channel 12.8 — LTE Cat.6 (300 Mbit/s) — — H2 2014
List
Kirin 925 (Hi3630) 1.8 (A15)
1.3 (A7) 		— — — Q3 2014
List
Kirin 928 2.0 (A15)
1.3 (A7) 		— — — —
List
  • Huawei Honor6 extreme Edition

Kirin 930 and 935

[edit]

• supports – SD 3.0 (UHS-I) / eMMC 4.51 / Dual-band a/b/g/n Wi-Fi / Bluetooth 4.0 Low Energy / USB 2.0 / 32 MP ISP / 1080p video encode

Model Number Fab CPU GPU Memory Technology Nav Wireless Sampling availability Devices using
ISA Microarchitecture Cores Frq (GHz) Microarchitecture Frq (MHz) Type Bus width (bit) Bandwidth (GB/s) Cellular WLAN PAN
Kirin 930 (Hi3635) 28 nm HPC ARMv8-A Cortex-A53
Cortex-A53 		4+4 2.0 (A53)
1.5 (A53) 		Mali-T628 MP4 600 MHz
(76.8 GFLOPs in FP32) 		LPDDR3 (1600 MHz) 64-bit(2x32-bit) Dual-channel 12.8 GB/s — Dual SIM LTE Cat.6 (DL:300 Mbit/s UP:50 Mbit/s) — — Q1 2015
List
Kirin 935 2.2 (A53)
1.5 (A53) 		680 MHz
(87 GFLOPs in FP32) 		— — — Q1 2015
List

Kirin 950 and 955

[edit]

• supports – SD 4.1 (UHS-II) / UFS 2.0 / eMMC 5.1 / MU-MIMO 802.11ac Wi-Fi / Bluetooth 4.2 Smart / USB 3.0 / NFS / Dual ISP (42 MP) / Native 10-bit 4K video encode / i5 coprocessor / Tensilica HiFi 4 DSP

Model Number Fab CPU GPU Memory Technology Nav Wireless Sampling availability Devices using
ISA Microarchitecture Cores Frq (GHz) Microarchitecture Frq (MHz) Type Bus width (bit) Bandwidth (GB/s) Cellular WLAN PAN
Kirin 950 (Hi3650) TSMC 16 nm FinFET+[24] ARMv8-A Cortex-A72
Cortex-A53
big.LITTLE 		4+4 2.3 (A72)
1.8 (A53) 		Mali-T880 MP4 900 MHz
(151.2 GFLOPS in FP32) 		LPDDR4 64-bit(2x32-bit) Dual-channel 25.6 — Dual SIM LTE Cat.6 — — Q4 2015
List
  • Huawei Mate 8, Huawei Honor V8 32 GB, Huawei Honor 8, Huawei Honor Magic, Huawei MediaPad M3 (BTV-W09)[25]
Kirin 955[26] 2.5 (A72)
1.8 (A53) 		LPDDR3 (3 GB) LPDDR4 (4 GB) — — — Q2 2016
List
  • Huawei P9, Huawei P9 Plus, Honor Note 8, Honor V8 64 GB

Kirin 960

[edit]
  • Interconnect: ARM CCI-550, Storage: UFS 2.1, eMMC 5.1, Sensor Hub: i6
Model Number Fab CPU GPU Memory Technology Nav Wireless Sampling availability Devices using
ISA Microarchitecture Cores Frq (GHz) Microarchitecture Frq (MHz) Type Bus width (bit) Bandwidth (GB/s) Cellular WLAN PAN
Kirin 960 (Hi3660)[27] TSMC 16 nm FFC ARMv8-A Cortex-A73
Cortex-A53
big.LITTLE 		4+4 2.36 (A73)
1.84 (A53) 		Mali-G71 MP8 1037 MHz
(199.1 GFLOPS in FP32) 		LPDDR4-1600 64-bit(2x32-bit) Dual-channel 28.8 — Dual SIM LTE Cat.12 LTE 4x CA, 4x4 MIMO — — Q4 2016
List

Kirin 970

[edit]
  • Interconnect: ARM CCI-550, Storage: UFS 2.1, Sensor Hub: i7
  • Cadence Tensilica Vision P6 DSP.[28]
  • NPU made in collaboration with Cambricon Technologies. 1.92T FP16 OPS.[29]
Model Number Fab CPU GPU Memory Technology Nav Wireless Sampling availability Devices using
ISA Microarchitecture Cores Frq (GHz) Microarchitecture Frq (MHz) Type Bus width (bit) Bandwidth (GB/s) Cellular WLAN PAN
Kirin 970 (Hi3670) TSMC 10 nm FinFET+ ARMv8-A Cortex-A73
Cortex-A53
big.LITTLE 		4+4 2.36 (A73)
1.84 (A53) 		Mali-G72 MP12 746 MHz
(214.8 GFLOPS in FP32) 		LPDDR4X-1866 64-bit(4x16-bit) Quad-channel 29.8 Galileo Dual SIM LTE Cat.18 LTE 5x CA, No 4x4 MIMO — — Q4 2017
List

Kirin 980 and Kirin 985 5G/4G

[edit]

Kirin 980 is HiSilicon's first SoC based on 7 nm FinFET technology.

  • Interconnect: ARM Mali G76-MP10, Storage: UFS 2.1, Sensor Hub: i8
  • Dual NPU made in collaboration with Cambricon Technologies.

Kirin 985 5G is the second Hisilicon's 5G SoC based on 7 nm FinFET Technology.

  • Interconnect: ARM Mali-G77 MP8, Storage UFS 3.0
  • Big-Tiny Da Vinci NPU: 1x Da Vinci Lite + 1x Da Vinci Tiny
Model number Fab CPU GPU Memory technology Nav Wireless Sampling
availability 		Devices using
ISA μarch Cores Freq (GHz) μarch Freq
(MHz) 		Type Bus
width
(bit) 		Band
width
(GB/s) 		Cellular WLAN PAN
Kirin 980 TSMC 7 nm
FinFET 		ARM
v8.2-A 		Cortex-A76
Cortex-A55
(big.LITTLE) 		(2+2)+4 2.6 (A76 H)
1.92 (A76 L)
1.8 (A55) 		Mali-G76 MP10[30] 720 MHz
(345.6 GFLOPS in FP32) 		LPDDR4X
-2133		 64-bit (4x16-bit)
Quad-channel		 34.1 Galileo Dual SIM LTE Cat.21 LTE 5x CA, No 4x4 MIMO — — Q4 2018
List
Kirin 985 5G/4G
(Hi6290V110) 		(1+3)+4 2.58 (A76 H)
2.40 (A76 L)
1.84 (A55) 		Mali-G77 MP8 700 MHz
(358.4 GFLOPS in FP32) 		Balong 5000 (Sub-6 GHz only; NSA & SA), 4G version available — — Q2 2020
List
  • Honor 30
  • Honor V6
  • Huawei nova 7 5G
  • Huawei nova 7 Pro 5G
  • Huawei nova 8 5G
  • Huawei nova 8 Pro 5G

Kirin 990 4G, Kirin 990 5G and Kirin 990E 5G

[edit]

Kirin 990 5G is HiSilicon's first 5G SoC based on N7 nm+ FinFET technology.[31]

  • Interconnect
    • Kirin 990 4G: ARM Mali-G76 MP16
    • Kirin 990 5G: ARM Mali-G76 MP16
    • Kirin 990E 5G: ARM Mali-G76 MP14
  • Da Vinci NPU.
    • Kirin 990 4G: 1x Da Vinci Lite + 1x Da Vinci Tiny
    • Kirin 990 5G: 2x Da Vinci Lite + 1x Da Vinci Tiny
    • Kirin 990E 5G: 1x Da Vinci Lite + 1x Da Vinci Tiny
  • Da Vinci Lite features 3D Cube Tensor Computing Engine (2048 FP16 MACs + 4096 INT8 MACs), Vector unit (1024bit INT8/FP16/FP32)
  • Da Vinci Tiny features 3D Cube Tensor Computing Engine (256 FP16 MACs + 512 INT8 MACs), Vector unit (256bit INT8/FP16/FP32)[32]
Model number Fab CPU GPU Memory technology Nav Wireless Sampling
availability 		Devices using
ISA μarch Cores Freq (GHz) μarch Freq
(MHz) 		Type Bus
width
(bit) 		Band
width
(GB/s) 		Cellular WLAN PAN
Kirin 990 4G TSMC 7 nm
FinFET (DUV) 		ARM
v8.2-A 		Cortex-A76
Cortex-A55
(big.LITTLE) 		(2+2)+4 2.86 (A76 H)
2.09 (A76 L)
1.86 (A55) 		Mali-G76 MP16 600 MHz
(460.8 GFLOPS in FP32) 		LPDDR4X
-2133		 64-bit (4x16-bit)
Quad-channel		 34.1 Beidou, Galileo, Glonass Balong 765 (LTE Cat.19) — — Q4 2019
List
Kirin 990 5G TSMC 7 nm+
FinFET (EUV) 		2.86 (A76 H)
2.36 (A76 L)
1.95 (A55) 		Balong 5000 (Sub-6-GHz only; NSA & SA) — —
List
  • Huawei Mate 30 5G
  • Huawei Mate 30 Pro 5G
  • Huawei Mate 30 RS Porche Design
  • Huawei P40
  • Huawei P40 Pro
  • Huawei P40 Pro+
  • Honor V30 Pro
  • Huawei MatePad Pro 5G (2020)
  • Honor 30 Pro
  • Honor 30 Pro+
Kirin 990E 5G Mali-G76 MP14 600 MHz
(403.2 GFLOPS in FP32) 		— — Q4 2020
List
  • Huawei Mate 30E Pro 5G
  • Huawei Mate 40E (4G/5G)

Kirin 9000 5G/4G and Kirin 9000E, Kirin 9000L

[edit]

Kirin 9000 is HiSilicon's first SoC based on 5 nm+ FinFET (EUV) TSMC technology (N5 node) and the first 5 nm SoC to be launched on the international market.[33] This octa-core system on a chip is based on the 9th Gen of the HiSilicon Kirin series and is equipped with 15.3 billion transistors in a 1+3+4 core configuration: 4 Arm Cortex-A77 CPU (1x 3.13 GHz and 3x 2.54 GHz), 4 Arm Cortex-A55 (4x 2.05 GHz) and a 24-core Mali-G78 GPU (22-core in the Kirin 9000E version) The Kirin 9000L uses a 1+2+3 core configuration: 3 Arm Cortex-A77 (1x 3.13 GHz and 2x 2.54 GHz), 3 Arm Cortex-A55 (3x 2.05 GHz) and a 22-core Mali-G78 GPU with Kirin Gaming+ 3.0 implementation.[33]

The integrated quad pipeline NPU (Dual Big Core + 1 Tiny Core configuration) is equipped with the Kirin ISP 6.0 to support advanced computational photography. The Huawei Da Vinci Architecture 2.0 for AI supports 2x Ascend Lite + 1x Ascend Tiny (only 1 Lite in 9000E/L). The system cache is 8 MB and the SoC works with the new LPDDR5/4X memories (made by Samsung in the Huawei Mate 40 series). Due to the integrated 3rd generation 5G proprietary modem "Balong 5000", Kirin 9000 supports 2G, 3G, 4G and 5G SA & NSA Sub-6 GHz connectivity.[33] The SoC's TDP is 6W.

The 2021 4G version of the Kirin 9000 has the Balong modem limited via software to comply with the ban imposed on Huawei by the US government for non-chinese 5G technologies. The Kirin 9006C is a rebranded variant of the Kirin 9000E for the Huawei Qingyun L420 and L540 laptops.[34][35]

  • GPU
    • Kirin 9000L: ARM Mali-G78 MP22
    • Kirin 9000E: ARM Mali-G78 MP22
    • Kirin 9000: ARM Mali-G78 MP24
  • Da Vinci NPU architecture 2.0
    • Kirin 9000L: 1x Big Core + 1x Tiny Core
    • Kirin 9000E: 1x Big Core + 1x Tiny Core
    • Kirin 9000: 2x Big Cores + 1x Tiny Core
Model number Fab CPU GPU Memory technology Nav Wireless Sampling
availability 		Devices using
ISA μarch Cores Freq (GHz) μarch Freq
(MHz) 		Type Bus
width
(bit) 		Band
width
(GB/s) 		Cellular WLAN PAN
Kirin 9000L TSMC 5 nm+
FinFET (EUV) 		ARM v8.2-A Cortex-A77
Cortex-A55
(big.LITTLE) 		(1+2)+3 3.13 (A77 H)
2.54 (A77 L)
2.05 (A55) 		Mali-G78 MP22 759 MHz
(1068.7 GFLOPS in FP32) 		LPDDR4X
-2133
LPDDR5
-2750 		64-bit (4x16-bit)
Quad-channel 		34.1 (LPDDR4X)
44 (LPDDR5) 		Beidou, Galileo, Glonass Balong 5000 (Sub-6-GHz only; NSA & SA) Wi-Fi 6 Q4 2020 Huawei Mate 40E Pro
Kirin 9000E (1+3)+4 Balong 5000 (Sub-6-GHz only; NSA & SA)
4G version available		 — —
List
Kirin 9000
(Hi36A0V101) 		Mali-G78 MP24 759 MHz
(1165.8 GFLOPS in FP32) 		Wi-Fi 6
List
  • Huawei Mate 40 Pro
  • Huawei Mate 40 Pro+
  • Huawei Mate 40 RS Porsche Design
  • Huawei P50 Pro
  • Huawei Mate X2

Kirin 9000S, Kirin 9010, Kirin 9020 series

[edit]

The Kirin 9000S, Kirin 9000S1, and Kirin 9010 of the Kirin 9000 Hi36A0 family are the first HiSilicon-developed SoCs manufactured in high volumes in mainland China by SMIC. The SoC had its debut with the Huawei Mate 60 in late 2023 with the Kirin 9000S alongside overclocked enhancements of the Kirin 9000S1 and Kirin 9010 with the Huawei Pura 70 series in early 2024.[36] According to Tom's Hardware, the Taishan V120 core, developed by HiSilicon, was roughly on par with AMD's Zen 3 cores from late 2020.[37] Four of these cores were used in the 9000 series alongside four efficiency-focused Arm Cortex-A510 cores.[38] The SoCs are based on SMIC's 7nm technology node, referred to as "N+2". It also includes 1 Da Vinci "big" NPU core and 1 Da Vinci "small" NPU core. Kirin 9000W, a Wi-Fi only SoC for the Huawei MatePad Pro 13.2 Wi-Fi only model, debuted in global markets in Q1 2024. The Kirin 9010 and Kirin 9000S1 debuted in Q2 2024, using a modified 2+6+4 core configuration with a new large Taishan core with the same configurations of medium and small cores from the Kirin 9000S with faster enhancements over the Kirin 9000S.[39]

Model number Fab CPU GPU Memory technology Nav Wireless Sampling
availability 		Devices using
ISA μarch Cores
(total) 		Threads
(total) 		Freq (GHz) μarch Freq (MHz) Type Bus
width
(bit) 		Band
width
(GB/s) 		Cellular WLAN PAN
Kirin 9000S
(Hi36A0V120) 		SMIC
7 nm
FinFET [40][41] 		ARMv8.x HiSilicon
Taishan,
Cortex-A510 		1+3+4 (8) 2+6+4 (12) 2.62 GHz (TaishanV120)
2.15 GHz (TaishanV120)
1.53 GHz (Cortex-A510) 		HiSilicon
Maleoon 910 		750 MHz LPDDR5
-6400 @2750Mhz
LPDDR5X
-8533 @4266Mhz 		64-bit (4x16-bit) Quad-
channel 		51.2 (LPDDR5)
68.2 (LPDDR5X) 		Beidou, Galileo, GLONASS Balong 5000 5G 3GPP Rel. 15 (Sub-6-GHz) Wi-Fi 6
(external
module) 		Bluetooth 5.2, NearLink, NFC Q3 2023
List
Kirin 9000S1
(Hi36A0V120) 		2.49 GHz (TaishanV120)
2.15 GHz (TaishanV120)
1.53 GHz (Cortex-A510) 		Q1 2024 Huawei Pura 70
Kirin 9000W
(Hi36A0V120) 		— Q4 2023
List
Kirin 9000WL
(Hi36A0V120) 		— Q2 2024 Huawei MatePad 11.5 S PaperMatte Edition
Kirin 9000WE
(Hi36A0V120) 		— Q2 2024 Huawei MatePad 11.5 S (12GB RAM)
Kirin T90
(Hi36A0V120) 		— Q3 2024 Huawei MatePad Air (2024)
Kirin T90A
(Hi36A0V120) 		— Q3 2024 Huawei MatePad 12 X
Kirin 9000SL
(Hi36A0V120) 		1+2+3 (6) 2+4+3 (9) 2.35 GHz (TaishanV120)
2.15 GHz (TaishanV120)
1.53 GHz (Cortex-A510) 		Balong 5000 5G 3GPP Rel. 15 (Sub-6-GHz) Q4 2023 Huawei Nova 12 Ultra
Kirin 9000WM
(Hi36A0V120) 		— Q2 2024 Huawei MatePad 11.5 S Smart Model
Kirin 9010
(Hi36A0V121) 		1+3+4 (8) 2+6+4 (12) 2.30 GHz (TaishanV121)
2.18 GHz (TaishanV120)
1.55 GHz (Cortex-A510) 		Balong 5000 5G 3GPP Rel. 15 (Sub-6-GHz) Q2 2024
List
Kirin 9010E
(Hi36A0V121) 		2.19 GHz (TaishanV121)
2.18 GHz (TaishanV120)
1.55 GHz (Cortex-A510) 		Q3 2024 Huawei Nova Flip
Kirin 9010A
(Hi36A0V121) 		Q3 2024
Kirin 9010W
(Hi36A0V121) 		— Q3 2024
Kirin T91
(Hi36A0V121) 		— Q3 2024 Huawei MatePad Pro 12.2 (2024)
Kirin 9010L
(Hi36A0V121) 		1+2+3 (6) 2+4+3 (9) 2.19 GHz (TaishanV121)
2.18 GHz (TaishanV120)
1.40 GHz (Cortex-A510) 		Balong 5000 5G 3GPP Rel. 15 (Sub-6-GHz) Q2 2024 Huawei Nova 12 Ultra Star Edition
Kirin 9020
(Hi36C0V110)[42] 		HiSilicon
Taishan 		1+3+4 (8) 2+6+4 (12) 2.50 GHz (TaishanV123)
2.15 GHz (TaishanV120)
1.60 GHz (Taishan-Little) 		HiSilicon
Maleoon 920 		840 MHz Balong 6000 5G 3GPP Rel. 17 (Sub-6-GHz) Q4 2024
List
Kirin T92
(Hi36C0V110) 		— Q4 2024 Huawei MatePad Pro 13.2 (2025)

Smartphone modems

[edit]

HiSilicon develops smartphone modems which are primarily used in its parent company Huawei's handheld and tablet devices.

Balong 700

[edit]

The Balong 700 supports LTE TDD/FDD.[43] Its specs:

  • 3GPP R8 protocol
  • LTE TDD and FDD
  • 4x2/2x2 SU-MIMO

Balong 710

[edit]

At MWC 2012, HiSilicon released the Balong 710.[44] It is a multi-mode chipset supporting 3GPP Release 9 and LTE Category 4 at GTI (Global TD-LTE Initiative). The Balong 710 was designed to be used with the K3V2 SoC. Its specs:

  • LTE FDD mode : 150 Mbit/s downlink and 50 Mbit/s uplink.
  • TD-LTE mode: up to 112 Mbit/s downlink and up to 30 Mbit/s uplink.
  • WCDMA Dual Carrier with MIMO: 84 Mbit/s downlink and 23 Mbit/s uplink.

Balong 720

[edit]

The Balong 720 supports LTE Cat6 with 300 Mbit/s peak download rate.[43] Its specs:

  • TSMC 28 nm HPM process
  • TD-LTE Cat.6 standard
  • Dual-carrier aggregation for the 40 MHz bandwidth
  • 5-mode LTE Cat6 Modem

Balong 750

[edit]

The Balong 750 supports LTE Cat 12/13, and it is first to support 4CC CA and 3.5 GHz.[43] Its specs:

  • LTE Cat.12 and Cat.13 UL network standards
  • 2CC (dual-carrier) data aggregation
  • 4x4 multiple-input multiple-output (MIMO)
  • TSMC 16 nm FinFET+ process

Balong 765

[edit]

The Balong 765 supports 8×8 MIMO technology, LTE Cat.19 with downlink data-rate up to 1.6 Gbit/s in FDD network and up to 1.16 Gbit/s in the TD-LTE network.[45] Its specs:

  • 3GPP Rel.14
  • LTE Cat.19 Peak data rate up to 1.6 Gbit/s
  • 4CC CA + 4×4 MIMO/2CC CA + 8×8 MIMO
  • DL 256QAM
  • C-V2X

Balong 5G01

[edit]

The Balong 5G01 supports the 3GPP standard for 5G with downlink speeds of up to 2.3 Gbit/s. It supports 5G across all frequency bands including sub-6 GHz and millimeter wave (mmWave).[43] Its specs:

  • 3GPP Release 15
  • Peak data rate up to 2.3 Gbit/s
  • Sub-6 GHz and mmWave
  • NSA/SA
  • DL 256QAM

Balong 5000

[edit]

The Balong 5000 was the world's first 7 nm TSMC 5G multi-mode chipset (launched in Q1 2019), the world's first SA/NSA implementation, and the first smartphone chipset to support the full NR TDD/FDD spectrum.[46] The modem has an advanced 2G, 3G, 4G, and 5G connectivity.[47] Its specs:

  • 2G/3G/4G/5G Multi Mode
  • Fully compliant with 3GPP Release 15
  • Sub-6 GHz: 100 MHz x 2CC CA
  • Sub-6 GHz: Downlink up to 4.6 Gbit/s, Uplink up to 2.5 Gbit/s
  • mmWave: Downlink up to 6.5 Gbit/s, Uplink up to 3.5 Gbit/s
  • NR+LTE: Downlink up to 7.5 Gbit/s
  • FDD & TDD Spectrum Access
  • SA & NSA Fusion Network Architecture
  • Supports 3GPP R14 V2X
  • 3 GB LPDDR4X RAM[48]

Balong 6000

[edit]

The Balong 6000 is an iteration of the HiSilicon Balong 5G baseband series and first appeared in the Huawei Mate 70 Pro, launched on November 26, 2024.

It is one of the first 3GPP Rel. 18 and therefore 5.5G/5G-Advanced supporting modem in the world alongside the Qualcomm Snapdragon X75/X80 and onwards series.[49]

  • 2G/3G/4G/5G Multi Mode
  • Fully compliant with 3GPP Release 17, probably compliant with 3GPP Release 18[50]
  • Sub-6 GHz: 100 MHz x 4CC CA
  • Sub-6 GHz: Downlink up to 4.6 Gbit/s, Uplink up to 2.5 Gbit/s
  • mmWave: Downlink up to 12 Gbit/s, Uplink up to 3.5 Gbit/s
  • NR+LTE: Downlink up to 10 Gbit/s
  • FDD & TDD Spectrum Access
  • SA & NSA Fusion Network Architecture

Wearable SoCs

[edit]

HiSilicon develops SoCs for wearables such as wireless earbuds, wireless headphones, neckband earbuds, smart speakers, smart eyewear, and smartwatches.[51]

Kirin A1

[edit]

The Kirin A1 (Hi1132) was announced on 6 September 2019.[51] It features:

  • BT/BLE dual-mode Bluetooth 5.1[52]
  • Isochronous Dual Channel transmission technology
  • 356 MHz audio processor
  • Cortex-M7 microprocessor

Kirin A2

[edit]

The Kirin A2 was announced on September 25, 2023.[53] It features:

  • Faster Transmission
  • Stable signal with Polar code technology
  • Increase of 50% in computing power performance
  • Audio Vivid

Server processors

[edit]

HiSilicon develops server processor SoCs based on the ARM architecture.

Hi1610

[edit]

The Hi1610 is HiSilicon's first generation server processor announced in 2015. It features:

  • 16x ARM Cortex-A57 at up to 2.1 GHz[54]
  • 48 KB L1-I, 32 KB L1-D, 1 MB L2/4 cores and 16 MB CCN L3
  • TSMC 16 nm
  • 2x DDR4-1866
  • 16 PCIe 3.0

Hi1612

[edit]

The Hi1612 is HiSilicon's second generation server processor launched in 2016. It is the first chiplet-based Kunpeng with two computing dies. It features:

  • 32x ARM Cortex-A57 at up to 2.1 GHz[54]
  • 48 KB L1-I, 32 KB L1-D, 1 MB L2/4 cores and 32 MB CCN L3
  • TSMC 16 nm
  • 4x DDR4-2133
  • 16 PCIe 3.0

Kunpeng 916 (formerly Hi1616)

[edit]

The Kunpeng 916 (formerly known as Hi1616) is HiSilicon's third generation server processor launched in 2017. The Kunpeng 916 is used in Huawei's TaiShan 2280 Balanced Server, TaiShan 5280 Storage Server, TaiShan XR320 High-Density Server Node and TaiShan X6000 High-Density Server.[55][56][57][58] It features:

  • 32x ARM Cortex-A72 at up to 2.4 GHz[54]
  • 48 KB L1-I, 32 KB L1-D, 1 MB L2/4 cores and 32 MB CCN L3
  • TSMC 16 nm
  • 4x DDR4-2400
  • 2-way Symmetric multiprocessing (SMP), Each socket has 2x ports with 96 Gbit/s per port (total of 192 Gbit/s per each socket interconnects)
  • 46 PCIe 3.0 and 8x 10 Gigabit Ethernet
  • 85 W

Kunpeng 920 (formerly Hi1620)

[edit]

The Kunpeng 920 (formerly known as Hi1620) is HiSilicon's fourth generation server processor announced in 2018, and launched in 2019. Huawei claims the Kunpeng 920 CPU scores more than an estimated 930 on SPECint_rate_base2006.[59] The Kunpeng 920 is used in Huawei's TaiShan 2280 V2 Balanced Server, TaiShan 5280 V2 Storage Server, and TaiShan XA320 V2 High-Density Server Node.[60][61][62] It features:

  • 32 to 64x custom TaiShan V110 cores at up to 2.6 GHz.[63]
  • The TaiShan V110 core is a 4-way superscalar, out-of-order microarchitecture that implements the ARMv8.2-A ISA. Huawei reports the core supports almost all the ARMv8.4-A ISA features with a few exceptions, including the dot product and FP16 FML extensions.[63]
  • The TaiShan V110 cores are likely a new core not based on ARM designs[64][original research?]
  • 3x Simple ALUs, 1x Complex MDU, 2x BRUs (sharing ports with ALU2/3), 2x FSUs (ASIMD FPU), 2x LSUs[64]
  • 64 KB L1-I, 64 KB L1-D, 512 KB Private L2 and 1 MB L3/core Shared.
  • TSMC 7 nm HPC
  • 8x DDR4-3200
  • 2-way and 4-way symmetric multiprocessing (SMP). Each socket has 3x Hydra ports with 240 Gbit/s per port (total of 720 Gbit/s per each socket interconnects)
  • 40 PCIe 4.0 with CCIX support, 4x USB 3.0, 2x SATA 3.0, 8x SAS 3.0 and 2x 100 Gigabit Ethernet
  • 100 to 200 W
  • Compression engine (GZIP, LZS, LZ4) capable of up to 40 Git/s compress and 100 Gbit/s decompress
  • Crypto offload engine (for AES, DES, 3DES, SHA1/2, etc..) capable of throughputs up to 100 Gbit/s

Kunpeng 920B (formerly Hi1630V100)

[edit]

The Kunpeng 920B (formerly known as Hi1630V100) is HiSilicon's fifth-generation server processor announced in 2019 and scheduled for launch in 2021. It features:

  • 80 custom TaishanV120 cores at 2.9 GHz frequency, with support for simultaneous multithreading (SMT) and ARM's Scalable Vector Extension (SVE).[63]
  • 64 KB L1-I, 64 KB L1-D, 512 KB Private L2 and 1 MB L3/core Shared
  • TSMC 5 nm
  • 8x DDR5

Kunpeng 950

[edit]

The Kunpeng 950 is HiSilicon's sixth-generation server processor announced in 2019 and scheduled for launch in 2023.

AI acceleration

[edit]

HiSilicon also develops AI Acceleration chips.

Da Vinci architecture

[edit]

Each Da Vinci Max AI Core features a 3D Cube Tensor Computing Engine (4096 FP16 MACs + 8192 INT8 MACs), a vector unit (2048bit INT8/FP16/FP32), and a scalar unit. It includes a new AI framework called "MindSpore", a platform-as-a-service product called ModelArts, and a lower-level library called Compute Architecture for Neural Networks (CANN).[32]

Ascend 310

[edit]

The Ascend 310 is an AI inference SoC, it was codenamed Ascend-Mini. The Ascend 310 is capable of 16 TOPS@INT8 and 8 TOPS@FP16.[65] The Ascend 310 features:

  • 2x Da Vinci Max AI cores[32]
  • 8x ARM Cortex-A55 CPU cores
  • 8 MB on-chip buffer
  • 16 channel video decode – H.264/H.265
  • 1 channel video encode – H.264/H.265
  • TSMC 12 nm FFC process
  • 8W TDP

Ascend 910

[edit]

The Ascend 910 is an AI training SoC, it was codenamed Ascend-Max. which delivers 256 TFLOPS@FP16 and 512 TOPS@INT8. The Ascend 910 features:

  • 32x Da Vinci Max AI cores arranged in 4 clusters[32]
  • 1024-bit NoC Mesh @ 2 GHz, with 128 GB/s bandwidth Read/Write per core
  • 3x 240 Gbit/s HCCS ports for Numa connections
  • 2x 100 Gbit/s RoCE interfaces for networking
  • 4x HBM2E, 1.2 TB/s bandwidth
  • 3D-SRAM stacked below AI SoC die
  • 1228 mm2 Total die size (456 mm2 Virtuvian AI SoC, 168 mm2 Nimbus V3 IO Die, 4x96 mm2 HBM2E, 2x110 mm2 Dummy Die)
  • 32 MB on-chip buffer
  • 128 channel video decode – H.264/H.265
  • TSMC 7 nm EUV (N7+) process
  • 350 W

Ascend 910B

[edit]

Ascend 910B is manufactured by SMIC and is very different from Ascend 910.[66]

  • 21.32 mm × 31.22 mm size
  • 25 DaVinci AI cores
  • produced using SMIC 7nm N+1 process

Ascend 910C

[edit]

Huawei Ascend 910C is expected to be mass shipped in May 2025, Ascend 910C combines two Ascend 910B processors. Ascend 910C is an evolution rather than a breakthrough, it achieves performance similar to NVIDIA H100. NVIDIA H100 chips were banned from sale to China by US government in 2022.[67]

DeepSeek researchers say Huawei Ascend 910C provides 60% of NVIDIA H100 inference performance. Ascend 910C compute chiplet is made by SMIC at 2nd generation 7nm process known as N+2.[68]

DeepSeek R1 model was trained on NVIDIA H800, but runs inference on Ascend 910C.[69]

Huawei is expected to sell more than 800,000 of Ascend 910B and Ascend 910C in 2025.[70]

In late April 2025 Huawei started delivering to customers CloudMatrix 384 - a cluster consisting of Ascend 910C chips. The system performs better than NVL72 (72 GB200 chips) from NVIDIA, however the power consumption is significantly higher. CloudMatrix 384 sells for Rmb60mn ($8.2mn) a set.[71] CloudMatrix 384 solution provides 2.3x lower performance per watt than Nvidia's GB200 NVL72. The systems consists of 16 racks including 12 computing racks and 4 networking ones facilitating high-bandwidth using 6912 800G LPO optical transceivers. CloudMatrix uses entirely optical connections for intra- and inter-rack connectivity.[72]

Ascend 910D

[edit]

In late April 2025 WSJ has reported that Huawei approached several China based companies about testing Ascend 910D, the companies will receive first samples in May 2025.[70]

Ascend 920

[edit]

Ascend 920 was announced in April 2025 and expected to provide performance similar to NVIDIA H20 chip (which was banned in April 2025 from selling to China). Ascend 920 is expected to be mass produced in late 2025. Ascend 920 features:[73]

  • 6nm SMIC process
  • HBM3 memory, 4 TB/s bandwidth
  • 900 TFLOPs per card

Semiconductor equipment export control by US

[edit]

The US government started to pressure ASML Holding not to sell new EUV machines to China in 2018.[74]

In 2022, the US government was lobbying the Dutch government to bar ASML from selling older DUV (deep ultraviolet lithography) machines to China. These DUV machines are a generation behind of newer EUV models.[75]

Lam Research and Applied Materials have suspended sales and services to Chinese counterparts in 2022.[76]

In late 2024, the US government expanded export control which will hit semiconductor toolmakers such as KLA Corporation, Lam Research and Applied Materials.[77]

China based SiCarrier is developing equipment to replace products from ASML Holding, Lam Research and Applied Materials.[78]

In late May 2025, the US administration has told to Cadence Design Systems, Synopsys and Siemens EDA to stop supplying their products to China. The restrictions have encouraged the local EDA companies such as Empyrean Technology, Primarius and Semitronix to significantly grow market share.[79]

In September 2025, the SMIC (the largest foundry in China) has started testing the first domestically produced DUV lithography equipment (DUV is the previous generation before EUV). This set of tools was developed by Shanghai Yuliangsheng Technology Co.. The machine is designed for 28nm fabrication, although it can be used for 7nm and 5nm fabrication using multipatterning techniques. It is expected that the mass production of DUV machines will begin in 2027.[80]

See also

[edit]

References

[edit]
[edit]
Revisions and contributorsEdit on WikipediaRead on Wikipedia

HiSilicon

View on Grokipedia
from Grokipedia
HiSilicon Technologies Co., Ltd. is a fabless design company wholly owned by Technologies Co., Ltd., focused on developing application-specific integrated circuits (), system-on-chips (SoCs), and other semiconductors for , mobile devices, and applications. Established in 2004 as Shenzhen HiSilicon Semiconductor Co., Ltd. from 's earlier ASIC design center originating in , the company is headquartered in , , and employs thousands of engineers dedicated to chip architecture innovation. HiSilicon's flagship products include the Kirin series of mobile SoCs, which power smartphones with integrated CPU, GPU, and capabilities, and the Ascend series of AI accelerators designed for workloads in servers and . Notable achievements encompass the Kirin 9000S, a 7-nanometer process chip produced domestically by SMIC for the Pro in 2023, marking a breakthrough in 's advanced fabrication amid international export restrictions. These restrictions, imposed by the in 2019 citing risks tied to potential military end-use and concerns, have compelled HiSilicon to pivot toward indigenous supply chains, fostering advancements in areas like high-bandwidth memory integration for next-generation Ascend processors despite acknowledged performance gaps relative to leading Western designs.

Corporate Background

Founding and Ownership

HiSilicon Technologies Co., Ltd. (Chinese: 海思半导体有限公司) originated as Huawei Technologies Co., Ltd.'s ASIC Design Center, established in 1991 to develop application-specific integrated circuits for telecommunications equipment. In October 2004, the unit was formally incorporated as Shenzhen HiSilicon Semiconductor Co., Ltd., transitioning into an independent entity focused on semiconductor design while retaining close integration with Huawei's broader operations. This restructuring followed Huawei's early experiences in chip development, including a 2003 intellectual property dispute with Cisco Systems that underscored the need for in-house capabilities. HiSilicon operates as a wholly owned of Technologies Co., Ltd., which was founded in 1987 by as a reseller of gear before expanding into and R&D. 's ownership structure is employee-based through a committee holding shares on behalf of approximately 100,000 staff, enabling long-term strategic investments without external shareholder pressures, though HiSilicon's control remains centralized under 's . The is headquartered in , , with its legal name reflecting its focus on HiSilicon-branded technologies derived from "high ." This ownership model has supported HiSilicon's growth into a fabless designer, reliant on foundries like for prior to U.S. export restrictions.

Leadership and Organizational Structure

HiSilicon operates as a wholly owned of Technologies Co., Ltd., with its leadership integrated into 's broader rotating chairmanship system, where senior executives from the parent company periodically oversee strategic direction. The maintains a dedicated executive team focused on design and operations, reporting ultimately to 's . As of September 2025, Jeffery serves as chairman and legal representative of HiSilicon Co., Ltd., having succeeded Eric Xu Zhijun in the role following Xu's resignation amid 's internal reorganization to bolster chip development. , previously head of HiSilicon's division and reportedly the CEO, brings extensive experience in 's router business and regional operations. He Tingbo holds the position of president, a role she assumed after Xu Wenwei's retirement, overseeing R&D and strategic initiatives; she joined in 1996 as a chip and advanced through positions including chief ASIC , R&D director, and president of the 2012 Laboratories. In July 2025, He was additionally appointed head of 's Senior Talent Compensation Division to support talent retention. HiSilicon's emphasizes functional divisions centered on , with primary in and specialized R&D centers in , , (), and to leverage global talent in processor architectures, modems, and AI technologies. The company employs a hierarchical model typical of fabless firms, prioritizing and teams under executive oversight, though detailed internal hierarchies remain and aligned with Huawei's employee-shareholding system for incentive alignment. Key directors include figures such as Ji Wang, Danny So, and Jian Lin, supporting operational and technical leadership.

Historical Development

Early Expansion (2004-2018)

HiSilicon Technologies Co., Ltd. was formally established on September 28, 2004, as Shenzhen HiSilicon Semiconductor Co., Ltd., evolving from Huawei's internal ASIC design center founded in , with a focus on fabricating custom semiconductors for infrastructure. Initially, the company prioritized for Huawei's core networking gear, including router processors, modems, and optical network chips, enabling cost efficiencies and customization in Huawei's carrier equipment deployments. By the mid-2000s, HiSilicon broadened its scope beyond telecom ASICs into multimedia applications, developing video codec processors and chips for set-top boxes, digital televisions, and surveillance systems, which supported Huawei's entry into consumer electronics markets. This diversification aligned with Huawei's vertical integration strategy, allowing in-house silicon to optimize performance in emerging products like IPTV solutions and early multimedia devices. The Balong modem series emerged during this period, with initial 3G models paving the way for multi-mode baseband solutions; by 2014, the Balong 711 became one of the earliest 4G modems, certified by over 100 operators and integrated into Huawei handsets for LTE-FDD/TDD, WCDMA, and GSM support. A pivotal shift occurred in 2011 when , under its Consumer Business Group, committed to proprietary mobile SoCs to lessen reliance on external vendors like , culminating in the 2012 release of the Kirin K3 series—a tri-core ARM-based processor used in devices such as the Huawei Ascend D2. The Kirin lineup formalized in 2014 with the Kirin 910, the world's first commercial quad-core 64-bit mobile SoC on a 28 nm process, powering mid-range phones like the Ascend P7 and tablets. Successive advancements followed: the 2015 Kirin 950 introduced octa-core big.LITTLE architecture on 16 nm; the 2016 Kirin 960 added support and enhanced GPU integration on 16 nm; and the 2017 Kirin 970 debuted a dedicated neural processing unit (NPU) for on-device AI acceleration, fabricated on TSMC's . These SoCs fueled 's smartphone shipment growth, with HiSilicon capturing increasing adoption in premium Android devices. In parallel, HiSilicon advanced technology, unveiling the Balong 5G01 in 2018 as the first commercially available 3GPP-compliant chipset, supporting sub-6 GHz and mmWave bands for early 5G trials. By late 2018, Huawei planned expanded use of HiSilicon SoCs across more models, reflecting the subsidiary's maturation into a key enabler of 's global competitiveness in mobile and broadband sectors, though primarily serving internal needs in a fabless model dependent on foundries like . This period marked HiSilicon's transition from niche telecom supplier to broad-spectrum chip designer, underpinning Huawei's rise without external sales until later years.

Adaptation to Sanctions (2019-2025)

In May 2019, following the U.S. Department of Commerce's addition of to the Entity List, HiSilicon anticipated disruptions by stockpiling components, including at least a three-month supply of critical chips to sustain production amid export restrictions on U.S.-origin technology. This preemptive measure allowed HiSilicon to continue advanced Kirin processors, such as the Kirin 990 on TSMC's 7nm node, for devices like the series launched in September 2019, before full severed. However, escalating rules in May 2020, which required foreign foundries using U.S. equipment to obtain licenses for -bound chips, accelerated the depletion of stockpiles, with HiSilicon's global chip dropping to zero by Q3 2022. Faced with halted access to leading foundries like TSMC and intellectual property challenges—including temporary disruptions in ARM architecture licenses—HiSilicon pivoted to domestic alternatives, partnering closely with Semiconductor Manufacturing International Corporation (SMIC) to leverage China's nascent advanced-node capabilities. This shift emphasized self-reliance, aligning with Beijing's broader push for indigenous semiconductor production, though initial outputs relied on older process nodes like 14nm due to SMIC's limitations in extreme ultraviolet (EUV) lithography access. By 2023, HiSilicon achieved a milestone with the Kirin 9000S processor in the Huawei Mate 60 Pro, fabricated by SMIC on its 7nm (N+2) FinFET process without EUV, marking China's first commercial-scale deployment of such technology and enabling 5G connectivity despite sanctions. Performance benchmarks showed the Kirin 9000S trailing its pre-sanctions predecessor, the TSMC-made Kirin 9000 on 5nm, in multi-core tasks but sufficient for competitive smartphone use, underscoring adaptive engineering amid node constraints. From 2023 to 2025, HiSilicon expanded this to AI and server chips, producing the Ascend 910B accelerator on SMIC's 7nm to support domestic AI training amid U.S. restrictions on equivalents, with shipping approximately 700,000 units in 2025 to fuel China's computing infrastructure. Heavy R&D investments—spurred by sanctions—drove revenue growth, with HiSilicon reportedly doubling earnings by mid-2025 through strong domestic demand for smartphones and AI hardware, though overall operations recorded quarterly losses from these expenditures. Despite these advances, persistent gaps in sub-7nm yields and efficiency limited scalability, as SMIC's deep ultraviolet lithography-dependent yielded lower throughput than global leaders, highlighting sanctions' role in accelerating but constraining China's autonomy.

Core Technologies

Arm-Based Processor Architectures

HiSilicon's Arm-based processor architectures primarily revolve around implementations of the ARM instruction set architecture (ISA), which the company licenses from Arm Holdings to design system-on-chips (SoCs) for mobile devices, servers, and other applications. These architectures integrate CPU cores compatible with ARMv8-A and later extensions, often combining performance-oriented big cores with efficiency-focused little cores in a heterogeneous configuration to optimize power and performance. Early designs relied heavily on Arm's off-the-shelf Cortex-A CPU IP, such as the Cortex-A53, A57, and A77, integrated into the Kirin mobile SoC series for balanced workloads in smartphones and tablets. In response to U.S. export restrictions imposed in , which temporarily disrupted access to advanced IP, HiSilicon accelerated development of custom microarchitectures while adhering to licensed ARMv8 specifications. The Taishan series represents HiSilicon's proprietary CPU cores, first introduced for server applications in the Kunpeng lineup. The Taishan v110, debuting in the Kunpeng 920 SoC announced in , features a 4-way superscalar, pipeline supporting up to 64 cores per socket at frequencies reaching 2.6 GHz, fabricated initially on TSMC's . This custom design prioritizes multi-threaded server workloads, with each core including 1 MB of private L3 cache and support for DDR4 memory channels. Subsequent iterations, such as the Taishan v120 unveiled around 2023, achieve single-core performance comparable to AMD's architecture from 2020, as evidenced by benchmarks showing equivalent scores in tasks like SPECint. For mobile processors, HiSilicon adapted Taishan-derived cores into the Kirin series post-sanctions, diverging from pure Cortex reliance. The Kirin 9000S, launched in 2023 for the , incorporates four Taishan-based big cores with (SMT), clocked up to 2.62 GHz, alongside efficiency cores, enabling competitive performance despite domestic 7 nm-class fabrication. Later models like the Kirin 9010, released in 2024, employ six medium-performance Taishan cores at up to 2.3 GHz and four Cortex-A510 efficiency cores at 1.55 GHz, supporting modems and AI tasks while maintaining compatibility. These custom evolutions allow HiSilicon to circumvent some licensing hurdles by leveraging pre-existing Arm architectural licenses for ISA implementation, though ongoing U.S. controls have prompted exploration of alternatives like for future diversification.

Da Vinci AI Architecture

The Da Vinci architecture constitutes HiSilicon's proprietary design for neural processing units (NPUs), emphasizing scalable computation for deep neural networks across mobile system-on-chips (SoCs) and accelerators. Introduced in 2019 with the Kirin 810 SoC, it integrates specialized hardware for tensor arithmetic, vector operations, and scalar control to handle AI workloads efficiently while minimizing power consumption. The architecture prioritizes a balanced to mitigate bandwidth bottlenecks, enabling seamless data flow between on-chip caches and external memory. At its core, Da Vinci employs heterogeneous processing units: Cube units for high-throughput matrix multiplications, delivering up to 4096 FP16 multiply-accumulate operations (MACs) or 8192 INT8 MACs per core; Vector units supporting 2048-bit wide operations in INT8, FP16, and FP32 formats with built-in functions for activations and non-maximum suppression; and Scalar units for branching and control tasks. This modular setup allows instantiation of core variants—such as Tiny for lightweight , Lite for balanced mobile AI, and Max for intensive —scalable from single-core mobile implementations to multi-core server configurations. For instance, the Ascend 310 accelerator incorporates two Da Vinci cores, achieving 8 TFLOPS in FP16 or 16 in INT8. Evolutions include Da Vinci 2.0, deployed in the 2020 Kirin 9000 series with dual Ascend Lite cores plus one Tiny core, enhancing support for complex tasks like real-time synthesis via integrated ISP linkages. Later iterations, as in the 2024 Kirin 9010, sustain the architecture's focus on LPDDR5X integration and framework compatibility for on-device AI, such as and . In server-grade Ascend chips, like the 910 series, up to 32 Da Vinci Max cores enable competitive FP16 performance against Western counterparts, produced on domestic 7nm processes amid supply constraints. The design's emphasis on mixed-precision and operator fusion reduces latency, though real-world efficacy depends on software optimization via Huawei's CANN framework.

Product Portfolio

Mobile System-on-Chips (Kirin Series)

The Kirin series consists of ARM-based system-on-chip (SoC) designs developed by HiSilicon for mobile applications, including smartphones, tablets, and other consumer devices, with primary deployment in products. Launched in the early as a successor to the K3 series, the lineup evolved from quad-core configurations to advanced octa-core processors incorporating dedicated neural processing units (NPUs) for AI tasks and integrated modems. Key milestones include the Kirin 910, HiSilicon's first quad-core SoC released in 2012, which powered early devices like the Ascend P1, and the Kirin 960 introduced in 2016 for the , featuring a 16nm process and octa-core setup with Mali-G71 GPU for improved graphics performance. Subsequent flagships advanced process nodes and efficiency: the Kirin 970 (2017, 10nm) integrated HiSilicon's first NPU for on-device AI acceleration, enabling features like real-time scene recognition in cameras; the Kirin 980 (2018, 7nm FinFET) marked the series' entry into sub-10nm fabrication, with a dual-NPU setup and Cat.21 LTE supporting up to 1.4 Gbps downloads; and the Kirin 990/990 5G (2019, 7nm EUV) added integrated capabilities via the Balong 5000 , achieving peak downloads of 4.6 Gbps in sub-6GHz bands. The pinnacle pre-sanctions model, Kirin 9000 (2020, 5nm), featured a 1+3+4 CPU cluster using Cortex-A77 cores, a 24-core Mali-G78 GPU, and an upgraded Da Vinci NPU, powering the series with 15.3 billion transistors for enhanced multitasking and 8K video processing. Mid-range variants like the Kirin 710 (2018, 14nm) and Kirin 810 (2019, 7nm) targeted budget devices, offering octa-core Cortex-A76/A55 mixes with Mali-G51 GPUs for balanced power efficiency. U.S. export controls imposed in 2019 restricted HiSilicon's access to advanced foreign foundry capacity, such as TSMC's 5nm and below, halting production of cutting-edge Kirin chips reliant on imported equipment and IP. This led to a multi-year gap in flagship releases, with relying on stockpiled Kirin 990 inventory until 2023, when the Kirin 9000S debuted in the Mate 60 series using SMIC's 7nm N+2 process; it employed custom Taishan V120 CPU cores (1x2.62 GHz + 3x2.15 GHz) alongside Cortex-A510 efficiency cores, but benchmarked lower than the original 9000 due to denser packing and yield limitations, with scores around 1,000 single-core versus 9000's 1,200+. Subsequent models like the Kirin 9010 and its variant Kirin 9010B (2024), fabricated on SMIC's 7nm second-generation N+2 process, share a Maleoon 910 GPU at 750 MHz, self-developed Taishan architecture for big and medium cores paired with Cortex-A510 for small cores, and 5G baseband support in some versions; neither reaches flagship performance levels comparable to the Kirin 9020 but demonstrates effective optimization within 7nm constraints for incremental improvements in P-series devices. By 2025, disclosed the Kirin 9020 in Pura 80 smartphones, reportedly achieving 40% performance gains over predecessors through optimized domestic lithography, though specifics on core counts and node remain guarded amid ongoing restrictions. The Kirin 9030 chipset, launched in late 2025 for the Mate 80 series, delivers up to 42% higher performance than the Kirin 9020, produced on SMIC's advanced domestic process node representing China's most sophisticated semiconductor manufacturing to date, with capabilities approaching but not matching global 3nm standards. The Kirin 9030 Pro features a 9-core CPU design (1+4+4 configuration) with 1 Taishan super core at 2.75 GHz supporting multithreading, 4 mid cores at 2.27 GHz, and 4 efficiency cores at 1.72 GHz, totaling 14 threads in a big.LITTLE heterogeneous architecture supporting the 64-bit instruction set. In 2026, Huawei plans chip upgrades for the Pura 90 series in the first half, alongside the mid-range Kirin 8030 featuring premium Taishan cores clocked up to 3.0 GHz. Development toward high-end 3nm GAA chips is targeted for tape-out by 2026, amid ongoing efforts to enhance AI and GPU efficiency. These adaptations underscore HiSilicon's shift to self-reliance, prioritizing functionality over parity with competitors like Qualcomm's Snapdragon series on sub-4nm nodes.
ModelRelease YearProcess NodeCPU ConfigurationNotable Features
Kirin 970201710nm4x Cortex-A73 + 4x A53First integrated NPU for AI
Kirin 98020187nm2x Cortex-A76 + 2x A76 + 4x A55Dual NPU, first 7nm Kirin
Kirin 990 5G20197nm EUV2x Cortex-A76 + 2x A76 + 4x A55Integrated Balong 5000 5G modem
Kirin 900020205nm1x Cortex-A77 + 3x A77 + 4x A5524-core GPU, advanced AI processing
Kirin 9000S20237nm (SMIC)1x Taishan V120 + 3x V120 + 4x A510Post-sanctions domestic production

Integrated Modems (Balong Series)

The Balong series consists of HiSilicon's baseband modem chipsets, engineered for integration into system-on-chips (SoCs) such as the Kirin family, enabling multi-generation cellular support in Huawei's mobile devices including smartphones and tablets. These modems prioritize multimode compatibility, from 2G/3G fallback to advanced LTE and 5G, with optimizations for power efficiency and global band coverage when embedded within larger SoC architectures. Early iterations focused on LTE advancements, while later models introduced 5G capabilities, often achieving industry-first benchmarks in speed and architecture support. Integration allows for reduced latency in data handoffs and unified power management between the application processor and modem cores. Development began with foundational LTE models. The Balong 700 marked the series' debut as the first chipset supporting both LTE TDD and FDD modes under Release 8 protocols, featuring 4x2/2x2 SU- for enhanced throughput in early deployments, though limited to LTE without legacy voice integration. The Balong 710, released in 2012, advanced to LTE Category 4 with 2x2/4x2 , achieving 150 Mbps downlink and 50 Mbps uplink in FDD mode, alongside / voice support and worldwide frequency bands for roaming; it was designed for pairing with SoCs like the K3V2. Subsequent enhancements included the Balong 720 for 5-mode LTE Category 6 with dual-carrier aggregation over 40 MHz bandwidths, and the Balong 765, which introduced 8x8 —the only such implementation at the time—delivering up to 1.6 Gbps downlink in LTE Category 21 configurations, as integrated in variants like the Kirin 990 4G. The transition to 5G emphasized multimode integration for . The Balong 5G01, announced in February 2018, became the first commercially viable 3GPP-compliant , supporting sub-6 GHz bands with peak downlink speeds of 2.3 Gbps, initially targeted for but adaptable for SoC embedding. This paved the way for the Balong 5000, unveiled in January 2019 as the first 7 nm multimode encompassing through on a single die, with standalone (SA) and non-standalone (NSA) architecture fusion, sub-6 GHz downloads up to 4.6 Gbps, and mmWave up to 6.5 Gbps. Integrated into Kirin SoCs such as the Kirin 990 and Kirin 9000, it enabled devices like the Huawei Mate 20 X to achieve commercial connectivity while maintaining fallback efficiency. These integrated designs reduced component count and improved thermal performance in handsets, though production scaled amid supply constraints post-2019.
ModelKey Supported StandardsPeak Downlink SpeedNotable Integration Features
Balong 710LTE Cat 4 FDD/TDD, 2G/3G150 Mbps (FDD)Paired with early Kirin SoCs for voice/data fallback
Balong 765LTE Cat 21, 8x8 MIMO1.6 GbpsEmbedded in Kirin 990 4G for high-end 4G optimization
Balong 5G015G sub-6 GHz ( R15)2.3 GbpsEarly 5G SoC adaptability with legacy modes
Balong 50005G SA/NSA, 2G-5G multimode4.6 Gbps (sub-6 GHz)7 nm integration in Kirin 990/9000 for smartphones

Wearable and IoT Processors

HiSilicon has developed specialized system-on-chips (SoCs) for wearable devices, with the Kirin A1 serving as a flagship example tailored for low-power connectivity. Announced in September 2019, the Kirin A1 (also known as Hi1132) is the world's first dual-mode 5.1 and (BLE) 5.1 wearable chip, featuring isochronous dual-channel transmission for audio, a 356 MHz dedicated audio processor, and an Arm Cortex-M7 for efficient task handling. It supports applications in true wireless stereo (TWS) earbuds, smartwatches, headbands, neckbands, smart speakers, and , powering devices such as the Huawei Watch GT 2 and FreeBuds 3. These wearable SoCs emphasize ultra-low power consumption and integrated RF capabilities to enable seamless connectivity in battery-constrained environments, with HiSilicon's designs primarily targeting wrist-worn devices like smart bands and watches, as well as head-mounted audio products. In response to production challenges from sanctions, has increased output of Kirin-series chips for smart wearables as of June 2024, aiming to bolster ecosystem expansion amid restricted access to advanced nodes. For (IoT) applications, HiSilicon provides connectivity-focused processors emphasizing wide-area coverage, low power, and compatibility with standards like NB-IoT and LTE Cat-1. Key offerings include the Hi2115, a Release 14-compliant Cat-NB2 chip launched for ultra-low-power scenarios, integrating an MCU, memories, and interfaces while operating in bands from 698-960 MHz and 1695-2180 MHz with three Cortex-M0+ cores. The Hi2120 complements this as another cellular IoT for reliable performance in smart homes, mobility, and urban . Additionally, the Hi2131, a low-power Cat-1 chip introduced in 2025, targets broader IoT deployment by enhancing connectivity efficiency. HiSilicon's IoT processors also incorporate architectures for versatility, as seen in the Hi3861 WLAN SoC for 2.4 GHz connectivity in compact development boards measuring 2 cm x 5 cm, integrating 802.11b/g/n and RF circuits. These chips power diverse devices including IP cameras and systems, with HiSilicon components embedded in tens of millions of global IoT units as of 2018, despite geopolitical scrutiny over integrations. Recent initiatives by HiSilicon's arm, as of July 2025, include -based solutions for industrial IoT, smart homes, and visual AI, reflecting efforts to diversify beyond dependencies.

Server Processors (Kunpeng Series)

The Kunpeng series comprises Arm-based server processors developed by HiSilicon for in data centers, , and enterprise servers. These CPUs leverage the Armv8 architecture to deliver multi-core scalability, targeting workloads such as , databases, and processing. Initial development of the series, internally designated Hi16xx, began around 2015, with early models produced on 16 nm processes featuring up to 32 cores but limited cache efficiency compared to contemporary x86 alternatives. The flagship Kunpeng 920, introduced in January 2019, represents a significant advancement, fabricated on a 7 nm process node and incorporating HiSilicon's custom TaiShan V110 cores. This 64-core configuration operates at up to 2.6 GHz base frequency (with select variants reaching 3.0 GHz), supports 8-channel DDR4 memory, PCIe 4.0 interfaces, and coherent interconnects for up to 4-socket systems with 480 Gbit/s inter-chip bandwidth. The TaiShan V110 is a 64-bit Armv8-A compliant core with 4-wide out-of-order execution, marking HiSilicon's debut in proprietary core design rather than relying solely on licensed Arm IP. Variants like the Kunpeng 920-6426 scale to 64 cores per socket, while lower-core options (e.g., 48-core or 8-core desktop derivatives) enable broader deployment in Huawei's TaiShan server lineup. Performance evaluations indicate the Kunpeng 920 excels in core-count-heavy scenarios due to its density, outperforming Intel's 6248 in multi-threaded SPEC benchmarks thanks to superior parallelism, though it lags behind AMD's processors by nearly a factor of two in similar tests. Single-threaded efficiency remains a relative weakness compared to x86 incumbents, reflecting Arm's historical trade-offs in and branch prediction. Adoption has been concentrated in domestic Chinese markets, powering Huawei's TaiShan 2280 V2 servers for applications in government, finance, and telecom sectors, with ecosystem partners certifying software compatibility for distributions and open-source stacks. Subsequent iterations, such as the Kunpeng 916 series, offer refined power envelopes (e.g., 64 cores at lower TDP for energy-sensitive deployments), but broader global penetration has been constrained by U.S. export restrictions limiting access to advanced fabrication.

AI Accelerators (Ascend Series)

The Ascend series represents HiSilicon's dedicated lineup of AI accelerators, optimized for training, inference, and hybrid workloads across edge, cloud, and deployments. Introduced in 2019, the series leverages Huawei's proprietary Da Vinci architecture, which features specialized AI cores for matrix-vector operations, scalar processing, and efficient data flow tailored to computations. This architecture enables scalable performance by integrating multiple Da Vinci cores with on-chip buffers, network-on-chip (NoC) interconnects, and support for formats like FP16 and INT8, prioritizing energy efficiency over general-purpose . Despite U.S. export controls imposed since 2019 restricting access to advanced nodes and EDA tools, HiSilicon has advanced the series through domestic fabrication at SMIC and strategic stockpiling, achieving iterative improvements in yield and integration. The entry-level Ascend 310, launched in 2019 for edge applications such as video analytics and , integrates two Da Vinci Max AI cores alongside CPU cores, delivering 16 at INT8 precision with only 8 W power consumption. It supports 16-channel H.264/H.265 video decoding and is deployed in compact modules like the Atlas 200 for on-device AI processing in industrial and IoT scenarios. Higher-end models target training; the flagship Ascend 910, unveiled on August 23, 2019, was positioned as the world's most powerful AI processor at launch, with 32 Da Vinci cores in four clusters, 1024-bit NoC at 2 GHz, and interfaces for high-bandwidth memory. Subsequent iterations include the Ascend 910B (2022), comparable to Nvidia's A100 in select benchmarks, and the Ascend 910C (mass production starting May 2025), which fuses two 910B dies to achieve approximately 60% of Nvidia H100 performance in AI training tasks while optimizing for China's domestic ecosystem.
ModelDa Vinci CoresKey Performance (INT8/FP16)PowerTarget Use CaseRelease Year
Ascend 310216 / 8 TFLOPS8 Edge 2019
Ascend 91032512 / 256 TFLOPS350 Data center 2019
Ascend 910CDual 910B~60% H100 equiv.N/ALarge-scale clusters2025
Performance claims for newer variants like the Ascend 910D (announced 2025) suggest competitiveness with Nvidia's H100 in bandwidth-constrained scenarios, bolstered by Huawei's in-house HBM alternatives achieving up to 1.6 TB/s. However, independent analyses indicate single-chip throughput lags Nvidia's latest offerings by factors of 6-10x in raw FLOPS, with strengths emerging in system-level scaling via Atlas clusters like the 384-chip CloudMatrix 384 or 8192-chip Atlas 950 SuperNode. As of February 2026, Huawei's AI strategy emphasizes self-reliant AI infrastructure via its Ascend NPU roadmap (announced September 2025), focusing on chip advancements, large-scale clusters, and ecosystem building to counter U.S. sanctions and rival Nvidia. Roadmap extensions through 2026 include the Ascend 920 (shipping H2 2025), the Ascend 950 series with the 950PR variant planned for Q1 2026 featuring self-developed HBM, support for low-precision formats, enhanced vector computing, and 2.5x interconnect bandwidth over the 910C, the 950DT variant for Q4 2026, alongside the Ascend 960 integrated into SuperPods for exascale AI and the Atlas 950 SuperPoD (Q4 2026) with up to 8,192 chips delivering exaFLOPS-scale performance, all amid ongoing sanctions. Huawei plans to increase Ascend chip output in 2026 to up to 1.6 million dies. In January 2026, Huawei Cloud released its 2026 ecosystem policy, prioritizing AI-driven partnerships, developer enablement, KooGallery enhancements, and over CNY 100 million in startup investments to foster AI innovation. Recent deployments include a computing platform project with China Mobile utilizing Ascend 910C chips. These developments reflect HiSilicon's pivot to self-reliant supply chains, shipping over 700,000 units by mid-2025 despite global restrictions.

Manufacturing and Supply Chain

Global Foundry Dependencies

HiSilicon, as a fabless design firm, relies entirely on external for , with a heavy dependence on global leaders like for cutting-edge processes unavailable domestically prior to geopolitical restrictions. From its inception, HiSilicon outsourced production of high-volume products such as the Kirin series mobile SoCs and Ascend AI accelerators to , which manufactured chips on 7nm and earlier nodes; for instance, the Kirin 990, introduced in 2019, was fabricated by on its 7nm process. This partnership peaked in 2019, when and HiSilicon accounted for approximately 37% of 's total sales, underscoring the foundry's critical role in enabling HiSilicon's competitive edge in smartphones and AI hardware. The U.S. Department of Commerce's expansion of the Foreign Direct Product Rule (FDPR) in 2020 effectively severed this supply chain, prohibiting foreign foundries using U.S.-origin technology—such as TSMC's processes reliant on American equipment and IP—from producing for entities without licenses. TSMC halted new orders from HiSilicon on September 14, 2020, though pre-existing inventory allowed limited continuity for products like the Kirin 9000, also on TSMC's 5nm node. This cutoff exposed HiSilicon's vulnerability to international supply disruptions, as alternative global foundries like were either unwilling or unable to fill the gap due to similar U.S. extraterritorial controls, forcing a pivot toward less advanced domestic alternatives. Post-2020, attempts to circumvent restrictions, such as alleged proxy arrangements uncovered by in involving precursor production for Ascend chips, highlight ongoing tensions but have not restored full access to global advanced nodes. HiSilicon's pre-sanctions reliance on not only accelerated its technological roadmap but also amplified risks from geopolitical dependencies, with no evidence of diversified global partnerships mitigating the 2020 impact.

Domestic Production Advances

In response to U.S. export restrictions imposed in 2020, which barred access to advanced foreign foundries like TSMC, HiSilicon pivoted to domestic manufacturing partnerships, primarily with Semiconductor Manufacturing International Corporation (SMIC). This shift enabled the production of the Kirin 9000S system-on-chip in 2023, fabricated entirely on SMIC's 7 nm N+2 process for the Huawei Mate 60 Pro smartphone, marking a significant milestone in China's advanced node capabilities without extreme ultraviolet (EUV) lithography. The 7 nm N+2 node employs deep ultraviolet (DUV) lithography with multi-patterning techniques to achieve feature densities comparable to some global standards, though at elevated costs—up to 50% premiums over equivalents—and with larger critical dimensions that limit performance efficiency. By mid-2025, HiSilicon continued leveraging this process for designs like the Kirin X90 in the Huawei Matebook Fold, underscoring persistent challenges in scaling to 5 nm production despite developmental progress at SMIC. In the AI domain, HiSilicon's Ascend 910C accelerator advanced toward mass production in the first quarter of 2025 via SMIC's 7 nm capacities, bolstering domestic amid broader national initiatives. SMIC's reported trajectory includes 5 nm node completion by late 2025, potentially enabling future HiSilicon iterations, though yields remain constrained and overall self-sufficiency in cutting-edge semiconductors trails global leaders, with achieving only partial progress toward its 70% domestic production target under the plan.

Geopolitical Challenges

US Export Controls and Entity List

In May 2019, the Department of Commerce's (BIS) added HiSilicon Technologies Co., Ltd., headquartered in , , to the under the (EAR), effective May 16, 2019, as part of a broader action targeting Technologies Co., Ltd. and 68 affiliated entities. This designation was based on BIS's determination that HiSilicon, Huawei's design subsidiary, was involved in activities contrary to U.S. or interests, including risks associated with the development and supply of technologies potentially enabling or applications. Placement on the imposes a licensing requirement for any export, reexport, or transfer (in-country) of items subject to the EAR—including commodities, software, and technology—to HiSilicon, with license applications subject to a presumption of denial to restrict access to U.S.-origin goods and technology. The Entity List action disrupted HiSilicon's , particularly its reliance on U.S.-controlled and equipment for chip and fabrication processes. In August 2019, BIS added 46 additional non-U.S. affiliates to the list, further encompassing HiSilicon's operational network. On May 15, 2020, BIS amended the foreign direct product rule (FDPR) with a "Huawei-specific" expansion under §734.9(e)(1) of the EAR, requiring licenses for foreign-produced items that are direct products of certain U.S. technologies, software, or equipment if destined for HiSilicon or other footnote 1 entities, even if manufactured abroad. This rule change, effective immediately with a 120-day for some compliance, targeted circumvention risks and severely limited HiSilicon's access to advanced semiconductor manufacturing, as key foundries like incorporate U.S.-origin tools and IP subject to the expanded FDPR. Subsequent BIS actions have reinforced these controls, including August 2020 additions of 38 more affiliates and ongoing enforcement, such as a November 2021 settlement fining a U.S. firm $80,000 for unlicensed exports of controlled equipment to HiSilicon. The Entity List status remains in effect as of 2025, with HiSilicon designated under a "footnote 1" that triggers the FDPR, prohibiting unlicensed supply of specified and related items produced with U.S. . These measures have compelled HiSilicon to pivot toward domestic alternatives, though persistent U.S. dependencies in global ecosystems continue to constrain its output of high-performance chips like the Kirin and Ascend series.

Alleged Security Concerns and Denials

In February 2020, Russian security researcher Vladislav disclosed a backdoor in for recorders (DVRs) and network video recorders (NVRs) using HiSilicon system-on-chips (SoCs), such as the Hi3520 series, where hardcoded credentials allowed remote access without . The issue affected devices from third-party manufacturers like Xiongmai , enabling potential unauthorized or control, though Yarmak attributed it to implementation rather than the HiSilicon hardware itself. HiSilicon's analysis concluded the vulnerability originated in customer-supplied software stacks, not the chips or provided SDKs, and emphasized that no deliberate backdoors were embedded by the company. Broader allegations against HiSilicon stem from its parent company 's designation as a risk by the U.S. , which in 2019 added (including affiliates like HiSilicon) to the Entity List, citing risks of and theft under China's National Intelligence Law, which mandates corporate cooperation with state intelligence efforts. U.S. officials have expressed concerns that HiSilicon-designed chips in and surveillance equipment could facilitate undisclosed access for Chinese authorities, potentially disrupting or enabling , though no public forensic evidence has confirmed hardware-level backdoors in HiSilicon products. Independent assessments, including those from security firms, have identified software vulnerabilities in HiSilicon-based devices but found no systematic evidence of state-sponsored mechanisms embedded in the chips. HiSilicon and have consistently denied introducing backdoors or vulnerabilities for unauthorized access, stating in official notices that the company adheres to international cybersecurity standards and conducts rigorous internal reviews, with any reported issues traced to third-party integrations rather than core chip design. In response to the 2020 DVR backdoor claims, HiSilicon urged customers to update and collaborated with vendors for patches, while rejecting assertions of intentional flaws. Critics, including U.S. policymakers, maintain skepticism due to opaque supply chains and legal obligations under , but empirical demonstrations of exploitable backdoors remain limited to post-manufacture modifications, not inherent chip architecture.

Industry Workarounds and Responses

In response to U.S. export controls imposed after Huawei's addition to the Entity List in May 2019, HiSilicon pivoted to domestic manufacturing partners, primarily (SMIC), to sustain chip production. This shift enabled the fabrication of system-on-chips like the Kirin 9000S, a 7nm-class processor released in August 2023 for the , using SMIC's N+2 process node derived from deep ultraviolet (DUV) lithography with multi-patterning techniques rather than prohibited (EUV) equipment. Despite lower yields and performance deficits compared to TSMC's 5nm Kirin 9000—evidenced by benchmark tests showing reduced CPU and GPU efficiency—the Kirin 9000S demonstrated circumvention of restrictions barring access to advanced foreign tools. For AI accelerators, HiSilicon produced the Ascend 910B using SMIC's 7nm process, incorporating domestic alternatives to restricted U.S.-origin while relying on architectural optimizations such as designs and software stacking to approximate higher performance. CEO acknowledged in June 2025 that the firm trails U.S. technology by one generation but compensates through methods like cluster computing and enhanced algorithms, prioritizing volume production for domestic markets capped at around 200,000 Ascend units annually due to ongoing controls. These efforts align with China's broader , including state-backed investments exceeding $150 billion since , which have accelerated SMIC's progress toward 5nm nodes using DUV-based multi-patterning for densities up to 130 million per square millimeter. Industry-wide, Chinese entities have responded by verticalizing supply chains under Huawei's influence, with HiSilicon integrating design, testing, and packaging to minimize foreign dependencies, as seen in its dominance of domestic fabless production. However, U.S. authorities have countered with expanded rules, such as the 2020 foreign direct product rule amendments, targeting foreign-made items incorporating U.S. , prompting further adaptations like indigenous EDA tools and materials sourcing. Yields remain a bottleneck, with SMIC's 7nm processes reportedly achieving only 30-40% efficiency versus global leaders, underscoring the controls' partial efficacy in constraining advanced scaling.

Market Impact and Performance

HiSilicon's revenue experienced significant volatility following the U.S. Department of Commerce's addition of and its affiliates to the Entity List in May 2019, which restricted access to advanced manufacturing processes and U.S. technology. Prior to these restrictions, HiSilicon contributed substantially to 's device ecosystem, but by Q3 2022, its global had declined to 0% due to inability to produce competitive advanced nodes. A resurgence began in 2023-2024, driven by domestic advancements in chip design and production at nodes like 7nm via SMIC, enabling Huawei's return to premium smartphone segments with Kirin processors. HiSilicon's doubled year-over-year in 2024, fueled by strong sales of Huawei's Pura 70 and Mate 70 series handsets, which incorporated in-house SoCs. This growth aligned with Huawei's consumer business surging 38% year-on-year to 339 billion yuan ($47 billion) in 2024, reflecting increased internal procurement of HiSilicon chips amid broader Huawei reaching 862 billion yuan, nearing the 2020 pre-sanctions peak. In market share terms, HiSilicon captured 12% of the global premium Android smartphone system-on-a-chip (SoC) market in 2024, up from 8% in 2023, ranking third in global smartphone chip revenues for that year. Within China, HiSilicon has solidified dominance in Huawei's supply chain, supporting the company's 18.1% smartphone market share as of 2025, though broader semiconductor market shares remain constrained by export controls limiting external sales, with over 90% of output directed internally to Huawei. Projections for indicate continued internal revenue growth tied to Huawei's anticipated exceedance of 900 billion yuan overall revenue, bolstered by 5G-enabled devices, though high R&D spending—reaching 22.7% of Huawei's H1 sales—may pressure net profits amid geopolitical barriers to global expansion.

Technological Contributions and Benchmarks

HiSilicon's Kirin series of mobile processors represents a major contribution to integrated SoC design, incorporating custom Taishan CPU cores derived from ARMv8 architecture, GPUs, and dedicated Neural Processing Units (NPUs) for on-device AI tasks. The Kirin 9020, featured in Huawei's Mate 70 series launched in late 2024, utilizes a 7nm process node fabricated by SMIC, with an octa-core configuration including high-performance Taishan V120 cores clocked up to 2.5 GHz, delivering v10 scores exceeding 1 million points and 6 single-core results around 1,500, positioning it competitively against Qualcomm's Snapdragon 8 Gen 3 in multi-threaded workloads. Earlier iterations like the Kirin 980, introduced in 2018 on TSMC's 7nm node, pioneered dual-NPU setups for enhanced efficiency, achieving 5 multi-core scores of approximately 3,000 in devices such as the P30. These designs emphasize power efficiency and integration via Balong modems, with the Kirin 9000 (2020) supporting sub-6GHz and mmWave bands while integrating ISP for advanced imaging. In AI acceleration, HiSilicon's Ascend series advances data center-scale computing through the Da Vinci architecture, which optimizes tensor operations and supports large-scale clustering. The Ascend 910C, released in 2025, offers up to 800 TFLOPS in FP16 precision with 128 GB HBM3 memory at 310W TDP, enabling Huawei's CloudMatrix 384 cluster to surpass 's H800 in benchmarks for models like DeepSeek R1, reportedly achieving higher tokens-per-second throughput in reasoning tasks due to optimized interconnects and software stack integration. Independent tests indicate the Ascend 910B predecessor delivers around 60% of H100's performance in mixed-precision AI training, bolstered by innovations in packaging to mitigate yield issues on SMIC's 7nm node. These chips contribute to China's push for AI sovereignty, with claiming up to 80 TFLOPS FP16 uplift per generation through architectural refinements like enhanced matrix multiply units. HiSilicon's Kunpeng and Taishan server processors extend ARM-based computing to high-performance data centers, featuring up to 64 cores per die on 7nm processes with coherent interconnects for multi-socket . The Kunpeng 920, announced in 2019, operates at 2.6 GHz across 64 cores, yielding SPEC CPU 2017 integer rate scores of around 930 in base configuration and supporting 8-channel DDR4 memory for bandwidth-intensive workloads. The Taishan V120 core, refined in later iterations, matches single-core performance in leaked benchmarks from 2024, with out-of-order execution widths comparable to contemporary x86 designs, enabling efficient and cloud-native applications in Huawei's TaiShan servers. Contributions include heterogeneous integration with openEuler OS for embedded deployments and early adoption of ARMv8.2 extensions for acceleration.
Processor SeriesKey InnovationRepresentative Benchmark
Kirin (Mobile SoC)Custom Taishan cores + integrated 5G/NPUKirin 9020: AnTuTu v10 >1M; Geekbench 6 single ~1,500
Ascend (AI Accelerator)Da Vinci tensor core + cluster scaling910C CloudMatrix: Outperforms H800 in DeepSeek R1 inference
Kunpeng/Taishan (Server)64-core ARMv8 + multi-socket coherenceKunpeng 920: SPECint_base 930 @ 2.6 GHz
These benchmarks, often derived from manufacturer disclosures or third-party leaks amid U.S. export restrictions, highlight HiSilicon's focus on domestic process nodes and software-hardware co-design, though real-world variability arises from ecosystem maturity compared to or stacks.

Competitive Landscape

HiSilicon primarily competes in the design of system-on-chip (SoC) processors for mobile devices, (AI) accelerators, and networking equipment, facing established global players and emerging domestic rivals in . In the SoC market, its Kirin series contends with 's Snapdragon, 's Dimensity, Samsung's , and Apple's A-series chips, where held a leading 36% shipment share globally as of late 2024, followed by at 23%, while HiSilicon maintained a niche presence primarily through devices, capturing about 4% share in Q1 2025 despite quarterly shipment declines. HiSilicon ranked third in global Android premium SoC revenue for 2024, buoyed by domestic sales, but its overall market position has been constrained by U.S. export restrictions limiting access to advanced processes. In AI chips, HiSilicon's Ascend series targets and applications, competing against 's dominance in high-performance GPUs, as well as offerings from , , and domestic firms like , though retains a commanding lead in global AI training and inference workloads due to superior software ecosystems like . Chinese alternatives, including for low-to-midrange mobile processors, have gained ground domestically; surpassed HiSilicon in China's smartphone application processor share by 2021, leveraging cost advantages in emerging markets. HiSilicon's efforts to innovate under sanctions, such as the 7nm Kirin 9000S fabricated by SMIC in 2023, demonstrate resilience but lag behind competitors' sub-5nm nodes from , impacting performance benchmarks where Kirin chips rank mid-tier, such as the Kirin 9020 at 59th in overall processor ratings as of 2025. For networking and baseband chips, HiSilicon challenges and in modems, where expanded its smartphone share to 29.2% in 2024 from 22.8% the prior year, overtaking 's declining 26.5%, while HiSilicon's integration in infrastructure provides a bundled advantage in but faces barriers in international carrier adoption due to security scrutiny. Overall, geopolitical constraints have shifted HiSilicon toward and domestic , fostering advances in alternative architectures but widening the technological gap with Western leaders in and ecosystem maturity.

References

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