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The current connector for USB, Thunderbolt, and other protocols: USB-C (plug and receptacle shown) | |||
| Type | Bus | ||
|---|---|---|---|
| Production history | |||
| Designer | |||
| Designed | January 1996 | ||
| Produced | Since May 1996[1] | ||
| Superseded | Serial port, parallel port, game port, Apple Desktop Bus, PS/2 port, and FireWire (IEEE 1394) | ||
| Open standard? | Yes | ||
Universal Serial Bus (USB) is an industry standard, developed by USB Implementers Forum (USB-IF), for digital data transmission and power delivery between many types of electronics. It specifies the architecture, in particular the physical interfaces, and communication protocols to and from hosts, such as personal computers, to and from peripheral devices, e.g. displays, keyboards, and mass storage devices, and to and from intermediate hubs, which multiply the number of a host's ports.[2]
Introduced in 1996, USB was originally designed to standardize the connection of peripherals to computers, replacing various interfaces such as serial ports, parallel ports, game ports, and Apple Desktop Bus (ADB) ports.[3] Early versions of USB became commonplace on a wide range of devices, such as keyboards, mice, cameras, printers, scanners, flash drives, smartphones, game consoles, and power banks.[4] USB has since evolved into a standard to replace virtually all common ports on computers, mobile devices, peripherals, power supplies, and manifold other small electronics.
In the latest standard, the USB-C connector replaces many types of connectors for power (up to 240 W), displays (e.g. DisplayPort, HDMI), and many other uses, as well as all previous USB connectors.
As of 2024,[update] USB consists of four generations of specifications: USB 1.x, USB 2.0, USB 3.x, and USB4. The USB4 specification enhances the data transfer and power delivery functionality with "a connection-oriented tunneling architecture designed to combine multiple protocols onto a single physical interface so that the total speed and performance of the USB4 Fabric can be dynamically shared."[2] In particular, USB4 supports the tunneling of the Thunderbolt 3 protocols, namely PCI Express (PCIe, load/store interface) and DisplayPort (display interface). USB4 also adds host-to-host interfaces.[2]
Each specification sub-version supports different signaling rates from 1.5 and 12 Mbit/s half-duplex in USB 1.0/1.1 to 80 Gbit/s full-duplex in USB4 2.0.[5][6][7][2] USB also provides power to peripheral devices; the latest versions of the standard extend the power delivery limits for battery charging and devices requiring up to 240 watts as defined in USB Power Delivery (USB-PD) Rev. V3.1.[8] Over the years, USB(-PD) has been adopted as the standard power supply and charging format for many mobile devices, such as mobile phones, reducing the need for proprietary chargers.[9]
Overview
[edit]USB was designed to standardize the connection of peripherals to personal computers, both to exchange data and to supply electric power. It has largely replaced interfaces such as serial ports and parallel ports and has become commonplace on various devices. Peripherals connected via USB include computer keyboards and mice, video cameras, printers, portable media players, mobile (portable) digital telephones, disk drives, and network adapters.
USB connectors have been increasingly replacing other types of charging cables for portable devices.[10][11][12]
USB connector interfaces are classified into three types: the many various legacy Type-A (upstream) and Type-B (downstream) connectors found on hosts, hubs, and peripheral devices, and the modern Type-C (USB-C) connector, which replaces the many legacy connectors as the only applicable connector for USB4.
The Type-A and Type-B connectors came in Standard, Mini, and Micro sizes. The standard format was the largest and was mainly used for desktop and larger peripheral equipment. The Mini-USB connectors (Mini-A, Mini-B, Mini-AB) were introduced for mobile devices. Still, they were quickly replaced by the thinner Micro-USB connectors (Micro-A, Micro-B, Micro-AB). The Type-C connector, also known as USB-C, is not exclusive to USB, is the only current standard for USB, is required for USB4, and is required by other standards, including modern DisplayPort and Thunderbolt. It is reversible and can support various functionalities and protocols, including USB; some are mandatory, and many are optional, depending on the type of hardware: host, peripheral device, or hub.[13][14]
USB specifications provide backward compatibility, usually resulting in decreased signaling rates, maximal power offered, and other capabilities. The USB 1.1 specification replaces USB 1.0. The USB 2.0 specification is backward-compatible with USB 1.0/1.1. The USB 3.2 specification replaces USB 3.1 (and USB 3.0) while including the USB 2.0 specification. USB4 "functionally replaces" USB 3.2 while retaining the USB 2.0 bus operating in parallel.[5][6][7][2]
The USB 3.0 specification defined a new architecture and protocol named SuperSpeed (aka SuperSpeed USB, marketed as SS), which included a new lane for a new signal coding scheme (8b/10b symbols, 5 Gbit/s; later also known as Gen 1) providing full-duplex data transfers that physically required five additional wires and pins, while preserving the USB 2.0 architecture and protocols and therefore keeping the original four pins/wires for the USB 2.0 backward-compatibility resulting in 9 wires (with 9 or 10 pins at connector interfaces; ID-pin is not wired) in total.
The USB 3.1 specification introduced an Enhanced SuperSpeed System – while preserving the SuperSpeed architecture and protocol (SuperSpeed USB) – with an additional SuperSpeedPlus architecture and protocol (aka SuperSpeedPlus USB) adding a new coding schema (128b/132b symbols, 10 Gbit/s; also known as Gen 2); for some time marketed as SuperSpeed+ (SS+).
The USB 3.2 specification[15] added a second lane to the Enhanced SuperSpeed System besides other enhancements so that the SuperSpeedPlus USB system part implements the Gen 1×2, Gen 2×1, and Gen 2×2 operation modes. However, the SuperSpeed USB part of the system still implements the one-lane Gen 1×1 operation mode. Therefore, two-lane operations, namely USB 3.2 Gen 1×2 (10 Gbit/s) and Gen 2×2 (20 Gbit/s), are only possible with Full-Featured USB-C. As of 2023, they are somewhat rarely implemented; Intel, however, started to include them in its 11th-generation SoC processor models, but Apple never provided them. On the other hand, USB 3.2 Gen 1(×1) (5 Gbit/s) and Gen 2(×1) (10 Gbit/s) have been quite common for some years.
Connector type quick reference
[edit]Each USB connection is made using two connectors: a receptacle and a plug. Pictures show only receptacles:
| Standard | USB 1.0 1996 |
USB 1.1 1998 |
USB 2.0 2000 |
USB 2.0 Revised |
USB 3.0 2008 |
USB 3.1 2013 |
USB 3.2 2017 |
USB4 2019 |
USB4 2.0 2022 | |
|---|---|---|---|---|---|---|---|---|---|---|
| Max Speed | Recommended marketing names from 2022[16] |
Basic-Speed | High-Speed |
USB 5Gbps | USB 10Gbps | USB 20Gbps | USB 40Gbps |
USB 80Gbps | ||
| Original label | Low-Speed & Full-Speed |
SuperSpeed, or SS |
SuperSpeed+, or SS+ | SuperSpeed USB 20Gbps | ||||||
| Operation mode | USB 3.2 Gen 1×1 | USB 3.2 Gen 2×1 | USB 3.2 Gen 2×2 | USB4 Gen 3×2 | USB4 Gen 4×2 | |||||
| Signaling rate | 1.5 Mbit/s & 12 Mbit/s | 480 Mbit/s | 5 Gbit/s | 10 Gbit/s | 20 Gbit/s | 40 Gbit/s | 80 Gbit/s | |||
| Connector | Standard-A | — | ||||||||
| Standard-B | ||||||||||
| Mini-A | [rem 2] | — | ||||||||
| Mini-AB[rem 3][rem 4] | ||||||||||
| Mini-B | ||||||||||
| Micro-A[rem 5] | [rem 2][rem 6] | — | ||||||||
| Micro-AB[rem 3][rem 7] | ||||||||||
| Micro-B | ||||||||||
| Type-C (USB-C) | [rem 6] | (Enlarged to show detail) | ||||||||
| Remarks: |
| |||||||||
Objectives
[edit]The Universal Serial Bus was developed to simplify and improve the interface between personal computers and peripheral devices, such as cell phones, computer accessories, and monitors, when compared with previously existing standard or ad hoc proprietary interfaces.[17]
From the computer user's perspective, the USB interface improves ease of use in several ways:
- The USB interface is self-configuring, eliminating the need for the user to adjust the device's settings for speed or data format, or configure interrupts, input/output addresses, or direct memory access channels.[18]
- USB connectors are standardized at the host, so any peripheral can use most available receptacles.
- USB takes full advantage of the additional processing power that can be economically put into peripheral devices so that they can manage themselves. As such, USB devices often do not have user-adjustable interface settings.
- The USB interface is hot-swappable (devices can be exchanged without shutting the host computer down).
- Small devices can be powered directly from the USB interface, eliminating the need for additional power supply cables.
- Because the use of the USB logo is only permitted after compliance testing, the user can have confidence that a USB device will work as expected without extensive interaction with settings and configuration.
- The USB interface defines protocols for recovery from common errors, improving reliability over previous interfaces.[17]
- Installing a device that relies on the USB standard requires minimal operator action. When a user plugs a device into a port on a running computer, it either entirely automatically configures using existing device drivers, or the system prompts the user to locate a driver, which it then installs and configures automatically.
The USB standard also provides multiple benefits for hardware manufacturers and software developers, specifically in the relative ease of implementation:
- The USB standard eliminates the requirement to develop proprietary interfaces to new peripherals.
- The wide range of transfer speeds available from a USB interface suits devices ranging from keyboards and mice up to streaming video interfaces.
- A USB interface can be designed to provide the best available latency for time-critical functions or can be set up to do background transfers of bulk data with little impact on system resources.
- The USB interface is generalized with no signal lines dedicated to only one function of one device.[17]
Limitations
[edit]As with all standards, USB possesses multiple limitations to its design:
- USB cables are limited in length, as the standard was intended for peripherals on the same tabletop, not between rooms or buildings. However, a USB port can be connected to a gateway that accesses distant devices.
- USB data transfer rates are slower than those of other interconnects such as 100 Gigabit Ethernet.
- USB has a strict tree network topology and master/slave protocol for addressing peripheral devices; slave devices cannot interact with one another except via the host, and two hosts cannot communicate over their USB ports directly. Some extension to this limitation is possible through USB On-The-Go, Dual-Role-Devices[19] and protocol bridge.
- A host cannot broadcast signals to all peripherals at once; each must be addressed individually.
- While converters exist between certain legacy interfaces and USB, they might not provide a full implementation of the legacy hardware. For example, a USB-to-parallel-port converter might work well with a printer, but not with a scanner that requires bidirectional use of the data pins.
For a product developer, using USB requires the implementation of a complex protocol and implies an "intelligent" controller in the peripheral device. Developers of USB devices intended for public sale generally must obtain a USB ID, which requires that they pay a fee to the USB Implementers Forum (USB-IF). Developers of products that use the USB specification must sign an agreement with the USB-IF. Use of the USB logos on the product requires annual fees and membership in the organization.[17]
History
[edit]
A group of seven companies began the development of USB in 1995:[21] Compaq, DEC, IBM, Intel, Microsoft, NEC, and Nortel. The goal was to make it fundamentally easier to connect external devices to PCs by replacing the multitude of connectors at the back of PCs, addressing the usability issues of existing interfaces, and simplifying software configuration of all devices connected to USB, as well as permitting greater data transfer rates for external devices and plug and play features.[22] Concepts of the 1979 Atari SIO serial bus, of the 8-bit Atari computers, and the 1980 IEEE-488 derived Commodore bus, and Hewlett Packard's HP-IL bus pioneered this approach.[23][24] A consortium led by Apple, and containing Sony, Panasonic (Matsushita), LG, Toshiba, Hitachi, Cannon, Philips Electronics, Compaq, Thomson and Texas Instruments, would develop the concept further, from 1986, as the IEEE 1394 firewire standard and patent pool.[25] Joseph C. Decuir, originally of Atari, then Commodore, and a designer of the Atari SIO common bus, would work on the USB project, for Microsoft, obtaining one of the related US patents.[26] Ajay Bhatt and his team[note 1] worked on the standard at Intel;[27][28] the first integrated circuits supporting USB were produced by Intel in 1995.[29]
USB 1.x
[edit]
Released in January 1996, USB 1.0 specified signaling rates of 1.5 Mbit/s (Low Bandwidth or Low Speed) and 12 Mbit/s (Full Speed).[30] It did not allow for extension cables, due to timing and power limitations. Few USB devices made it to the market until USB 1.1 was released in August 1998. USB 1.1 was the earliest revision that was widely adopted and led to what Microsoft designated the "Legacy-free PC".[31][32][33]
Neither USB 1.0 nor 1.1 specified a design for any connector smaller than the standard type A or type B. Though many designs for a miniaturized type B connector appeared on many peripherals, conformity to the USB 1.x standard was hampered by treating peripherals that had miniature connectors as though they had a tethered connection (that is: no plug or receptacle at the peripheral end). There was no known miniature type A connector until USB 2.0 (revision 1.01) introduced one.
USB 2.0
[edit]
USB 2.0 was released in April 2000, adding a higher maximum signaling rate of 480 Mbit/s (maximum theoretical data throughput 53 MByte/s[34]) named High Speed or High Bandwidth, in addition to the USB 1.x Full Speed signaling rate of 12 Mbit/s (maximum theoretical data throughput 1.2 MByte/s).[35]
Modifications to the USB specification have been made via engineering change notices (ECNs). The most important of these ECNs are included into the USB 2.0 specification package available from USB.org:[36]
- Mini-A and Mini-B Connector
- Micro-USB Cables and Connectors Specification 1.01
- InterChip USB Supplement
- On-The-Go Supplement 1.3 USB On-The-Go makes it possible for two USB devices to communicate with each other without requiring a separate USB host
- Battery Charging Specification 1.1 Added support for dedicated chargers, host chargers behavior for devices with dead batteries
- Battery Charging Specification 1.2:[37] with increased current of 1.5 A on charging ports for unconfigured devices, allowing high-speed communication while having a current up to 1.5 A
- Link Power Management Addendum ECN, which adds a sleep power state
USB 3.x
[edit]
The USB 3.0 specification was released on 12 November 2008, with its management transferring from USB 3.0 Promoter Group to the USB Implementers Forum (USB-IF) and announced on 17 November 2008 at the SuperSpeed USB Developers Conference.[38]
USB 3.0 adds a new architecture and protocol named SuperSpeed, with associated backward-compatible plugs, receptacles, and cables. SuperSpeed plugs and receptacles are identified with a distinct logo and blue inserts in standard format receptacles.
The SuperSpeed architecture provides for an operation mode at a rate of 5.0 Gbit/s, in addition to the three existing operation modes. Its efficiency is dependent on a number of factors including physical symbol encoding and link-level overhead. At a 5 Gbit/s signaling rate with 8b/10b encoding, each byte needs 10 bits to transmit, so the raw throughput is 500 MB/s. When flow control, packet framing and protocol overhead are considered, it is realistic for about two-thirds of the raw throughput, or 330 MB/s to transmit to an application.[39]: 4–19 SuperSpeed's architecture is full-duplex; all earlier implementations, USB 1.0-2.0, are half-duplex, arbitrated by the host.[40]
Low-power and high-power devices remain operational with this standard, but devices implementing SuperSpeed can provide an increased current of between 150 mA and 900 mA, by discrete steps of 150 mA.[39]: 9–9
USB 3.0 also introduced the USB Attached SCSI Protocol (UASP), which provides generally faster transfer speeds than the BOT (Bulk-Only-Transfer) protocol.
USB 3.1,[5] released in July 2013. Firstly, it preserves USB 3.0's SuperSpeed architecture and protocol and its operation mode is newly named USB 3.1 Gen 1 (the previously called USB 3.0)[41] [42][43] Secondly, it introduces a distinctively new SuperSpeedPlus architecture and protocol with a second operation mode named as USB 3.1 Gen 2 (sometimes marketed as SuperSpeed+ USB, contrary to USB-IF recommendation). This doubles the maximum signaling rate to 10 Gbit/s (later marketed as SuperSpeed USB 10Gbps, then simply USB 10Gbps), while reducing line encoding overhead to just 3% by changing the encoding scheme to 128b/132b.[41][44]
USB 3.2, released in September 2017,[15] preserves existing USB 3.1 SuperSpeed and SuperSpeedPlus architectures and protocols and their respective operation modes, but introduces two additional SuperSpeedPlus operation modes (USB 3.2 Gen 1×2 and USB 3.2 Gen 2×2) with signaling rates of 10 and 20 Gbit/s (raw data rates of 1212 and 2424 MB/s), respectively. The increased bandwidth is a result of two-lane operation over the additional wires included in all Full-Featured USB‑C Fabrics (all involved devices, hubs, cables and host).[45]
Naming scheme
[edit]Starting with the USB 3.2 specification, USB-IF introduced a new naming scheme.[46] To help companies with the branding of the different operation modes, USB-IF recommended branding the 5, 10, and 20 Gbit/s capabilities as SuperSpeed USB 5Gbps, SuperSpeed USB 10Gbps, and SuperSpeed USB 20Gbps, respectively.[47]
In 2023, they were replaced again,[48] removing "SuperSpeed", with USB 5Gbps, USB 10Gbps, and USB 20Gbps. With new Packaging and Port logos.[49]
USB4
[edit]This section needs to be updated. The reason given is: Incomplete, erroneous and not up-to-date; e.g. lacks differences between USB4 first version and 2.0. Applies also to main article.. (August 2024) |
The USB4 specification (Version 1.0) was released on 29 August 2019. It is based on the Thunderbolt 3 protocol, defines 20 and 40 Gbit/s modes over USB-C, and allows tunneling of USB 3.2, USB 2.0, PCIe and DisplayPort protocols; Thunderbolt 3 compatibility is optional for USB4 hosts/devices.[50]

USB4 Version 2.0 (announced 1 September 2022) adds a new physical layer and higher data rates: up to 80 Gbit/s bidirectional, and an asymmetric mode supporting 120/40 Gbit/s (host→device / device→host) for video-heavy use cases. It achieves this using PAM3 signaling and, in many cases, existing passive “40 Gbit/s” USB-C cables; a new 80 Gbit/s active cable category is also defined. Version 2.0 updates tunneling to align with DisplayPort 2.1 and PCIe 4.0, and maintains backward compatibility with USB4 1.0, USB 3.2/2.0, and Thunderbolt 3.[51][52] Since 2023, the USB-IF recommends consumer-facing product names that reflect link speed (e.g., USB 40Gbps, USB 80Gbps), replacing “USB4 v1/v2” in marketing and certification listings.[53]
| Connection | Mandatory for | Remarks | ||
|---|---|---|---|---|
| host | hub | device | ||
| USB 2.0 (480 Mbit/s) | Yes | Yes | Yes | Contrary to other functions – which use the multiplexing of high-speed links – USB 2.0 over USB-C utilizes its own differential pair of wires. |
| Tunneled USB 3.2 Gen 2×1 (10 Gbit/s) | Yes | Yes | No | |
| Tunneled USB 3.2 Gen 2×2 (20 Gbit/s) | No | No | No | |
| Tunneled USB 3 Gen T (5–80 Gbit/s) | No | No | No | A type of USB 3 Tunneling architecture where the Enhanced SuperSpeed System is extended to allow operation at the maximum bandwidth available on the USB4 Link. |
| USB4 Gen 2 (10 or 20 Gbit/s) | Yes | Yes | Yes | Either one or two lanes |
| USB4 Gen 3 (20 or 40 Gbit/s) | No | Yes | No | |
| Tunneled DisplayPort 1.4a | Yes | Yes | No | The specification requires that hosts and hubs support the DisplayPort Alternate Mode. |
| Tunneled PCI Express 3.0 | No | Yes | No | The PCI Express function of USB4 replicates the functionality of previous versions of the Thunderbolt specification. |
| Host-to-Host communications | Yes | Yes | — | A LAN-like connection between two peers |
| Thunderbolt 3 Alternate Mode | No | Yes | No | Thunderbolt 3 uses cables with USB‑C plugs; the USB4 specification allows hosts and devices, and requires hubs, to support interoperability with the standard using the Thunderbolt 3 Alternate Mode (namely DisplayPort and PCIe). |
| Other Alternate Modes | No | No | No | USB4 products may optionally offer interoperability with the HDMI, MHL, and VirtualLink Alternate Modes. |
September 2022 naming scheme
[edit]
(A mix of USB specifications and their marketing names are being displayed
because specifications are sometimes wrongly used as marketing names.)[disputed (for: USB4 20 Gbit/s does not exist; USB4 2×2 is not interchangeable with USB 3.2 2×2 as
indicated by the logo; logos for USB 3.x and USB4 are different.) – discuss]
Because of the previous confusing naming schemes, USB-IF decided to change it once again. As of 2 September 2022, marketing names follow the syntax "USB xGbps", where x is the speed of transfer in Gbit/s.[54] Overview of the updated names and logos can be seen in the adjacent table.
The operation modes USB 3.2 Gen 2×2 and USB4 Gen 2×2 – or: USB 3.2 Gen 2×1 and USB4 Gen 2×1 – are not interchangeable or compatible; all participating controllers must operate with the same mode.
Version history
[edit]Release versions
[edit]| Name | Release date | Maximum signaling rate | Note |
|---|---|---|---|
| USB 0.7 | November 1994 | ? | Pre-release |
| USB 0.8 | December 1994 | ? | |
| USB 0.9 | April 1995 | 12 Mbit/s: Full Speed (FS) | |
| USB 0.99 | August 1995 | ? | |
| USB 1.0-RC | November 1995 | ? | Release Candidate |
| USB 1.0 | January 1996 | 1.5 Mbit/s: Low Speed (LS) 12 Mbit/s: Full Speed (FS) |
Renamed to Basic-Speed |
| USB 1.1 | September 1998 | ||
| USB 2.0 | April 2000 | 480 Mbit/s: High Speed (HS) | |
| USB 3.0 | November 2008 | 5 Gbit/s: SuperSpeed (SS) | Renamed to USB 3.1 Gen 1,[41] and later to USB 3.2 Gen 1×1 |
| USB 3.1 | July 2013 | 10 Gbit/s: SuperSpeed+ (SS+) | Renamed to USB 3.1 Gen 2,[41] and later to USB 3.2 Gen 2×1 |
| USB 3.2 | August 2017 | 20 Gbit/s: SuperSpeed+ two-lane | Adds, besides others, a second full-duplex lane for data exchange, noted as ×2: USB 3.2 Gen 1×2 and Gen 2×2. This requires Full-Featured USB-C Fabrics (all involved devices, hubs, cables, and host). |
| USB4 | August 2019 | 40 Gbit/s: two-lane | Includes new USB4 Gen 2×2 (64b/66b encoding) and Gen 3×2 (128b/132b encoding) modes and introduces USB4 routing for tunneling of USB 3.2, DisplayPort 1.4a and PCI Express traffic and host-to-host transfers, based on the Thunderbolt 3 protocol. Requires USB4 Fabric. |
| USB4 2.0 | September 2022 | 120 ⇄ 40 Gbit/s: asymmetric | Includes new USB4 Gen 4×2 (PAM-3 encoding) mode to get 80 and 120 Gbit/s over Type-C connector.[55] Requires USB4 Fabric. |
Power-related standards
[edit]| Release name | Release date | Max. power | Note |
|---|---|---|---|
| USB Battery Charging Rev. 1.0 | 2007-03-08 | 7.5 W (5 V, 1.5 A) | |
| USB Battery Charging Rev. 1.1 | 2009-04-15 | 7.5 W (5 V, 1.5 A) | Page 28, Table 5–2, but with limitation on paragraph 3.5. In ordinary USB 2.0's Standard-A port, 1.5 A only.[56] |
| USB Battery Charging Rev. 1.2 | 2010-12-07 | 7.5 W (5 V, 1.5 A) | [57] |
| USB Power Delivery Rev. 1.0 (V. 1.0) | 2012-07-05 | 100 W (20 V, 5 A) | Using FSK protocol over bus power (VBUS) |
| USB Power Delivery Rev. 1.0 (V. 1.3) | 2014-03-11 | 100 W (20 V, 5 A) | |
| USB Type-C Rev. 1.0 | 2014-08-11 | 15 W (5 V, 3 A) | New connector and cable specification |
| USB Power Delivery Rev. 2.0 (V. 1.0) | 2014-08-11 | 100 W (20 V, 5 A) | Using BMC protocol over communication channel (CC) on USB-C cables |
| USB Type-C Rev. 1.1 | 2015-04-03 | 15 W (5 V, 3 A) | |
| USB Power Delivery Rev. 2.0 (V. 1.1) | 2015-05-07 | 100 W (20 V, 5 A) | |
| USB Type-C Rev. 1.2 | 2016-03-25 | 15 W (5 V, 3 A) | |
| USB Power Delivery Rev. 2.0 (V. 1.2) | 2016-03-25 | 100 W (20 V, 5 A) | |
| USB Power Delivery Rev. 2.0 (V. 1.3) | 2017-01-12 | 100 W (20 V, 5 A) | |
| USB Power Delivery Rev. 3.0 (V. 1.1) | 2017-01-12 | 100 W (20 V, 5 A) | |
| USB Type-C Rev. 1.3 | 2017-07-14 | 15 W (5 V, 3 A) | |
| USB Power Delivery Rev. 3.0 (V. 1.2) | 2018-06-21 | 100 W (20 V, 5 A) | |
| USB Type-C Rev. 1.4 | 2019-03-29 | 15 W (5 V, 3 A) | |
| USB Type-C Rev. 2.0 | 2019-08-29 | 15 W (5 V, 3 A) | Enabling USB4 over USB Type-C connectors and cables. |
| USB Power Delivery Rev. 3.0 (V. 2.0) | 2019-08-29 | 100 W (20 V, 5 A) | [58] |
| USB Power Delivery Rev. 3.1 (V. 1.0) | 2021-05-24 | 240 W (48 V, 5 A) | |
| USB Type-C Rev. 2.1 | 2021-05-25 | 15 W (5 V, 3 A) | [59] |
| USB Power Delivery Rev. 3.1 (V. 1.1) | 2021-07-06 | 240 W (48 V, 5 A) | [60] |
| USB Power Delivery Rev. 3.1 (V. 1.2) | 2021-10-26 | 240 W (48 V, 5 A) | Including errata through October 2021[60]
This version incorporates the following ECNs:
|
| USB Type-C Rev 2.4 | 2024-10-28 | [61] | |
| USB Power Delivery Rev. 3.2 (V. 1.1) | 2025-05-06 | [62] |
System design
[edit]A USB system consists of a host with one or more downstream facing ports (DFP),[63] and multiple peripherals, forming a tiered-star topology. Additional USB hubs may be included, allowing up to five tiers. A USB host may have multiple controllers, each with one or more ports. Up to 127 devices may be connected to a single host controller.[64][39]: 8–29 USB devices are linked in series through hubs. The hub built into the host controller is called the root hub.
A USB device may consist of several logical sub-devices that are referred to as device functions. A composite device may provide several functions, for example, a webcam (video device function) with a built-in microphone (audio device function). An alternative to this is a compound device, in which the host assigns each logical device a distinct address and all logical devices connect to a built-in hub that connects to the physical USB cable.

USB device communication is based on pipes (logical channels). A pipe connects the host controller to a logical entity within a device, called an endpoint. Because pipes correspond to endpoints, the terms are sometimes used interchangeably. Each USB device can have up to 32 endpoints (16 in and 16 out), though it is rare to have so many. Endpoints are defined and numbered by the device during initialization (the period after physical connection called enumeration) and so are relatively permanent, whereas pipes may be opened and closed.
There are two types of pipe: stream and message.
- A message pipe is bi-directional and is used for control transfers. Message pipes are typically used for short, simple commands to the device, and for status responses from the device, used, for example, by the bus control pipe number 0.
- A stream pipe is a uni-directional pipe connected to a uni-directional endpoint that transfers data using an isochronous,[65] interrupt, or bulk transfer:
- Isochronous transfers
- At some guaranteed data rate (for fixed-bandwidth streaming data) but with possible data loss (e.g., realtime audio or video)
- Interrupt transfers
- Devices that need guaranteed quick responses (bounded latency) such as pointing devices, mice, and keyboards
- Bulk transfers
- Large sporadic transfers using all remaining available bandwidth, but with no guarantees on bandwidth or latency (e.g., file transfers)
When a host starts a data transfer, it sends a TOKEN packet containing an endpoint specified with a tuple of (device_address, endpoint_number). If the transfer is from the host to the endpoint, the host sends an OUT packet (a specialization of a TOKEN packet) with the desired device address and endpoint number. If the data transfer is from the device to the host, the host sends an IN packet instead. If the destination endpoint is a uni-directional endpoint whose manufacturer's designated direction does not match the TOKEN packet (e.g. the manufacturer's designated direction is IN while the TOKEN packet is an OUT packet), the TOKEN packet is ignored. Otherwise, it is accepted and the data transaction can start. A bi-directional endpoint, on the other hand, accepts both IN and OUT packets.

Endpoints are grouped into interfaces and each interface is associated with a single device function. An exception to this is endpoint zero, which is used for device configuration and is not associated with any interface. A single device function composed of independently controlled interfaces is called a composite device. A composite device only has a single device address because the host only assigns a device address to a function.
When a USB device is first connected to a USB host, the USB device enumeration process is started. The enumeration starts by sending a reset signal to the USB device. The signaling rate of the USB device is determined during the reset signaling. After reset, the USB device's information is read by the host and the device is assigned a unique 7-bit address. If the device is supported by the host, the device drivers needed for communicating with the device are loaded and the device is set to a configured state. If the USB host is restarted, the enumeration process is repeated for all connected devices.
The host controller directs traffic flow to devices, so no USB device can transfer any data on the bus without an explicit request from the host controller. In USB 2.0, the host controller polls the bus for traffic, usually in a round-robin fashion. The throughput of each USB port is determined by the slower speed of either the USB port or the USB device connected to the port.
High-speed USB 2.0 hubs contain devices called transaction translators that convert between high-speed USB 2.0 buses and full and low speed buses. There may be one translator per hub or per port.
Because there are two separate controllers in each USB 3.0 host, USB 3.0 devices transmit and receive at USB 3.0 signaling rates regardless of USB 2.0 or earlier devices connected to that host. Operating signaling rates for earlier devices are set in the legacy manner.
Device classes
[edit]The functionality of a USB device is defined by a class code sent to a USB host. This allows the host to load software modules for the device and to support new devices from different manufacturers.
Device classes include:[66]
| Class (hexadecimal) |
Usage | Description | Examples, or exception |
|---|---|---|---|
| 00 | Device | Unspecified[67] | Device class is unspecified, interface descriptors are used to determine needed drivers |
| 01 | Interface | Audio | Speaker, microphone, sound card, MIDI |
| 02 | Both | Communications and CDC control | UART and RS-232 serial adapter, modem, Wi-Fi adapter, Ethernet adapter. Used together with class 0Ah (CDC-Data) below |
| 03 | Interface | Human interface device (HID) | Keyboard, mouse, joystick |
| 05 | Interface | Physical interface device (PID) | Force feedback joystick |
| 06 | Interface | Media (PTP/MTP) | Scanner, Camera |
| 07 | Interface | Printer | Laser printer, inkjet printer, CNC machine |
| 08 | Interface | USB mass storage, USB Attached SCSI | USB flash drive, memory card reader, digital audio player, digital camera, external drive |
| 09 | Device | USB hub | High speed USB hub |
| 0A | Interface | CDC-Data | Used together with class 02h (Communications and CDC Control) above |
| 0B | Interface | Smart card | USB smart card reader |
| 0D | Interface | Content security | Fingerprint reader |
| 0E | Interface | Video | Webcam |
| 0F | Interface | Personal healthcare device class (PHDC) | Pulse monitor (watch) |
| 10 | Interface | Audio/video (AV) | Webcam, TV |
| 11 | Device | Billboard | Describes USB-C alternate modes supported by device |
| DC | Both | Diagnostic device | USB compliance testing device |
| E0 | Interface | Wireless controller | Bluetooth adapter |
| EF | Both | Miscellaneous | ActiveSync device |
| FE | Interface | Application-specific | IrDA Bridge, RNDIS, Test & Measurement Class (USBTMC),[68] USB DFU (Device Firmware Upgrade)[69] |
| FFh | Both | Vendor-specific | Indicates that a device needs vendor-specific drivers |
USB mass storage / USB drive
[edit]

The USB mass storage device class (MSC or UMS) standardizes connections to storage devices. At first intended for magnetic and optical drives, it has been extended to support flash drives and SD card readers. The ability to boot a write-locked SD card with a USB adapter is particularly advantageous for maintaining the integrity and non-corruptible, pristine state of the booting medium.
Though most personal computers since early 2005 can boot from USB mass storage devices, USB is not intended as a primary bus for a computer's internal storage. However, USB has the advantage of allowing hot-swapping, making it useful for mobile peripherals, including drives of various kinds.
Several manufacturers offer external portable USB hard disk drives, or empty enclosures for disk drives. These offer performance comparable to internal drives, limited by the number and types of attached USB devices, and by the upper limit of the USB interface. Other competing standards for external drive connectivity include eSATA, ExpressCard, FireWire (IEEE 1394), and most recently Thunderbolt.
Another use for USB mass storage devices is the portable execution of software applications (such as web browsers and VoIP clients) with no need to install them on the host computer.[70][71]
Media Transfer Protocol
[edit]Media Transfer Protocol (MTP) was designed by Microsoft to give higher-level access to a device's filesystem than USB mass storage, at the level of files rather than disk blocks. It also has optional DRM features. MTP was designed for use with portable media players, but it has since been adopted as the primary storage access protocol of the Android operating system from the version 4.1 Jelly Bean as well as Windows Phone 8 (Windows Phone 7 devices had used the Zune protocol—an evolution of MTP). The primary reason for this is that MTP does not require exclusive access to the storage device the way UMS does, alleviating potential problems should an Android program request the storage while it is attached to a computer. The main drawback is that MTP is not as well supported outside of Windows operating systems.
Human interface devices
[edit]A USB mouse or keyboard can usually be used with older computers that have PS/2 ports with the aid of a small USB-to-PS/2 adapter. For mice and keyboards with dual-protocol support, a passive adapter that contains no logic circuitry may be used: the USB hardware in the keyboard or mouse is designed to detect whether it is connected to a USB or PS/2 port, and communicate using the appropriate protocol.[citation needed] Active converters that connect USB keyboards and mice (usually one of each) to PS/2 ports also exist.[72]
Device Firmware Upgrade mechanism
[edit]Device Firmware Upgrade (DFU) is a generic mechanism for upgrading the firmware of USB devices with improved versions provided by their manufacturers, offering (for example) a way to deploy firmware bug fixes. During the firmware upgrade operation, USB devices change their operating mode effectively becoming a PROM programmer. Any class of USB device can implement this capability by following the official DFU specifications. Doing so allows use of DFU-compatible host tools to update the device.[69][73][74]
DFU is sometimes used as a flash memory programming protocol in microcontrollers with built-in USB bootloader functionality. [75]
Audio streaming
[edit]The USB Device Working Group has laid out specifications for audio streaming, and specific standards have been developed and implemented for audio class uses, such as microphones, speakers, headsets, telephones, musical instruments, etc. The working group has published four versions of audio device specifications:[76][77][78] USB Audio 1.0, 2.0, 3.0 and 4.0, referred to as "UAC"[79] or "ADC".[80]
UAC 3.0 primarily introduces improvements for portable devices, such as reduced power usage by bursting the data and staying in low power mode more often, and power domains for different components of the device, allowing them to be shut down when not in use.[81]
UAC 2.0 introduced support for High Speed USB (in addition to Full Speed), allowing greater bandwidth for multi-channel interfaces, higher sample rates,[82] lower inherent latency,[83][79] and 8× improvement in timing resolution in synchronous and adaptive modes.[79] UAC2 also introduced the concept of clock domains, which provides information to the host about which input and output terminals derive their clocks from the same source, as well as improved support for audio encodings like DSD, audio effects, channel clustering, user controls, and device descriptions.[79][84]
UAC 1.0 devices are still common, however, due to their cross-platform driverless compatibility,[82] and also partly due to Microsoft's failure to implement UAC 2.0 for over a decade after its publication, having finally added support to Windows 10 through the Creators Update on 20 March 2017.[85][86][84] UAC 2.0 is also supported by macOS, iOS, and Linux,[79] however Android only implements a subset of the UAC 1.0 specification.[87]
USB provides three isochronous (fixed-bandwidth) synchronization types,[88] all of which are used by audio devices:[89]
- Asynchronous — The ADC or DAC are not synced to the host computer's clock at all, operating off a free-running clock local to the device.
- Synchronous — The device's clock is synced to the USB start-of-frame (SOF) or Bus Interval signals. For instance, this can require syncing an 11.2896 MHz clock to a 1 kHz SOF signal, a large frequency multiplication.[90][91]
- Adaptive — The device's clock is synced to the amount of data sent per frame by the host[92]
While the USB spec originally described asynchronous mode being used in "low cost speakers" and adaptive mode in "high-end digital speakers",[93] the opposite perception exists in the hi-fi world, where asynchronous mode is advertised as a feature, and adaptive/synchronous modes have a bad reputation.[94][95][87] In reality, all types can be high-quality or low-quality, depending on the quality of their engineering and the application.[91][79][96] Asynchronous has the benefit of being untied from the computer's clock, but the disadvantage of requiring sample rate conversion when combining multiple sources.
Connectors
[edit]The connectors the USB committee specifies support a number of USB's underlying goals, and reflect lessons learned from the many connectors the computer industry has used. The female connector mounted on the host or device is called the receptacle, and the male connector attached to the cable is called the plug.[39]: 2-5–2-6 The official USB specification documents also periodically define the term male to represent the plug, and female to represent the receptacle.[97]

The design is intended to make it difficult to insert a USB plug into its receptacle incorrectly. The USB specification requires that the cable plug and receptacle be marked so the user can recognize the proper orientation.[39] The USB-C plug however is reversible. USB cables and small USB devices are held in place by the gripping force from the receptacle, with no screws, clips, or thumb-turns as some connectors use.

The distinction of A and B connectors was to enforce the directionality inherent in USB: The single host has Type‑A receptacles and each peripheral device has a single Type‑B receptacle. A hub provides multiple downstream-facing Type‑A receptacles and connects to the host through its single Type‑B receptacle (or a captive cable with a Type‑A plug). A hub may connect to the host either directly or through one or more additional hubs. Prior to Type‑C, USB On-The-Go allowed a device such as a smartphone to take either the host or the peripheral device role, with a single Type‑AB receptacle (Micro‑AB, superseded in 2014, or Mini-AB, deprecated 2007) that accepted both Type‑A and Type‑B plugs.
USB connector types multiplied as the specification progressed. The original USB specification detailed Standard‑A and Standard‑B plugs and receptacles. These were originally referred to as simply Type‑A and Type‑B; they were renamed Standard out of necessity to distinguish from Mini and later Micro connectors. The data contacts in the Standard plugs are recessed compared to the power and ground contacts so that devices are safely electrically connected before the more delicate data communications circuitry is connected, preventing damage. Some devices operate in different modes depending on whether the data connection is made. Simple power sources do not include data connections, instead shorting the data contacts together, but allow any capable USB device to charge or operate through a standard USB cable. Charging cables provide power connections but not data, though the standard requires at least a USB 2.0 data connection capability. In a non-standard charge-only cable, the data wires are shorted at the device end; otherwise, the device may reject the charger as unsuitable.
Cabling
[edit]The USB 1.1 standard specifies that a standard cable can have a maximum length of 5 meters (16 ft 5 in) with devices operating at full speed (12 Mbit/s), and a maximum length of 3 meters (9 ft 10 in) with devices operating at low speed (1.5 Mbit/s).[98][99][100]
USB 2.0 provides for a maximum cable length of 5 meters (16 ft 5 in) for devices running at high speed (480 Mbit/s).[100]
The USB 3.0 standard does not directly specify a maximum cable length, requiring only that all cables meet an electrical specification: for copper cabling with AWG 26 wires the maximum practical length is 3 meters (9 ft 10 in).[101]
USB bridge "cables"
[edit]Two computers (hosts) can easily be connected through a USB‑C cable, but before Type‑C hosts could not be connected to each other with common USB cables. USB bridge "cables", or data transfer cables, can be found within the market, offering direct PC to PC connections. A bridge "cable" is actually an electronic device that appears as a USB peripheral device to each of the connected hosts, allowing peer-to-peer communication between the computers. Such USB bridge cables are used to transfer files between two computers via their USB ports.
Popularized by Microsoft as Windows Easy Transfer, the Microsoft utility used a special USB bridge cable to transfer personal files and settings from a computer running an earlier version of Windows to a computer running a newer version. In the context of the use of Windows Easy Transfer software, the bridge cable can sometimes be referenced as Easy Transfer cable.
Many USB bridge / data transfer cables are still USB 2.0, but there are also a number of USB 3.0 transfer cables. Despite USB 3.0 being ten times as fast as USB 2.0, USB 3.0 transfer cables are only two to three times as fast given their design.[clarification needed]
The USB 3.0 specification introduced an A-to-A cross-over cable without power for connecting two PCs. These are not meant for data transfer but are aimed at diagnostic uses.
Dual-role USB connections
[edit]USB bridge cables have become less important with USB dual-role-device capabilities introduced with the USB 3.1 specification. Under the most recent specifications, USB supports most scenarios connecting systems directly with a Type-C cable. For the capability to work, however, connected systems must support role-switching. Dual-role capability requires there be two controllers within the system, as well as a role controller. While this can be expected in a mobile platform such as a tablet or a phone, desktop PCs and laptops often do not support dual roles.[102]
Power
[edit]Upstream USB connectors supply power at a nominal 5 V DC via the V_BUS pin to downstream USB devices.
Low-power and high-power devices
[edit]This section describes the power distribution model of USB that existed before Power-Delivery (USB-PD). On devices that do not use PD, USB provides up to 4.5 W through Type-A and Type-B connectors, and up to 15 W through USB-C. All pre-PD USB power is provided at 5 V.
For a host providing power to devices, USB has a concept of the unit load. Any device may draw power of one unit, and devices may request more power in these discrete steps. It is not required that the host provide requested power, and a device may not draw more power than negotiated.
Low-power devices can draw no more than one unit. All devices must act as low-power devices when starting out as unconfigured. For USB devices up to USB 2.0 a unit load is 100 mA (or 500 mW), while USB 3.0 defines a unit load as 150 mA (750 mW). Full-featured USB-C can support low-power devices with a unit load of 250 mA (or 1250 mW).
High-power devices, e.g. typical 2.5-inch hard disk drives, can draw more than one unit. USB up to 2.0 allows a host or hub to provide up to 2.5 W to each device, in five discrete steps of 100 mA, and SuperSpeed devices (USB 3.x) allows a host or a hub to provide up to 4.5 W in six steps of 150 mA. USB-C allows for dual-lane operation of USB 3.x with larger unit load (250 mA; up to 7.5 W).[103] USB-C also allows for Type-C Current as a replacement for USB BC, signaling power availability in a simple way, without needing any data connection.[104]
| Specification | max current | Voltage | max power |
|---|---|---|---|
| Low-power device | 100 mA |
5 V [a] |
0.50 W
|
| Low-power SuperSpeed / USB 3.x device | 150 mA |
5 V [a] |
0.75 W
|
| High-power device | 500 mA [b] |
5 V |
2.5 W
|
| High-power SuperSpeed / USB 3.x single-lane device | 900 mA [c] |
5 V |
4.5 W
|
| High-power SuperSpeed / USB 3.x dual-lane device[d] | 1.5 A [e] |
5 V |
7.5 W
|
| Battery Charging (BC) | 1.5 A |
5 V |
7.5 W
|
| Type-C | 3 A |
5 V |
15 W
|
| Power Delivery SPR[d] | 5 A [f] |
up to 20 V |
100 W
|
| Power Delivery EPR[d] | 5 A [f] |
up to 48 V [g] |
240 W
|
| |||
To recognize Battery Charging mode, a dedicated charging port places a resistance not exceeding 200 Ω across the D+ and D− terminals. Shorted or near-shorted data lanes with less than 200 Ω of resistance across the D+ and D− terminals signify a dedicated charging port (DCP) with indefinite charging rates.[105][106]
In addition to standard USB, there is a proprietary high-powered system known as PoweredUSB, developed in the 1990s, and mainly used in point-of-sale terminals such as cash registers.
Signaling
[edit]USB signals are transmitted using differential signaling on twisted-pair data wires with 90 Ω ± 15% characteristic impedance.[107] USB 2.0 and earlier specifications define a single pair in half-duplex (HDx). USB 3.0 and later specifications define one dedicated pair for USB 2.0 compatibility and two or four pairs for data transfer: two data wire pairs realising full-duplex (FDx) for single lane (×1) variants require at least SuperSpeed (SS) connectors; four pairs realising full-duplex for two lane (×2) variants require USB-C connectors.
USB4 Gen 4 requires the use of all four pairs but allow for asymmetrical pairs configuration.[108] In this case one data wire pair is used for the upstream data and the other three for the downstream data or vice-versa. USB4 Gen 4 use pulse amplitude modulation on 3 levels, providing a trit of information every baud transmitted, the transmission frequency of 12.8 GHz translate to a transmission rate of 25.6 GBd[109] and the 11-bit–to–7-trit translation provides a theoretical maximum transmission speed just over 40.2 Gbit/s.[110]
| Operation mode name | Introduced in | Lanes | Encoding | # data wires | Nominal signaling rate | Original label | USB-IF current[48] | ||
|---|---|---|---|---|---|---|---|---|---|
| current | old | marketing name | logo | ||||||
| Low-Speed | USB 1.0 | 1 HDx | NRZI | 2 | 1.5 Mbit/s half-duplex |
Low-Speed USB (LS) | Basic-Speed USB | ||
| Full-Speed | 12 Mbit/s half-duplex |
Full-Speed USB (FS) | |||||||
| High-Speed | USB 2.0 | 480 Mbit/s half-duplex |
Hi-Speed USB (HS) | ||||||
| USB 3.2 Gen 1×1 | USB 3.0, USB 3.1 Gen 1 |
USB 3.0 | 1 FDx (+ 1 HDx)[a] | 8b/10b | 6 | 5 Gbit/s symmetric |
SuperSpeed USB (SS) | USB 5Gbit/s | |
| USB 3.2 Gen 2×1 | USB 3.1 Gen 2 | USB 3.1 | 128b/132b | 10 Gbit/s symmetric |
SuperSpeed+ (SS+) | USB 10Gbit/s | |||
| USB 3.2 Gen 1×2 | USB 3.2 | 2 FDx (+ 1 HDx)[a] | 8b/10b | 10 | 10 Gbit/s symmetric |
— | |||
| USB 3.2 Gen 2×2 | 128b/132b | 20 Gbit/s symmetric |
SuperSpeed USB 20Gbit/s | USB 20Gbit/s | |||||
| USB4 Gen 2×1 | USB4 | 1 FDx (+ 1 HDx)[a] | 64b/66b[b] | 6 (used of 10) | 10 Gbit/s symmetric |
USB 10Gbit/s | |||
| USB4 Gen 2×2 | 2 FDx (+ 1 HDx)[a] | 10 | 20 Gbit/s symmetric |
USB 20Gbit/s | |||||
| USB4 Gen 3×1 | 1 FDx (+ 1 HDx)[a] | 128b/132b[b] | 6 (used of 10) | 20 Gbit/s symmetric | |||||
| USB4 Gen 3×2 | 2 FDx (+ 1 HDx)[a] | 10 | 40 Gbit/s symmetric |
USB 40Gbit/s | |||||
| USB4 Gen 4×2 | USB4 2.0 | 2 FDx (+ 1 HDx)[a] | PAM-3 11b/7t | 10 | 80 Gbit/s symmetric |
USB 80Gbit/s | |||
| asymmetric (+ 1 HDx)[a] | 40 Gbit/s up 120 Gbit/s down |
— | |||||||
| 120 Gbit/s up 40 Gbit/s down | |||||||||
- ^ a b c d e f g h USB 2.0 implementation
- ^ a b USB4 can use optional Reed–Solomon forward error correction (RS FEC). In this mode, 12 × 16 B (128 bit) symbols are assembled together with 2 B (12 bit + 4 bit reserved) synchronization bits indicating the respective symbol types and 4 B of RS FEC to allow to correct up to 1 B of errors anywhere in the total 198 B block.
- Low-speed (LS) and Full-speed (FS) modes use a single data wire pair, labeled D+ and D−, in half-duplex. Transmitted signal levels are 0.0–0.3 V for logical low, and 2.8–3.6 V for logical high level. The signal lines are not terminated.
- High-speed (HS) uses the same wire pair, but with different electrical conventions. Lower signal voltages of −10 to 10 mV for low and 360 to 440 mV for logical high level, and termination of 45 Ω to ground or 90 Ω differential to match the data cable impedance.
- SuperSpeed (SS) adds two additional pairs of shielded twisted data wires (and new, mostly compatible expanded connectors) besides another grounding wire. These are dedicated to full-duplex SuperSpeed operation. The SuperSpeed link operates independently from the USB 2.0 channel and takes precedence on connection. Link configuration is performed using LFPS (Low Frequency Periodic Signaling, approximately at 20 MHz frequency), and electrical features include voltage de-emphasis at the transmitter side, and adaptive linear equalization on the receiver side to combat electrical losses in transmission lines, and thus the link introduces the concept of link training.
- SuperSpeed+ (SS+) uses a new coding scheme with an increased signaling rate (Gen 2×1 mode) and/or the additional lane of USB-C (Gen 1×2 and Gen 2×2 modes).
A USB connection is always between an A end, a downstream-facing port (DFP) of either a host or a hub, and a B end, the upstream-facing port (UFP) of either a peripheral device or a hub. Historically, this was made clear by the fact that hosts had only Type-A and peripheral devices had only Type-B ports, and every compatible cable had one Type-A plug and one Type-B plug.
USB-C (Type-C) is a single connector that replaces all legacy Type-A and Type-B connectors, so when both sides are equipment with USB Type-C ports, normally the device's type defines which is the DFP and which is the UFP. Some devices, e.g. modern smart phones, can act as both. Consequently, the connected devices negotiate which is the host and which is the peripheral device.
Protocol layer
[edit]During USB communication, data is transmitted as packets. Initially, all packets are sent from the host via the root hub, and possibly more hubs, to devices. Some of those packets direct a device to send some packets in reply.
Transactions
[edit]The basic transactions of USB are:
- OUT transaction
- IN transaction
- SETUP transaction
- Control transfer exchange
Related standards
[edit]
Media Agnostic USB
[edit]The USB Implementers Forum introduced the Media Agnostic USB (MA-USB) v.1.0 wireless communication standard based on the USB protocol on 29 July 2015. Wireless USB is a cable-replacement technology, and uses ultra-wideband wireless technology for data rates of up to 480 Mbit/s.[111]
The USB-IF used WiGig Serial Extension v1.2 specification as its initial foundation for the MA-USB specification and is compliant with SuperSpeed USB (3.0 and 3.1) and Hi-Speed USB (USB 2.0). Devices that use MA-USB will be branded as "Powered by MA-USB", provided the product qualifies its certification program.[112]
InterChip USB
[edit]InterChip USB is a chip-to-chip variant that eliminates the conventional transceivers found in normal USB. The HSIC physical layer uses about 50% less power and 75% less board area compared to USB 2.0.[113] It is an alternative standard to SPI and I2C.
USB-C
[edit]USB-C (officially USB Type-C) is a standard that defines a new connector, and several new connection features. Among them it supports Alternate Mode, which allows transporting other protocols via the USB-C connector and cable. This is commonly used to support the DisplayPort or HDMI protocols, which allows connecting a display, such as a computer monitor or television set, via USB-C.
All other connectors are not capable of two-lane operations (Gen 1×2 and Gen 2×2) in USB 3.2, but can be used for one-lane operations (Gen 1×1 and Gen 2×1).[114]
DisplayLink
[edit]DisplayLink is a technology which allows multiple displays to be connected to a computer via USB. It was introduced around 2006, and before the advent of Alternate Mode over USB-C it was the only way to connect displays via USB. It is a proprietary technology, not standardized by the USB Implementers Forum and typically requires a separate device driver on the computer.
Comparisons with other connection methods
[edit]FireWire (IEEE 1394)
[edit]At first, USB was considered a complement to FireWire (IEEE 1394) technology, which was designed as a high-bandwidth serial bus that efficiently interconnects peripherals such as disk drives, audio interfaces, and video equipment. In the initial design, USB operated at a far lower data rate and used less sophisticated hardware. It was suitable for small peripherals such as keyboards and pointing devices.
The most significant technical differences between FireWire and USB include:
- USB networks use a tiered-star topology, while IEEE 1394 networks use a tree topology.
- USB 1.0, 1.1, and 2.0 use a "speak-when-spoken-to" protocol, meaning that each peripheral communicates with the host when the host specifically requests communication. USB 3.0 allows for device-initiated communications towards the host. A FireWire device can communicate with any other node at any time, subject to network conditions.
- A USB network relies on a single host at the top of the tree to control the network. All communications are between the host and one peripheral. In a FireWire network, any capable node can control the network.
- USB runs with a 5 V power line, while FireWire supplies 12 V and theoretically can supply up to 30 V.
- Standard USB hub ports can provide from the typical 500 mA/2.5 W of current, only 100 mA from non-hub ports. USB 3.0 and USB On-The-Go supply 1.8 A/9.0 W (for dedicated battery charging, 1.5 A/7.5 W full bandwidth or 900 mA/4.5 W high bandwidth), while FireWire can in theory supply up to 60 watts of power, although 10 to 20 watts is more typical.
These and other differences reflect the differing design goals of the two buses: USB was designed for simplicity and low cost, while FireWire was designed for high performance, particularly in time-sensitive applications such as audio and video. Although similar in theoretical maximum signaling rate, FireWire 400 is faster than USB 2.0 high-bandwidth in real-use,[115] especially in high-bandwidth use such as external hard drives.[116][117][118][119] The newer FireWire 800 standard is twice as fast as FireWire 400 and faster than USB 2.0 high-bandwidth both theoretically and practically.[120] However, FireWire's speed advantages rely on low-level techniques such as direct memory access (DMA), which in turn have created opportunities for security exploits such as the DMA attack.
The chipset and drivers used to implement USB and FireWire have a crucial impact on how much of the bandwidth prescribed by the specification is achieved in the real world, along with compatibility with peripherals.[121]
Ethernet
[edit]The IEEE 802.3af, 802.3at, and 802.3bt Power over Ethernet (PoE) standards specify more elaborate power negotiation schemes than powered USB. They operate at 48 V DC and can supply more power (up to 12.95 W for 802.3af, 25.5 W for 802.3at, a.k.a. PoE+, 71 W for 802.3bt, a.k.a. 4PPoE) over a cable up to 100 meters compared to USB 2.0, which provides 2.5 W with a maximum cable length of 5 meters. This has made PoE popular for Voice over IP telephones, security cameras, wireless access points, and other networked devices within buildings. However, USB is cheaper than PoE provided that the distance is short and power demand is low.
Ethernet standards require electrical isolation between the networked device (computer, phone, etc.) and the network cable up to 1500 V AC or 2250 V DC for 60 seconds.[122] USB has no such requirement as it was designed for peripherals closely associated with a host computer, and in fact it connects the peripheral and host grounds. This gives Ethernet a significant safety advantage over USB with peripherals such as cable and DSL modems connected to external wiring that can assume hazardous voltages under certain fault conditions.[123][124]
MIDI
[edit]The USB Device Class Definition for MIDI Devices transmits Music Instrument Digital Interface (MIDI) music data over USB.[125] The MIDI capability is extended to allow up to sixteen simultaneous virtual MIDI cables, each of which can carry the usual MIDI sixteen channels and clocks.
USB is competitive for low-cost and physically adjacent devices. However, Power over Ethernet and the MIDI plug standard have an advantage in high-end devices that may have long cables. USB can cause ground loop problems between equipment, because it connects ground references on both transceivers. By contrast, the MIDI plug standard and Ethernet have built-in isolation to 500V or more.
eSATA/eSATAp
[edit]The eSATA connector is a more robust SATA connector, intended for connection to external hard drives and SSDs. eSATA's transfer rate (up to 6 Gbit/s) is similar to that of USB 3.0 (up to 5 Gbit/s) and USB 3.1 (up to 10 Gbit/s). A device connected by eSATA appears as an ordinary SATA device, giving both full performance and full compatibility associated with internal drives.
eSATA does not supply power to external devices. This is an increasing disadvantage compared to USB. Even though USB 3.0's 4.5 W is sometimes insufficient to power external hard drives, technology is advancing, and external drives gradually need less power, diminishing the eSATA advantage. eSATAp (power over eSATA, a.k.a. ESATA/USB) is a connector introduced in 2009 that supplies power to attached devices using a new, backward compatible, connector. On a notebook eSATAp usually supplies only 5 V to power a 2.5-inch HDD/SSD; on a desktop workstation it can additionally supply 12 V to power larger devices including 3.5-inch HDD/SSD and 5.25-inch optical drives.
eSATAp support can be added to a desktop machine in the form of a bracket connecting the motherboard SATA, power, and USB resources.
eSATA, like USB, supports hot plugging, although this might be limited by OS drivers and device firmware.
Thunderbolt
[edit]Thunderbolt combines PCI Express and DisplayPort into a new serial data interface. Original Thunderbolt implementations have two channels, each with a transfer speed of 10 Gbit/s, resulting in an aggregate unidirectional bandwidth of 20 Gbit/s.[126]
Thunderbolt 2 uses link aggregation to combine the two 10 Gbit/s channels into one bidirectional 20 Gbit/s channel.[127]
Thunderbolt 3 and Thunderbolt 4 use USB-C.[128][129][130] Thunderbolt 3 has two physical 20 Gbit/s bi-directional channels, aggregated to appear as a single logical 40 Gbit/s bi-directional channel. Thunderbolt 3 controllers can incorporate a USB 3.1 Gen 2 controller to provide compatibility with USB devices. They are also capable of providing DisplayPort Alternate Mode as well as DisplayPort over USB4 Fabric, making the function of a Thunderbolt 3 port a superset of that of a USB 3.1 Gen 2 port.
DisplayPort Alternate Mode 2.0: USB4 (requiring USB-C) requires that hubs support DisplayPort 2.0 over a USB-C Alternate Mode. DisplayPort 2.0 can support 8K resolution at 60 Hz with HDR10 color.[131] DisplayPort 2.0 can use up to 80 Gbit/s, which is double the amount available to USB data, because it sends all the data in one direction (to the monitor) and can thus use all eight data wires at once.[131]
After the specification was made royalty-free and custodianship of the Thunderbolt protocol was transferred from Intel to the USB Implementers Forum, Thunderbolt 3 has been effectively implemented in the USB4 specification – with compatibility with Thunderbolt 3 optional but encouraged for USB4 products.[132]
Interoperability
[edit]Various protocol converters are available that convert USB data signals to and from other communications standards.
Security threats
[edit]Due to the USB standard's plug-and-play nature, host computers are vulnerable to USB devices containing malicious software. It is possible to create a device that looks like a flash drive, but when plugged in, simulates a keyboard and types malicious commands. For example, on a computer running Microsoft Windows, the device can wait a set amount of time, then open PowerShell and download a malware script. The attack is called a BadUSB attack.[133][134]
Another malicious device is a USB killer, which sends high voltage pulses across the data lines, destroying or damaging whatever it is plugged into.[135][136][137]
In versions of Microsoft Windows before Windows XP, Windows would automatically run a script (if present) on certain devices via AutoRun, one of which are USB mass storage devices, which may contain malicious software.[138]
See also
[edit]Notes
[edit]- ^ Bhatt's team at Intel included Bala Sudarshan Cadambi, Jeff Morriss, Shaun Knoll, and Shelagh Callahan.Biljana Ognenova (22 February 2022). "The King of Plug-and-Play: How USB Took the World by Storm". allaboutcircuits.com. Retrieved 1 April 2025.
References
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* Product capability: product signals at 20Gbps
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* Product capability: product signals at 10Gbps
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* Product capability: product signals at 5Gbps
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We now have native support for USB Audio 2.0 devices with an inbox class driver! This is an early version of the driver that does not have all features enabled
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Further reading
[edit]- Axelson, Jan (1 September 2006). USB Mass Storage: Designing and Programming Devices and Embedded Hosts (1st ed.). Lakeview Research. ISBN 978-1-931-44804-8.
- ——— (1 December 2007). Serial Port Complete: COM Ports, USB Virtual COM Ports, and Ports for Embedded Systems (2nd ed.). Lakeview Research. ISBN 978-1-931-44806-2.
- ——— (2015). USB Complete: The Developer's Guide (5th ed.). Lakeview Research. ISBN 978-1-931448-28-4.
- Hyde, John (February 2001). USB Design by Example: A Practical Guide to Building I/O Devices (2nd ed.). Intel Press. ISBN 978-0-970-28465-5.
- "Debugging USB 2.0 for Compliance: It's Not Just a Digital World" (PDF). Keysight Technologies. Technologies Application Note (1382–3). Keysight.
External links
[edit]General overview
[edit]- Joel Johnson (29 May 2019). "The unlikely origins of USB, the port that changed everything". Fast Company.
- Leigh, Peter (24 May 2020). Why Does USB Keep Changing? (video).
- Parikh, Bijal. "USB (Universal Serial Bus): An Overview". Engineers Garage. WTWH Media. Retrieved 7 May 2022.
- Barnatt, Christopher (25 September 2022). Explaining USB: From 1.0 to USB4 V2.0 (ExplainingComputers) (video).
Technical documents
[edit]- "USB Implementers Forum (USB-IF)". USB.org.
- "USB Document Library (USB 3.2, USB 2.0, Wireless USB, USB-C, USB Power Delivery)". USB.org.
- "Universal Host Controller Interface (UHCI)" (PDF). Intel – via mit.edu.
- "USB 3.0 Standard-A, Standard-B, Powered-B connectors". Pinouts guide. Archived from the original on 14 May 2016.
- Muller, Henk (July 2012). "How To Create And Program USB Devices". Electronic Design.
- Garney, John (June 1996). "An Analysis of Throughput Characteristics of Universal Serial Bus" (PDF).
- Hershenhoren, Razi; Reznik, Omer (October 2010). "USB 2.0 Protocol Engine" (PDF). Archived from the original (PDF) on 4 August 2020. Retrieved 30 January 2019.
- IEC 62680 (Universal Serial Bus interfaces for data and power):
- IEC 62680-1.1:2015 – Part 1-1: Common components – USB Battery Charging Specification, Revision 1.2
- IEC 62680-1-2:2018 – Part 1-2: Common components – USB Power Delivery specification
- IEC 62680-1-3:2018 – Part 1-3: Common components – USB Type-C Cable and Connector Specification
- IEC 62680-1-4:2018 – Part 1-4: Common components – USB Type-C Authentication Specification
- IEC 62680-2-1:2015 – Part 2-1: Universal Serial Bus Specification, Revision 2.0
- IEC 62680-2-2:2015 – Part 2-2: Micro-USB Cables and Connectors Specification, Revision 1.01
- IEC 62680-2-3:2015 – Part 2-3: Universal Serial Bus Cables and Connectors Class Document Revision 2.0
- IEC 62680-3-1:2017 – Part 3-1: Universal Serial Bus 3.1 Specification
Overview
Core principles
The Universal Serial Bus (USB) is an industry standard for interfacing, connecting, communicating, and supplying power to electronic devices, developed and maintained by the USB Implementers Forum (USB-IF), a nonprofit corporation founded in 1995 to promote and support USB technology.[10] At its core, USB enables hot-swappable connections, allowing devices to be attached or removed without powering down the host system, and facilitates automatic device recognition through standardized descriptors that describe the device's capabilities, configuration, and identity to the host controller.[10] It employs a tiered-star topology, where a single host connects to multiple hubs that branch out to support up to 127 peripheral devices, optimizing bandwidth allocation and electrical loading across the bus.[10] USB supports four fundamental data transmission modes to accommodate diverse device needs: control transfers for setup and configuration commands; bulk transfers for large, non-time-critical data like file transfers; interrupt transfers for low-latency input from devices such as keyboards; and isochronous transfers for time-sensitive streaming data, such as audio or video, ensuring bounded latency without retransmission.[10] From its inception, USB has integrated power delivery as a key feature, providing a regulated 5 V supply with a maximum current of 500 mA per port in the original specification (increasing to 900 mA in USB 3.0 and higher with extensions like Battery Charging and USB Power Delivery), enabling self-powered or bus-powered operation for low-power peripherals without requiring separate adapters. USB ports on host devices such as desktop PCs serve as the primary means for charging peripherals and mobile devices via this standardized 5 V supply and its extensions.[10] Over time, USB has evolved to support data rates ranging from 1.5 Mbps in its low-speed mode to 80 Gbps in USB4 Version 2.0, released in 2022, with commercial implementations emerging by 2025 using enhanced physical layer architectures and USB Type-C connectors.[7][11]Connector types
USB connectors have evolved across versions to support varying form factors, data rates, and device types, with early designs emphasizing host-device orientation and later ones prioritizing reversibility and multifunctionality. The original USB 2.0 specification defined several connector types, including Type-A and Type-B for standard applications, alongside smaller Mini and Micro variants for portable devices.[10] These connectors typically feature non-reversible plugs with 4 or 5 pins dedicated to power, ground, and data signaling. USB 3.0 introduced enhancements to Type-A and Type-B with additional pins for SuperSpeed differential pairs, maintaining backward compatibility with USB 2.0 through shared pin layouts.[12] Mini and Micro connectors, while once common in mobile and embedded systems, are now deprecated in favor of more versatile options.[10] The USB Type-A connector is a rectangular, non-reversible plug primarily used on the host side, such as in computers and hubs, measuring approximately 12 mm wide by 4.5 mm high. It serves as the upstream-facing port for connecting peripherals. In USB 2.0 implementations, it has 4 pins: VBUS for 5V power, D- and D+ for differential data transmission at low/full speeds (up to 12 Mbps), and GND for ground reference. USB 3.0 Type-A expands this to 9 pins by adding SuperSpeed pairs (SSTX± for transmit, SSRX± for receive) and an additional ground drain, enabling data rates up to 5 Gbps while preserving the original 4 pins for compatibility. The USB 2.0 pins remain in the same positions as in USB 2.0 connectors, while the additional SuperSpeed pins are positioned behind them (deeper into the male connector or correspondingly shallower in the female receptacle), often indicated by a blue insert.[10][12] USB 2.0 Type-A pinout| Pin | USB 2.0 Type-A Function | Description |
|---|---|---|
| 1 | VBUS | +5V power supply |
| 2 | D- | Data minus (USB 2.0) |
| 3 | D+ | Data plus (USB 2.0) |
| 4 | GND | Ground |
| Pin | USB 3.0+ Type-A Function | Description |
|---|---|---|
| 1 | VBUS | +5V power supply |
| 2 | D- | Data minus (USB 2.0) |
| 3 | D+ | Data plus (USB 2.0) |
| 4 | GND | Ground |
| 5 | SSRX- | SuperSpeed receive minus (USB 3.0+) |
| 6 | SSRX+ | SuperSpeed receive plus (USB 3.0+) |
| 7 | GND_DRAIN | Ground drain (USB 3.0+) |
| 8 | SSTX- | SuperSpeed transmit minus (USB 3.0+) |
| 9 | SSTX+ | SuperSpeed transmit plus (USB 3.0+) |
| Pin | USB 2.0/3.0 Type-B Function | Description |
|---|---|---|
| 1 | VBUS | +5V power supply |
| 2 | D- | Data minus (USB 2.0) |
| 3 | D+ | Data plus (USB 2.0) |
| 4 | GND | Ground |
| 5 | Std_B_SSRX- | SuperSpeed receive minus (USB 3.0+) |
| 6 | Std_B_SSRX+ | SuperSpeed receive plus (USB 3.0+) |
| 7 | GND_DRAIN | Ground drain (USB 3.0+) |
| 8 | Std_B_SSTX- | SuperSpeed transmit minus (USB 3.0+) |
| 9 | Std_B_SSTX+ | SuperSpeed transmit plus (USB 3.0+) |
| Pin (Side A/B) | Function | Description |
|---|---|---|
| A1/B12, A12/B1 | GND | Ground returns |
| A2/B10, A3/B11 | TX1±/RX2± | SuperSpeed transmit/receive (Lane 1/2) |
| A4/B9, A9/B4 | VBUS | Power delivery (up to 5A/20V) |
| A5/B5 | CC1/CC2 | Configuration channel (orientation, power, modes) |
| A6/B6, A7/B7 | D+/D- | USB 2.0 data pair |
| A8/B8 | SBU1/SBU2 | Sideband use (auxiliary signals, alternate modes) |
Key objectives
The Universal Serial Bus (USB) was designed with the primary objective of replacing the multitude of proprietary ports and connectors on personal computers—such as serial, parallel, PS/2, and SCSI—with a single, standardized interface to simplify connectivity for peripherals like keyboards, mice, printers, and storage devices.[16][17] This unification aimed to eliminate the frustration of incompatible cables and adapters, fostering a more user-friendly ecosystem for both consumers and manufacturers.[18] A core goal was to enable true plug-and-play functionality, allowing devices to be connected or disconnected without rebooting the system or installing specialized software drivers, thereby supporting hot-plugging and automatic configuration.[16][18] USB also sought to integrate data transfer and power delivery over the same cable, providing sufficient power (initially up to 2.5 watts) to operate low-power devices directly from the host, reducing the need for separate power supplies and enabling universal charging capabilities.[17][18] These features promised significant benefits, including cost reductions for peripheral manufacturers through standardized components and decreased consumer expenses on multiple adapters, while promoting interoperability across diverse hardware.[16][17] Design targets emphasized affordability and accessibility, with an initial goal of keeping port costs under $5 to encourage widespread adoption in consumer electronics.[17] The standard prioritized ease of use for non-technical users, scalability for future speed and power enhancements, and low overall implementation costs—such as a targeted 50-cent electronics budget for basic devices—to ensure it could support everything from simple input devices to more demanding peripherals without excessive complexity.[18][16] To achieve these objectives, the USB standard was developed collaboratively by major industry players including Intel, Microsoft, and Compaq, with the formation of the USB Implementers Forum (USB-IF) in 1995 to oversee specifications, compliance testing, and logo licensing for interoperability.[4][17] The USB-IF's role ensured that products from various vendors adhered to the same protocols, preventing fragmentation and driving global adoption.[18][4]Fundamental limitations
One of the primary inherent constraints of the USB standard is its limited cable length, primarily due to signal attenuation over twisted-pair copper wiring. The USB 2.0 specification limits cable assemblies to a maximum of 5 meters for both full-speed (12 Mb/s) and high-speed (480 Mb/s) modes, though high-speed operation typically requires lengths of 3 meters or less to ensure signal integrity. Beyond these distances, signal degradation occurs, leading to data errors or reduced performance, as the differential signaling voltage drops below reliable thresholds. This limitation persists across USB versions and necessitates active repeaters or fiber optic extenders for longer runs, though these are not part of the core specification.[19][20][10] Power delivery represents another fundamental restriction, with the original USB 1.x and 2.0 specifications capping output at 2.5 watts per port (5 V at 500 mA) to ensure safe operation without dedicated power negotiation. Even subsequent extensions, such as the Battery Charging Specification 1.2, which allows up to 7.5 watts (5 V at 1.5 A) in dedicated charging ports, do not alter the base port's inherent low-power design, requiring external adapters for higher demands. This constraint limits USB's suitability for power-intensive peripherals without additional protocols like USB Power Delivery, which still relies on host negotiation.[21][22] USB lacks native support for daisy-chaining devices or peer-to-peer networking, unlike FireWire (IEEE 1394), which allows up to 63 devices in a chain with shared bandwidth. Instead, USB employs a strict host-device hierarchy, where multiple peripherals must connect through powered hubs that aggregate connections but introduce potential bandwidth sharing and power dilution. This design requires centralized management via the host, preventing standalone device-to-device communication without specialized software or tunneling.[23][24] Despite the inclusion of isochronous transfer mode for time-sensitive data like audio and video, USB exhibits latency challenges in real-time applications, with inherent delays of at least 1-2 milliseconds due to polling-based scheduling and microframe intervals. Isochronous mode guarantees bandwidth but does not ensure error correction or retransmission, leading to potential packet loss in noisy environments or overloaded buses, which can disrupt applications like live streaming or VoIP. This makes USB less ideal for ultra-low-latency scenarios compared to dedicated interfaces.[25][26] In high-power scenarios, such as those enabled by USB Power Delivery up to 100 watts, overheating risks arise from inefficient heat dissipation in connectors and cables, potentially damaging components or posing safety hazards without adequate thermal management. Poorly designed ports or prolonged high-current draws can exceed safe temperature thresholds, necessitating active cooling or material choices with high thermal conductivity to mitigate these issues.[27][28] Finally, USB's architecture enforces a dependency on the host controller for all bus operations, preventing devices from initiating transfers independently and limiting standalone functionality. Every data exchange requires explicit polling from the host, which directs traffic and allocates resources, thus precluding autonomous operation in device-only networks. This host-centric model ensures compatibility but restricts USB to tethered ecosystems.[29]History
USB 1.x development
The development of the Universal Serial Bus (USB) 1.x specifications originated in the mid-1990s as a collaborative effort to simplify and standardize connections between personal computers and peripherals, replacing disparate ports like serial and parallel interfaces. In 1994, Intel began drafting the initial USB specification internally, which evolved into a joint project involving a consortium of seven companies: Intel, Compaq, Digital Equipment Corporation (DEC), IBM, Microsoft, NEC, and Northern Telecom. This group aimed to create a universal interface supporting plug-and-play functionality and power delivery over a single cable.[16] To coordinate the standard's promotion and implementation, the USB Implementers Forum (USB-IF) was formed in 1995 as a non-profit organization dedicated to advancing USB technology through testing, certification, and compliance programs. The USB-IF quickly expanded, attracting over 160 member companies in its first month, and launched a certification initiative that provided free compliance testing to ensure device interoperability and allowed qualified products to use the official USB logo. The USB 1.0 specification was publicly released in January 1996, introducing two operational speeds: low-speed mode at 1.5 Mbps, suitable for simple devices, and full-speed mode at 12 Mbps for more demanding applications. This release also incorporated basic power management features, including suspend and resume signaling to enable low-power states during inactivity.[16][4] Despite these innovations, USB 1.0 faced significant interoperability challenges, as devices from different manufacturers often failed to communicate reliably due to inconsistent implementations. The revised USB 1.1 specification, released in September 1998, addressed these issues by clarifying electrical and protocol requirements, thereby improving compatibility across hardware. USB 1.1 maintained the same speed tiers while refining suspend and resume mechanisms for more robust power conservation and bus management. To mitigate limitations of legacy serial and parallel ports—such as low speeds and multiple connector types—USB 1.x employed a tiered hub architecture, allowing a single host controller to support up to 127 devices through cascaded hubs that extended connectivity without requiring individual ports per device.[16][30] Adoption of USB 1.x proceeded slowly in the late 1990s, hampered by the lack of native operating system support; prior to the release of Windows 98 in June 1998, users relied on add-on drivers, limiting widespread use. Initial commercial devices focused on low-bandwidth peripherals, such as mice and keyboards operating at low speed, which demonstrated USB's plug-and-play benefits but highlighted the need for broader software integration to drive market penetration. By 2000, as OS support matured, USB 1.x had laid the groundwork for peripheral standardization, though its speeds constrained applications beyond basic input and storage.[16]USB 2.0 introduction
The USB 2.0 specification, released on April 27, 2000, by the USB Implementers Forum (USB-IF), introduced a high-speed mode operating at 480 Mbps, a significant increase from the 12 Mbps full-speed of USB 1.1, while maintaining backward compatibility to ensure seamless integration with existing low-speed (1.5 Mbps) and full-speed devices.[10][31] This compatibility allowed USB 2.0 hosts and devices to negotiate the highest supported speed during connection, enabling gradual adoption without requiring full system overhauls.[32] Key enhancements in USB 2.0 focused on power management and reliability, including the On-The-Go (OTG) supplement that enabled dual-role capabilities for portable devices, allowing them to switch between host and peripheral functions without a PC intermediary.[33] Additionally, improved error correction mechanisms, such as cyclic redundancy check (CRC) bits in data packets and enhanced bit stuffing for clock recovery, reduced transmission errors in high-speed operations.[34] These features supported more efficient power distribution, with devices able to suspend operations to conserve energy while maintaining selective suspend for individual endpoints.[35] At its core, USB 2.0 employed half-duplex signaling over twisted-pair differential lines (D+ and D-) using non-return-to-zero (NRZ) encoding, which facilitated reliable data transmission up to 5 meters on compliant cables.[36] Data transfers were packet-based, structured around token packets from the host to initiate transactions, followed by optional data and handshake packets to confirm receipt or report errors, enabling robust, host-scheduled communication across the bus.[37] The specification's adoption accelerated with the release of Windows XP in 2001, which provided native driver support for high-speed USB 2.0 devices, spurring widespread use in consumer electronics and making USB flash drives a ubiquitous storage solution by the mid-2000s.[38] From a 2025 perspective, USB 2.0 remains prevalent for legacy peripherals such as keyboards, mice, printers, and basic external storage, where its 480 Mbps speed suffices and backward compatibility ensures longevity in mixed-device environments.[39]USB 3.x evolution
USB 3.0, released on November 12, 2008, marked the introduction of SuperSpeed USB, achieving a signaling rate of 5 Gbit/s while maintaining backward compatibility with USB 2.0 devices. This specification utilized full-duplex communication over dedicated transmit and receive differential pairs, allowing simultaneous bidirectional data flow unlike the half-duplex USB 2.0. To visually distinguish SuperSpeed ports, USB-IF recommended blue-colored inserts for Type-A and Type-B connectors.[40] The evolution continued with USB 3.1 in July 2013, where Generation 2 (SuperSpeed+) doubled the speed to 10 Gbit/s (equivalent to USB 3.2 Gen 2) by adopting 128b/132b encoding to reduce overhead from the 8b/10b used in USB 3.0, enabling practical transfer rates for external SSDs of approximately 1000-1050 MB/s.[41] In September 2017, USB 3.2 further advanced the standard, with Generation 2×2 enabling 20 Gbit/s through the use of two 10 Gbit/s lanes on compatible USB Type-C connectors. These enhancements prioritized higher throughput for demanding applications while preserving compatibility with prior USB 3.x generations. The proliferation of terms like SuperSpeed and SuperSpeed+ contributed to widespread confusion in marketing and consumer understanding of capabilities. Addressing this, the USB-IF in September 2022 introduced a simplified branding scheme based on maximum speeds—USB 5 Gbps, USB 10 Gbps, and USB 20 Gbps—discarding generational and SuperSpeed nomenclature for clarity.[42] Key features across USB 3.x include link power management, which defines states (U0 active, U1/U2 low-power idle, U3 suspend) to optimize energy use during idle periods without full link disconnection. Adoption of USB 3.x has been extensive in solid-state drives (SSDs) and external storage devices, where the increased speeds significantly reduce transfer times for large files compared to USB 2.0.[43][32]USB4 advancements
The USB4 specification was published by the USB Implementers Forum (USB-IF) in September 2019, establishing a maximum data transfer rate of 40 Gbps while building directly on the Thunderbolt 3 protocol developed by Intel.[44] This foundation enabled USB4 to support tunneling of multiple protocols, including USB 2.0, USB 3.2, DisplayPort 1.4, and PCI Express 3.0, over a single USB Type-C cable, allowing dynamic bandwidth allocation for concurrent data, video, and peripheral connectivity.[44] All USB4 hosts and devices were required to include mandatory backward compatibility with USB 3.2 Gen 2x2 (20 Gbps) and USB 2.0, ensuring seamless integration with legacy USB ecosystems.[44] In September 2022, the USB Promoter Group announced USB4 Version 2.0, which introduced support for up to 80 Gbps bidirectional symmetric operation and asymmetric modes reaching 120 Gbps in one direction, effectively doubling the performance potential of the original specification.[45] The updated specification, formally published in October 2022, maintained compatibility with existing USB Type-C cables for lower-speed operations while requiring certified 80 Gbps cables for full performance. In October 2024, the first USB4 Version 2.0 cables were certified by the USB-IF.[11] Alongside these enhancements, USB-IF introduced a simplified naming scheme in September 2022, rebranding capabilities as USB 5 Gbps, USB 10 Gbps, USB 20 Gbps, USB 40 Gbps, and USB 80 Gbps to eliminate confusion from prior USB 3.x designations and emphasize speed tiers.[45] By 2025, USB4 adoption had expanded significantly in consumer laptops, with many high-end models integrating Thunderbolt 5 ports that leverage USB4 Version 2.0 as their foundational protocol for achieving up to 80 Gbps bidirectional and 120 Gbps asymmetric speeds. The first USB4 Version 2.0-certified devices and controllers began entering the market in 2025, with broader adoption expected in 2026.[46] This integration facilitated broader deployment of USB4 in portable computing, enabling advanced features like multi-monitor DisplayPort tunneling and high-speed PCIe storage without proprietary hardware barriers.[47] Concurrently, the USB Audio Device Class reached Release 4.0 with engineering change notices (ECNs) extending through October 31, 2025, enhancing audio latency management and support for high-resolution formats over USB4 connections. Additionally, the European Union's Common Charger Directive, mandating USB Type-C for portable devices, achieved full enforcement for laptops in 2025.[48]Version timeline
The USB standard has evolved through successive versions, progressively increasing data transfer speeds, power capabilities, and compatibility features while maintaining backward compatibility where possible. The timeline below summarizes the major releases of the core USB specifications.| Version | Release Date | Maximum Speed | Key Additions |
|---|---|---|---|
| USB 1.0 | January 1996 | 12 Mbps (Full Speed); 1.5 Mbps (Low Speed) | Initial specification defining a serial bus for connecting up to 127 peripherals to a host, with basic plug-and-play support. |
| USB 1.1 | September 1998 | 12 Mbps (Full Speed); 1.5 Mbps (Low Speed) | Errata and refinements to USB 1.0 for improved device enumeration, suspend/resume functionality, and wider adoption.[49] |
| USB 2.0 | April 27, 2000 | 480 Mbps (Hi-Speed) | Introduction of high-speed mode with backward compatibility to USB 1.x, higher power delivery up to 2.5W per port, and support for isochronous transfers.[10] |
| USB 3.0 (later USB 3.2 Gen 1) | November 12, 2008 | 5 Gbps (SuperSpeed) | Full-duplex operation, 10x speed increase over USB 2.0, and up to 4.5W power per port, enabling faster data transfers for storage and peripherals.[50] |
| USB 3.1 Gen 2 (USB 3.2 Gen 2x1) | July 2013 | 10 Gbps (SuperSpeed+) | Doubled bandwidth with improved encoding efficiency and support for longer cables.[51] |
| USB 3.2 | September 22, 2017 | 20 Gbps (SuperSpeed+ 2x2) | Multi-lane operation for aggregated speeds, backward compatibility with prior USB 3.x, and integration with USB Type-C connectors.[52] |
| USB4 Version 1.0 | August 29, 2019 | 40 Gbps | Protocol tunneling for PCIe, DisplayPort, and Thunderbolt 3 compatibility; asymmetric bandwidth allocation; mandatory USB 3.2 Gen 2x2 support.[53] |
| USB4 Version 2.0 | October 18, 2022 | 80 Gbps | Optional 80 Gbps mode using PAM3 signaling for higher throughput, enhanced power profiles up to 240W via USB PD, and improved cable requirements for active cables. First certifications in 2024.[53] |
| Specification | Release Date | Maximum Power | Key Additions |
|---|---|---|---|
| USB Battery Charging (BC) 1.2 | October 2010 | 7.5W (1.5A at 5V) | Defined charging port detection (SDP, CDP, DCP) for higher currents without data communication, improving mobile device charging over USB 2.0 ports.[56] |
| USB Power Delivery (PD) 1.0 | July 5, 2012 | 100W (20V at 5A) | Negotiable power contracts up to 100W over USB Type-C, with bidirectional power roles and support for alternate modes like DisplayPort.[57] |
| USB Power Delivery (PD) 2.0 | August 2014 | 100W (20V at 5A) | Added fast role swap and dual-role port (DRP) support for seamless host/device switching.[57] |
| USB Power Delivery (PD) 3.0 | August 2016 | 100W (20V at 5A) | Introduced programmable power supply (PPS) for finer voltage/current steps (20 mV/50 mA), enhancing efficiency. Updates through 2018.[57] |
| USB Power Delivery (PD) 3.1 | May 26, 2021 | 240W (48V at 5A) | Extended to 240W with EPR over USB Type-C cables rated for higher voltages, supporting 28V, 36V, and 48V profiles for laptops and high-power devices.[57] |
Power delivery milestones
The initial USB specifications, starting with USB 1.0 in 1996 and refined in USB 1.1 (1998) and USB 2.0 (2000), provided a standard power delivery of 5 V at 500 mA, equating to 2.5 W, primarily intended for low-power, bus-powered devices such as keyboards and mice connected through hubs. This limited power budget supported basic peripheral operation without dedicated power supplies but proved insufficient for charging larger batteries in emerging mobile devices. Hub-powered configurations allowed devices to draw power from upstream hosts or powered hubs, emphasizing USB's role as a simple connectivity standard rather than a high-power solution.[32] In response to the growing demand for faster device charging, particularly influenced by Apple's 30-pin connector introduced in 2003 for iPods and later iPhones, which supported up to 2 A (10 W) from dedicated wall chargers, the USB Implementers Forum (USB-IF) developed and released the Battery Charging Specification (BC) 1.2 in 2010.[58] This specification enabled devices to detect non-standard dedicated charging ports (DCPs) via voltage divider methods, including Apple's proprietary 2 V signaling, allowing safe current draws up to 1.5 A (7.5 W at 5 V) without data communication, thus addressing interoperability issues with high-current chargers while preventing overload on standard USB ports. BC 1.2 became a cornerstone for early smartphone charging, bridging the gap between USB data ports and proprietary adapters. The USB Power Delivery (PD) 1.0 specification, released in 2012, marked a pivotal advancement by introducing dynamic negotiation over a communication channel (CC) for variable voltage and current profiles, enabling up to 15 W initially in basic implementations and scaling to 100 W (20 V at 5 A) with compatible hardware. This allowed bidirectional power roles between hosts and devices, supporting laptop charging and higher-power peripherals. Building on this, PD 2.0 (2014) refined cable detection and alternate modes, while PD 3.0 (2016, with updates through 2018) added Programmable Power Supply (PPS) for finer voltage steps (20 mV) to optimize battery charging efficiency.[59] A major leap occurred with PD 3.1 in 2021, which extended power delivery to 240 W (48 V at 5 A) using extended power range (EPR) profiles, with further support for up to 240 W+ in specialized configurations, requiring certified EPR cables and connectors.[9] By 2025, PD 3.1 has achieved widespread adoption across consumer electronics, facilitated by USB4 Version 2.0 (released 2022), which integrates 240 W delivery alongside 80 Gbps data rates over USB Type-C cables. Regulatory milestones, such as the European Union's mandate effective December 2024 requiring USB Type-C as the common charging port for small and medium portable devices, have accelerated universal adoption as of 2025, reducing e-waste and standardizing power delivery ecosystems.System Architecture
Host-device model
In the USB host-device model, the host—typically a computer or embedded controller—serves as the master controller of the bus, managing all communication, detecting device connections through voltage changes on the data lines, and initiating all transactions. The host enumerates connected devices by resetting them, assigning unique addresses, and querying descriptors to identify vendor ID (VID), product ID (PID), device class, and configuration details, thereby loading appropriate drivers and allocating bus bandwidth based on the device's requirements. This centralized control ensures orderly data flow and resource management across the bus.[60] USB devices function as peripherals or slaves, responding passively to host commands without initiating transfers, and are categorized as either self-powered (drawing power from an external source while using the bus for data) or bus-powered (deriving power from the host's VBUS line). In USB 2.0, for example, bus-powered devices draw up to 100 mA at 5 V before configuration, with low-power limits of 100 mA and high-power up to 500 mA after configuration; later versions such as USB 3.x increase these to up to 900 mA, with USB Type-C and Power Delivery enabling even higher levels up to 240 W. During enumeration, the device provides standardized descriptors—such as the 18-byte device descriptor containing USB version, class code, and VID/PID; the 9-byte configuration descriptor outlining power needs and interfaces; and interface descriptors specifying endpoints and subclass—to enable the host to configure the device for operation. Hubs, classified as a specific device class (0x09), act as intelligent extensions of the host by providing additional downstream ports, supporting a tiered-star topology with up to seven tiers (including the root hub) to connect up to 127 devices while relaying control and managing port status. In USB 2.0, for instance, self-powered hubs can deliver up to 500 mA per port and bus-powered hubs are limited to 100 mA per port; subsequent versions support higher outputs, such as 900 mA in USB 3.x.[60][61][50][9] To support portable and peer-to-peer scenarios, the USB On-The-Go (OTG) supplement and later specifications introduce dual-role capabilities, allowing certain devices—such as smartphones—to dynamically switch between host and peripheral roles using protocols like the Host Negotiation Protocol (HNP) or Role Swap Protocol (RSP). In dual-role port (DRP) mode, a device with a Micro-AB or USB Type-C connector can initiate as either an A-device (host, providing VBUS power) or B-device (peripheral), negotiating roles via session requests and chirp sequences to enable one device to act as host for peripherals like storage drives without a traditional PC. This extends the model beyond strict host-peripheral asymmetry while maintaining compatibility with standard hosts.[62]Bus topology
The USB bus employs a tiered-star topology, with the host controller serving as the central root hub from which all connections radiate outward. This structure organizes devices in a hierarchical manner, where the root hub connects directly to the host and subsequent hubs branch out to form additional connection points. The topology supports a maximum of seven tiers, including the host at tier 0 and up to five levels of intermediate hubs, accommodating a total of 127 devices (excluding the host itself).[63][10] Hubs play a critical role in expanding the network by repeating incoming signals to downstream ports while regenerating them to preserve data integrity across multiple tiers. They are classified as either self-powered, which draw electricity from an external source to deliver higher power per port without relying on upstream power, or bus-powered, which derive their energy solely from the upstream connection and are thus limited to lower power outputs. Additionally, hubs incorporate mechanisms for fault isolation, electrically segmenting the bus to prevent a failure in one branch—such as a short circuit—from propagating to the entire system.[61][64][10][50] Unlike bus standards such as IEEE 1394 (FireWire), which permit daisy-chaining where devices connect sequentially in a linear fashion, USB enforces a strict star configuration with no peer-to-peer communication; every device maintains a dedicated path back to the host through hubs, ensuring centralized control and avoiding complex arbitration.[10] In USB4, the tiered-star topology evolves through protocol tunneling, enabling virtual topologies that multiplex USB 3.x, DisplayPort, and PCIe traffic over a single physical link, allowing multiple devices to share bandwidth dynamically without physical reconfiguration. This enhancement supports up to 80 Gbps aggregate throughput but inherits the core limitations of bandwidth contention, where all devices on a tier compete for the shared link capacity, potentially reducing individual performance during high-demand scenarios. Furthermore, deeper tiers exacerbate latency, as each hub introduces propagation delays from signal repeating and protocol handling, typically adding microseconds per level in multi-hop paths.[6]Data flow mechanisms
USB employs a host-centered architecture where data flows unidirectionally from the host to devices or vice versa through logical channels known as pipes, which connect the host software to specific device endpoints.[65] These mechanisms ensure efficient communication across the bus topology, with the host controller managing all scheduling and arbitration to prevent collisions.[66] The USB specification defines four primary transfer types, each optimized for different data characteristics and use cases. Control transfers occur over a dedicated bidirectional pipe (endpoint 0) on every device and serve for device enumeration, configuration, status queries, and command exchanges; they use a request-response model with small data payloads, typically up to 8 bytes in the setup stage.[67] Bulk transfers provide reliable, non-real-time delivery of large data blocks with error detection and recovery via retransmission, making them suitable for applications like printers, scanners, and mass storage where throughput is prioritized over latency.[68] Interrupt transfers support low-latency polling for small, periodic data from devices such as keyboards and mice, guaranteeing a maximum response time within each bus frame to simulate interrupt-like behavior without hardware interrupts.[68] Isochronous transfers deliver time-sensitive streams like audio or video with guaranteed bandwidth but without error correction, ensuring bounded latency and jitter at the expense of potential data loss if the bus is overloaded.[68] Bandwidth allocation in USB is managed by the host at the service level, dividing the bus into 1-millisecond frames (or micro-frames in high-speed modes) where the host schedules transfers based on endpoint requirements declared during configuration.[66] Isochronous and interrupt transfers receive reserved, periodic slots to meet their timing guarantees, while bulk and control transfers use remaining best-effort capacity, allowing dynamic adjustment to avoid exceeding 80% of total bus bandwidth for periodic services in full-speed operations. This scheduling prevents contention and ensures fair resource distribution across connected devices. The pipe model abstracts the physical bus into virtual unidirectional communication channels, where each pipe links the host to a single endpoint on a device, defined by address, endpoint number, direction (IN for host-receive, OUT for host-send), and transfer type.[65] Except for the control pipe, which supports bidirectional flow via paired IN and OUT endpoints, other pipes are strictly unidirectional, enabling efficient data movement without requiring full-duplex hardware on every endpoint.[61] In USB4 Version 2.0, data flow evolves to support higher asymmetries and multi-protocol integration, with link speeds up to 80 Gbps symmetric or 120 Gbps asymmetric configurations (e.g., 80 Gbps downstream and 40 Gbps upstream) to optimize for display or storage-heavy workloads.[6][69] USB4 introduces tunneling mechanisms that encapsulate non-USB protocols like PCIe and DisplayPort within USB4 packets, allowing seamless integration of legacy USB alongside these tunneled streams over the same physical link without altering underlying transfer types. This enables concurrent operation of USB 2.0/3.x endpoints with tunneled data, managed by a router fabric that dynamically allocates bandwidth across protocols.[6]Device Classes
Mass storage devices
The USB Mass Storage Class (MSC), designated by base class code 08h, defines a protocol for USB devices to emulate block storage peripherals, such as hard disk drives, solid-state drives, and optical media, by encapsulating industry-standard command sets like SCSI over USB transports.[70][71] This class enables seamless integration of storage devices into host systems, treating them as generic block devices accessible via standard file system interfaces.[71] The primary transport mechanism is Bulk-Only Transport (BOT), specified under protocol code 50h with SCSI transparent subclass 06h, which conveys SCSI commands, data, and status exclusively through bulk endpoints without relying on control or interrupt endpoints for core operations.[72][71] BOT supports plug-and-play functionality, allowing devices to be recognized and mounted automatically as block devices on modern operating systems without requiring custom drivers; for instance, Windows uses the built-in usbstor.sys port driver, Linux employs the usb-storage kernel module, and macOS leverages native Core Storage support.[73][74] An evolution in the class came with the USB Attached SCSI (UAS) protocol, introduced in USB 3.0 under protocol code 62h, which enhances performance by supporting SCSI command queuing, multiple outstanding commands, and pipelined operations, reducing latency and improving throughput compared to BOT's single-command model.[75][71] UAS enables features like the SCSI UNMAP command, which facilitates TRIM operations on solid-state drives to optimize garbage collection and maintain performance over time.[75] Common examples include USB flash drives and external hard disk drives, which leverage MSC for hot-pluggable storage expansion, often formatted with file systems like FAT32, exFAT, or NTFS for cross-platform compatibility.[71] For external HDDs connected to USB 2.0 ports, practical transfer speeds are limited to approximately 30-40 MB/s due to protocol overhead and half-duplex operation, making large file transfers significantly slower compared to USB 3.0 or higher.[76] However, the class has limitations, such as the absence of native RAID support—requiring software-based implementations or external enclosures for redundancy—and inherent protocol overhead from USB encapsulation, which can reduce efficiency relative to direct internal interfaces like SATA.[71]Human interface devices
The Human Interface Device (HID) class, designated by base class code 03h in the USB interface descriptor, enables communication between hosts and devices intended for human interaction, such as input peripherals that convey user actions like keystrokes or movements. This class supplements the core USB specification by defining standardized protocols for device enumeration and data exchange, ensuring broad interoperability without requiring custom drivers for basic functionality.[77][70] Central to HID operation are report descriptors, which are parsed by the host to interpret device capabilities and data formats. These descriptors use a compact binary format to specify input reports, employing usage pages and codes to define elements like key codes for alphanumeric keyboards (e.g., usage 0x04 for 'A' key) or multi-axis values for pointing devices (e.g., X and Y axes under generic desktop usage page 0x01). Outputs and features, such as LED indicators on keyboards, are similarly defined, allowing devices to report states or receive commands dynamically. Interrupt transfers via dedicated IN endpoints provide low-latency polling, typically at intervals of 1-10 ms, to capture real-time inputs like mouse movements or button presses without buffering delays.[77][78] HID devices leverage USB's inherent hot-plug capabilities, permitting seamless connection and disconnection with automatic reconfiguration by the host. Multi-device support is facilitated through composite interfaces, enabling a single USB connection to handle multiple functions, such as a keyboard with embedded media control keys (using consumer page usages like 0xE0 for play/pause). The class also includes a boot protocol mode for keyboards and mice, which employs a fixed, simplified report format (e.g., 8-byte keyboard reports) to ensure compatibility during system boot or in BIOS environments where advanced parsing is unavailable. With the advent of USB 2.0, HID extended to wireless peripherals via low-bandwidth receiver dongles operating at high-speed rates up to 480 Mbps, supporting untethered devices while maintaining backward compatibility.[77][79] Representative examples include joysticks, which utilize generic desktop usages for directional axes (e.g., 0x30 for X, 0x31 for Y) and button arrays, and touchpads, treated as relative or absolute digitizers with usages for finger position and gestures under the digitizer page (0x0D). Operating systems, such as Windows, employ generic HID class drivers (e.g., hidclass.sys and hidusb.sys) to enumerate and manage these devices by interpreting report descriptors at runtime, routing inputs to applications via standard APIs without vendor-specific software for core operations. This driver architecture supports shared or exclusive access modes, ensuring efficient handling of multiple HID inputs.[77][80]Audio and video streaming
The USB Audio Class (UAC) and USB Video Class (UVC) define standardized protocols for streaming audio and video data over USB connections, enabling seamless integration of multimedia devices such as microphones, speakers, webcams, and capture cards without requiring custom drivers on compliant hosts.[81][82] These classes leverage isochronous transfer modes to ensure real-time, low-jitter delivery of time-sensitive media streams, supporting a range of applications from basic telephony to high-fidelity entertainment.[81] The UAC 1.0 specification, released in March 1998, introduced support for isochronous transfers tailored to audio devices like speakers and microphones, allowing real-time streaming of PCM audio formats at rates up to 48 kHz with synchronization modes including adaptive and asynchronous options.[81] Building on this, UAC 2.0, released in 2012, enhanced synchronization through asynchronous feedback endpoints that enable devices to report precise clock drift to the host, reducing audio glitches in variable-rate scenarios; it also introduced adaptive sync mechanisms permitting endpoints to adjust sampling rates within ±1000 ppm tolerance for better clock recovery from external sources like S/PDIF.[83] Additionally, UAC 2.0 expanded multi-channel capabilities to up to 255 logical channels per cluster, with configurable spatial mapping for formats like 7.1 surround sound via processing units such as up/down-mixers and Dolby Prologic decoders.[83] UAC 4.0, initially published in April 2023 with engineering change notices (ECNs) extending through October 2025, further advances these features by supporting up to 65,535 channels per cluster and grouped control functionality for simultaneous state changes across audio blocks, improving efficiency in complex setups.[48][84] It builds on prior versions' cluster descriptors to enable ambisonic channel location data, facilitating spatial audio rendering for immersive experiences like 3D soundscapes, while standard latency reporting and performance optimizations aid low-latency applications such as live monitoring.[84] Complementing audio capabilities, the UVC 1.0 specification, released in June 2005, standardized video capture for devices like webcams, promoting driverless operation on hosts through predefined formats and controls for plug-and-play compatibility.[82] It supports uncompressed YUV and compressed MJPEG formats for resolutions up to 720p at 30 fps, with later revisions like UVC 1.5 adding H.264 compression for efficient bandwidth use in higher-quality streams.[82][85] With the advent of USB4, these classes benefit from enhanced tunneling protocols that encapsulate DisplayPort signals over USB, enabling multi-display video output up to 8K resolution at 60 Hz by dynamically allocating up to 40 Gbps (or 80 Gbps in Version 2.0) of bandwidth for video alongside data and power.[6] This integration supports advanced streaming scenarios, such as connecting headsets for multi-channel spatial audio or capture cards for 8K video ingestion in professional workflows.[6][84]Firmware upgrade protocols
The USB Device Firmware Upgrade (DFU) class enables hosts to download new firmware to devices or upload existing firmware from them over the USB bus, providing a standardized mechanism for post-deployment updates without requiring proprietary protocols. Defined under the Application Specific class, DFU uses class code 0xFE and subclass code 0x01, allowing both vendor-specific and standard implementations that rely primarily on USB control transfers for commands and data movement.[86][86] The DFU process operates in two primary modes: runtime mode, where the device functions normally but exposes a DFU interface for uploads, and DFU mode, entered via a DFU_DETACH request followed by a USB reset, which reconfigures the device solely for firmware operations. In download mode, the host issues DFU_DNLOAD requests to transfer firmware blocks, addressing specific memory segments—such as flash or RAM—through alternate interface settings that define segment boundaries via the wValue field in the request; for example, one alternate setting might target EEPROM while another addresses program memory. Upload mode reverses this with DFU_UPLOAD requests, allowing the device to send firmware data back to the host for verification or backup, with each transfer limited to 4096 bytes or less to ensure compatibility across USB speeds. The process concludes with a manifestation phase, where the device activates the new firmware, often via a reset.[86][86][86] Key features of DFU include brick recovery, where a failed update leaves the device in a dfuERROR state, recoverable by the host sending a DFU_CLRSTATUS request to reset the status and resume operations, preventing permanent device failure. DFU also integrates with secure boot mechanisms in many implementations, requiring firmware images to include digital signatures verified by the device's bootloader before application, ensuring only authorized updates are executed and mitigating risks from malicious uploads. For composite devices combining DFU with other classes like HID or CDC, the Interface Association Descriptor (IAD) groups related interfaces to simplify host driver enumeration, though DFU often operates as a standalone or additive interface without mandating IAD.[86][87][88] DFU finds common use in updating firmware for peripherals such as printers and microcontrollers, enabling fixes for bugs or enhancements in field-deployed devices, as well as BIOS-like updates on embedded systems like single-board computers. USB4 maintains backward compatibility with DFU, leveraging its higher bandwidth—up to 40 Gbps—for potentially faster transfers in implementations that utilize bulk endpoints alongside control transfers, though the core DFU protocol remains anchored to USB 2.0 speeds.[86][89]Other specialized classes
The USB Printer Device Class, assigned base class code 07h, enables printers to connect to hosts using standardized protocols that emulate parallel port communications. It primarily employs unidirectional bulk OUT transfers to send page description languages (PDLs) such as PCL or PostScript from the host to the printer, ensuring reliable data delivery without requiring acknowledgments for every packet. For bidirectional operation, devices may include a bulk IN endpoint for status reporting, while the GET_DEVICE_ID request returns an IEEE 1284-compatible identifier string listing supported PDLs and printer command protocols (PCPs). This class supports both unidirectional and bidirectional modes, with the former simplifying implementation by relying solely on the default control pipe for status queries via GET_PORT_STATUS.[70][90] The USB Communications Device Class (CDC), with base class code 02h, standardizes interfaces for communication peripherals like modems and network adapters. A key subclass emulates serial ports, such as RS-232, allowing legacy serial applications to operate over USB through abstract control and data interfaces that manage line coding, handshaking, and notifications for events like carrier detect. Another prominent subclass, the Ethernet Control Model, facilitates Ethernet over USB by providing a communication class interface for control signaling and a data interface using bulk transfers to encapsulate Ethernet frames, enabling devices like USB Ethernet adapters to integrate seamlessly with host networking stacks. CDC devices often combine a communications interface (class 02h) with a data interface (class 0Ah) to separate control and payload streams.[70][91] For media devices, the Media Transfer Protocol (MTP), built on the Picture Transfer Protocol (PTP) defined in the USB Still Image Class (base class 06h), provides an object-oriented framework for transferring digital media files and metadata between portable devices and hosts. Unlike the Mass Storage Class, MTP treats files as hierarchical objects with properties, allowing efficient browsing, searching, and transfer without exposing the device's full file system, which enhances security and supports digital rights management (DRM) through protected object handling and authentication. PTP, as the foundational layer, enables still image capture devices to advertise capabilities via session initiation and supports operations like object enumeration and data streaming over bulk or interrupt transfers. MTP extends this for broader media types, including audio and video, by adding commands for device properties and playlist management.[70][92][93] Other specialized classes address niche applications requiring secure or domain-specific interactions. The Smart Card Device Class (base class 0Bh), via the Chip Card Interface Device (CCID) specification, allows USB readers to interface with integrated circuit cards (e.g., smart cards) using bulk transfers for application protocol data units (APDUs) and supporting protocols like T=0 or T=1 per ISO/IEC 7816, with features for card insertion detection and error reporting. The Content Security Device Class (base class 0Dh) defines a framework for protected content delivery, using standard USB requests like GET_CHANNEL_SETTINGS to manage security methods (e.g., authentication protocols) without dedicated endpoints, enabling secure streaming of digital media while integrating with content protection schemes like HDCP. More recently, the I3C Device Class (base class 3Ch) extends USB capabilities for Internet of Things (IoT) applications by exposing MIPI I3C bus functionality—such as sensor control and dynamic addressing—over USB 3.2 interfaces, facilitating high-speed, low-power data exchange from embedded sensors to hosts.[70][94][95][96]Physical Interface
Connector specifications
The USB Type-A connector, commonly used for USB 2.0 and earlier standards, features four pins arranged in a rectangular form factor: pin 1 for VBUS (power supply at +5V), pin 2 for D- (data negative), pin 3 for D+ (data positive), and pin 4 for GND (ground).[97] This design supports basic host-to-device connections with a durability rating of 1,500 insertion/extraction cycles for standard variants, ensuring reliable mating under normal use conditions.[97] In contrast, the USB Type-C connector employs a compact, oval-shaped interface with 24 pins labeled A1 through C24 in a symmetrical, double-sided arrangement to enable reversibility. Key among these are the CC (Configuration Channel) pins (A5, B5, A6, B6), which detect cable orientation, determine host/device roles, and facilitate alternate mode negotiations for non-USB functions. The connector supports initial power delivery up to 100W via USB Power Delivery (PD) protocols, with the remaining pins handling high-speed data pairs, super-speed differential signals, and auxiliary functions like Sideband Use (SBU) for video. Current ratings for USB connectors vary by version and implementation: USB 2.0 connectors, including Type-A, are rated for up to 1.5A at 5V under Battery Charging specifications, while USB 3.2 connectors support up to 3A, and USB4 implementations over Type-C can reach 5A with electronically marked (e-marker) cables for enhanced power handling. These ratings ensure safe power transmission without exceeding thermal limits. Mechanically, the reversible design of USB Type-C minimizes wear by allowing plug insertion in either orientation, achieving a durability of at least 10,000 insertion cycles compared to legacy connectors. Legacy mini and micro USB connectors have been deprecated in favor of Type-C for new designs due to their lower durability and non-reversible nature. As of 2025, EU regulations mandate USB Type-C as the standard connector for all new portable electronic devices, including smartphones, tablets, and cameras, to promote interoperability and reduce e-waste, with compliance required since December 28, 2024.[98]Cable designs
USB cables are constructed with specific wiring configurations to ensure reliable data transmission and power delivery. The core data lines, D+ and D-, consist of a twisted pair of copper conductors designed to minimize electromagnetic interference and crosstalk, particularly for full-speed and high-speed operations up to 480 Mbps in USB 2.0.[10] For high-speed variants, including USB 3.x and beyond, additional twisted pairs are incorporated for SuperSpeed differential signaling, such as the TX+ and RX+ pairs, which operate at higher frequencies and require precise impedance control around 90 ohms differentially.[99] Shielding is essential for integrity; foil and braided shielding surround the twisted pairs to protect against external noise and reduce emissions, with double shielding (tinned copper braid plus aluminum foil) common in premium cables to support error-free high-speed transfers.[100] Cable lengths are constrained by signal attenuation, which degrades quality over distance due to resistance, capacitance, and dielectric losses in the conductors. For USB 2.0, the maximum recommended length is 5 meters to maintain full 480 Mbps performance, beyond which signal weakening can lead to errors or reduced speeds, including data errors from attenuation or electromagnetic interference that may trigger retransmissions introducing minor additional latency and instability, especially in low-quality or poorly shielded cables; these latency effects are rarely noticeable unless exceeding the ~5 m (16 ft) limit without active extensions, with connectivity failures predominating over latency concerns.[10][101] USB 3.2 Gen 1 (5 Gbps) cables are typically limited to 3 meters, while Gen 2 (10 Gbps) variants are restricted to about 1 meter to preserve SuperSpeed capabilities, as longer runs amplify attenuation in the higher-frequency differential pairs.[19] These limits apply to passive copper cables; exceeding them without compensation risks data corruption or fallback to lower speeds. Various cable types address different needs beyond basic connectivity. Standard USB cables include both power (VBUS and GND) and data lines for full host-device communication. Charging-only cables omit the D+ and D- data wires to reduce cost and thickness, supporting power delivery up to 2.5 W in USB 2.0 or higher via USB Power Delivery in Type-C, but preventing data transfer.[102] Active extension cables incorporate built-in signal repeaters or amplifiers to overcome length limits, enabling reliable extensions up to 10 meters or more for USB 3.2 Gen 1 while maintaining 5 Gbps speeds, though they require external power in some designs.[103] Bridge cables integrate protocol conversion electronics within the cable assembly to enable non-native connections. For example, USB-to-Ethernet bridge cables feature an embedded chipset that translates USB packets to Ethernet frames, allowing direct network access via a USB port without a separate adapter, supporting speeds up to 1 Gbps over lengths of 10 feet.[104] Dual-role cables for On-The-Go (OTG) functionality include a specialized resistor or ID pin configuration to negotiate host-peripheral roles dynamically, enabling devices like smartphones to act as hosts for peripherals such as USB drives, typically limited to USB 2.0 speeds.[105] By 2025, advancements in USB4 have introduced optical cables for extended reaches. Active optical USB4 cables use fiber optic cores for data transmission, paired with copper for power, achieving 40 Gbps over distances up to 4.5 meters without significant attenuation, ideal for professional setups requiring long, high-bandwidth links like video production.[106] These cables, certified for Thunderbolt compatibility, represent a shift from traditional copper limits, supporting full USB4 features including DisplayPort alt mode.[107]Power supply standards
USB power supply standards define the voltage, current, and negotiation mechanisms for delivering power over USB connections, ensuring compatibility and safety across devices. In legacy USB implementations, power is provided at a nominal 5 V on the VBUS line, with limits based on port type and device class. Low-power devices, typical for basic peripherals, are restricted to a maximum of 100 mA during operation and 2.5 mA in suspend mode to minimize energy consumption and support bus-powered operation without external supplies.[108] This configuration allows up to 0.5 W per device, suitable for items like keyboards or mice. High-power ports extend these limits for more demanding applications. Under USB 2.0, standard downstream ports supply up to 500 mA, but enhanced configurations via the Battery Charging Specification (BC 1.2) enable dedicated charging ports to deliver up to 1.5 A at 5 V through detection mechanisms like voltage sourcing on D+ and D- lines. For USB 3.x, SuperSpeed ports increase the operational limit to 900 mA at 5 V, providing up to 4.5 W and accommodating higher-bandwidth devices such as external drives. Dedicated high-power USB 3.x ports can negotiate up to 3 A at 5 V, often through proprietary or extended protocols, to support faster charging scenarios.[109][110] Power negotiation in modern USB standards, particularly with USB Type-C connectors, relies on the USB Power Delivery (PD) protocol to dynamically adjust voltage and current beyond fixed limits. Devices exchange capabilities via structured PD messages over the Configuration Channel (CC) pins using Binary Modulation Coding (BMC), allowing sinks to request specific power profiles from sources, such as 9 V at 2 A or 20 V at 3 A.[111] Without negotiation initiated by the sink device, sources default to lower safe power levels, such as 5 V at 0.5–1.5 A, which explains why fast-charging protocols like USB PD do not deliver higher power to simple devices lacking negotiation capabilities, such as motorized blinds remotes. Proprietary protocols like Quick Charge similarly require device handshaking for elevated power. Legacy high-power detection may use chirp signaling on data lines for Battery Charging modes, but PD messages provide the primary method for precise voltage and current agreements in USB 3.x and later. USB PD introduces Programmable Power Supply (PPS) for fine-grained control, enabling devices to request incremental voltage steps (typically 20 mV) and current adjustments (50 mA) within defined ranges, such as 3.3–21 V at up to 5 A. This feature, part of USB PD 3.0, optimizes charging efficiency by matching battery requirements, reducing heat, and supporting fast charging protocols in smartphones and laptops. PPS operates within negotiated power contracts, ensuring the source maintains output stability during transitions.[112] Safety mechanisms are integral to USB power standards to prevent damage from faults. All sources must implement overcurrent protection, limiting output to safe thresholds—typically within 5% accuracy for currents above 1 A—and automatically shutting down or reducing power upon detection of excessive draw. Overvoltage and overtemperature safeguards are also required, with VBUS tolerance specified at 4.75–5.25 V for legacy modes. The USB PD 3.1 specification, released in May 2021, extends these protections to higher power levels, supporting up to 240 W (48 V at 5 A) via new fixed voltages like 28 V, 36 V, and 48 V, while mandating robust fault handling for emerging high-wattage applications as of 2025 implementations.[9]Electrical signaling
USB electrical signaling encompasses the physical layer (PHY) mechanisms for transmitting data across the bus, including voltage levels, encoding schemes, and signal integrity measures. These elements ensure reliable communication while accommodating varying speeds and backward compatibility. The evolution from USB 2.0 to later versions reflects advancements in modulation and encoding to support higher data rates without excessive power consumption or electromagnetic interference. In USB 2.0, data transmission occurs over the differential pair D+ and D-, using non-return-to-zero inverted (NRZI) encoding with bit stuffing to maintain DC balance and clock recovery. NRZI represents a logical "1" by a transition in the signal level and a "0" by no transition, applied to the serialized data stream. Signaling levels differ by speed: low- and full-speed modes use single-ended signaling with 0 V (low) and 2.8-3.6 V (high) levels on the lines for a differential swing up to approximately 3 V, while high-speed mode employs true differential signaling with a 800-1200 mV peak-to-peak swing centered at 200 mV common-mode voltage for improved noise immunity at higher rates. Low-speed mode drives one line high and the other low, similar to full-speed.[10][113] USB 3.x introduces SuperSpeed modes with dedicated full-duplex differential pairs: SSTX± for transmission and SSRX± for reception, alongside the legacy D+/D- pair for USB 2.0 compatibility. USB 3.0 (5 Gbps) uses 8b/10b encoding with 30-bit block scrambling to reduce electromagnetic interference and ensure DC balance, maintaining a differential voltage swing of approximately 0.8–1.2 V centered at 0 V. For higher rates, USB 3.1 Gen 2 and USB 3.2 (up to 20 Gbps) adopt 128b/132b encoding, which lowers overhead to about 3% compared to 20% in 8b/10b, while retaining non-return-to-zero (NRZ) binary signaling on the differential pairs. These schemes prioritize signal integrity through equalization and pre-emphasis to compensate for channel losses.[114][115] USB4 builds on USB 3.x with enhanced PHY layers supporting up to 80 Gbps symmetrically or 120 Gbps asymmetrically in Version 2.0, using pulse amplitude modulation with three levels (PAM-3) for Gen 3 (40 Gbps) and Gen 4 (80 Gbps) modes, where each symbol encodes approximately 1.58 bits via an 11b/7t mapping. PAM-3 operates at a 25.6 Gbaud symbol rate with a differential swing adapted for low-voltage signaling, and optional forward error correction (Reed-Solomon) mitigates bit errors. Low-frequency periodic signaling (LFPS) bursts, inherited from Thunderbolt protocols, facilitate link training, power management, and entry/exit from low-power states without disrupting high-speed data paths.[116][117][118] Across USB versions, differential pairs maintain a characteristic impedance of 90 Ω ±15% to minimize reflections and ensure signal integrity, with eye diagrams used in compliance testing to verify parameters like eye height (minimum 150 mV for USB 2.0 high-speed) and width for jitter tolerance. As of 2025, draft enhancements for USB4 explore further optimizations toward 120 Gbps sustained rates in asymmetric configurations, focusing on improved PAM-3 equalization and cable compatibility.[119][120][118]Protocol and Transactions
Layered protocol stack
The USB protocol employs a layered architecture that separates concerns across physical signaling, data framing, packet management, and application-specific functions, enabling modular design and interoperability across device classes. The physical layer (PHY) handles electrical and mechanical aspects of the connection, including signaling and synchronization. The link layer manages framing, error detection, and low-level flow control to ensure reliable transmission over the physical medium. The protocol layer oversees packet construction, transaction sequencing, and end-to-end data integrity. At the top, the function layer implements class-specific protocols for devices, such as human interface or storage classes.[10][114] In USB 2.0, the protocol layer structures communications using three primary packet types: token packets to initiate transactions by specifying the device address, endpoint, and type (e.g., IN, OUT, or SETUP); data packets to carry payloads up to 1023 bytes with CRC protection; and handshake packets to acknowledge receipt (ACK), indicate no data ready (NAK), or signal errors (STALL). These packets are framed by the link layer with synchronization fields and error-checking, operating over the PHY's half-duplex differential signaling at speeds up to 480 Mbps.[10] USB 3.x introduces enhancements for SuperSpeed operation, with the link layer incorporating Link Management Packets (LMPs) for configuration, power management, and link commands, such as setting inactivity timeouts or enabling low-power states like U1 and U2. Training sequences, including TS1 and TS2 ordered sets, are used during the Link Training and Status State Machine (LTSSM) to achieve bit and symbol lock, equalizer adaptation, and polarity detection, ensuring robust 5 Gbps or 10 Gbps links with 8b/10b encoding in USB 3.0 or 128b/132b in USB 3.1 for reduced overhead. The protocol layer builds on this with transaction packets (e.g., ACK, NRDY, ERDY) and data packets supporting bursting for higher throughput.[114][115] USB4 extends the stack with a transaction layer that facilitates packet multiplexing and routing across the fabric, supporting dynamic bandwidth allocation for concurrent protocols. This layer enables tunneling of USB 3.x, PCIe, and DisplayPort (DP) traffic, where protocol adapters encapsulate native packets—such as USB 3.x data packets, PCIe transaction layer packets (TLPs), or DP main-link symbols—into USB4 transport packets for seamless integration over 20–80 Gbps links. The configuration layer manages adapter and router setup, including topology discovery via control packets.[121][122] The layered design promotes independence, allowing the protocol stack to support alternate modes like direct DP or PCIe connectivity over USB Type-C without full USB enumeration, as the PHY and link layers can bypass higher USB-specific processing for non-USB protocols.[121]Transaction types
USB transactions are the fundamental units of communication between a host and devices on the bus, consisting of token, data, and optional handshake packets to exchange information reliably. These transactions support four primary transfer types: control, bulk, interrupt, and isochronous, each optimized for specific data characteristics. All transactions incorporate overhead elements such as Packet Identifiers (PIDs) and Cyclic Redundancy Checks (CRC) to ensure integrity and proper sequencing.[123] Control transactions initiate device configuration, command issuance, and status reporting, forming the backbone of USB enumeration and management. They begin with a SETUP token packet containing a PID and endpoint address, followed by a data phase with the control request (up to 8 bytes for standard requests) using a DATA0 PID, and conclude with a STATUS handshake phase where the device responds with an ACK, NAK, or STALL PID to indicate success, temporary unavailability, or error. This three-phase structure ensures bidirectional verification without retransmission on errors in the status phase. For extended data transfers, additional IN or OUT tokens with DATA1 PIDs handle the payload, maintaining data toggle synchronization via alternating DATA0 and DATA1 PIDs. Overhead includes an 8-bit PID for each packet and a 16-bit CRC for data integrity in the SETUP and data phases.[123] Bulk and interrupt transactions share a similar structure but differ in usage and guarantees. Bulk transactions, suited for large, non-time-critical data like file transfers, use OUT tokens for host-to-device or IN tokens for device-to-host transfers, followed by a data phase (up to 512 bytes in USB 2.0, extendable to 1024 bytes in some variants) with DATA0 or DATA1 PID and CRC16, and a handshake phase with ACK for successful receipt or NAK for flow control. Interrupt transactions, designed for periodic, low-latency inputs like keyboard or mouse events, employ only IN tokens to poll devices at scheduled intervals, using the same data and handshake phases but with guaranteed polling bandwidth to minimize latency. Both types toggle data PIDs to detect missing packets, with bulk allowing retries on NAKs while interrupt prioritizes timeliness over reliability. PID and CRC overhead applies uniformly, comprising 8 bits and 16 bits respectively per relevant packet.[123] Isochronous transactions prioritize timing for real-time streams such as audio or video, forgoing handshakes to avoid delays. They rely on Start of Frame (SOF) packets, sent every 1 ms by the host, to synchronize timing across the bus. An OUT or IN token initiates the transaction, followed by a single data phase using DATA0, DATA1, DATA2, or MDATA PIDs (up to 1024 bytes per packet, supporting bursts of up to three packets for higher throughput), protected by CRC16 but without acknowledgment or retransmission—errors simply discard the frame. This design ensures bounded latency, with maximum data per microframe reaching 3072 bytes in high-speed modes via burst extensions. Overhead mirrors other types, with PIDs and CRC ensuring basic integrity amid the no-retries policy.[123] In USB4, transactions evolve to support higher speeds and tunneling, incorporating retimers for signal regeneration over extended cables up to several meters. Retimers act as active repeaters in the cable or device, decoding and re-encoding signals during lane initialization (using Link Type sideband transactions) and forwarding data in operational states, with phase-aligned equalization to maintain 40 Gbps or higher rates without degradation. Flow control shifts to a credit-based mechanism at the transport layer, where receivers issue Credit Grant packets to allocate buffer space per link or path, preventing overflows in shared or dedicated schemes; Path Credit Sync packets then track consumption, enabling dynamic bandwidth allocation across tunneled protocols like USB 3.x or PCIe. This adds header error control (HEC) and error-correcting codes (ECC) as overhead, alongside traditional PIDs and CRCs, to support asymmetric, multi-protocol traffic.[124]Error handling and reliability
USB employs cyclic redundancy checks (CRC) to detect errors in packet transmissions. Token packets use a CRC-5 checksum over an 11-bit protected region, generated by the polynomial , while data packets utilize a CRC-16 over up to 1023 bytes, based on the polynomial . These mechanisms detect single, double, and most multiple-bit errors by initializing the shift register to all 1s and inverting the remainder before transmission. Upon detection of a CRC mismatch, the receiver discards the packet and prompts a retry by the transmitter.[125] Flow control and error signaling rely on handshake packets: NAK (negative acknowledge) indicates temporary unavailability of the receiver, such as buffer overflow, triggering the sender to retry later without halting the endpoint; STALL signals a more severe error condition, like protocol violation or endpoint halt, requiring host intervention to clear via a control request before resuming. For broader recovery, a bus reset sequence—initiated by the host through a full-speed signaling pattern—reinitializes the bus, re-enumerates devices, and clears all endpoints, addressing persistent errors like corrupted configurations.[10] In USB 3.x, error handling extends to power-efficient states with selective suspend, allowing individual ports to enter low-power mode (U3) during inactivity while maintaining error detection on active links, reducing overall system faults from power instability. Link Frequency Periodic Signaling (LFPS) bursts facilitate link retraining by signaling entry/exit from low-power states (U1/U2) and recovering from signal degradation through periodic low-frequency pulses that renegotiate equalization without full reset.[43] In USB4 Version 2.0, for PAM-3 signaling at up to 80 Gbit/s, forward error correction (FEC) uses a Reed-Solomon RS(504,480) code, which adds parity symbols to detect and correct up to 12 symbol errors per 504-symbol block, mitigating bit errors at high speeds.[117] Hot-plug resilience is achieved through dynamic link initialization upon connection, including automatic routing reconfiguration and path teardown to handle insertion/removal without data loss or system crashes. Across USB versions, the protocol targets a bit error rate (BER) below , ensuring one erroneous bit per trillion transmitted, verified through compliance testing that transmits trillions of bits under stressed conditions for statistical confidence.[126]Related and Derived Standards
USB Type-C
USB Type-C, introduced in the USB Type-C Cable and Connector Specification Release 1.0 in August 2014 by the USB Implementers Forum (USB-IF), represents a standardized, reversible connector designed to consolidate previous USB connector types into a single, universal interface. This 24-pin, oval-shaped connector supports all prior USB protocol versions, including USB 2.0, USB 3.x, and later iterations, by mapping legacy signaling through its pins, enabling seamless integration across generations without requiring multiple port types. Its reversible design eliminates orientation issues, allowing insertion from either side, which enhances user convenience and reduces wear on ports.[127] Additionally, USB Type-C facilitates alternate modes, permitting the transmission of non-USB signals such as DisplayPort for video output up to 8K resolution or HDMI for multimedia connectivity, thereby expanding its utility beyond traditional data and power transfer.[128][129] A key feature of USB Type-C is the Configuration Channel (CC), which utilizes dedicated CC1 and CC2 pins to negotiate device roles, cable orientation, and power capabilities upon connection.[130] The CC lines employ pull-up and pull-down resistors to detect whether a device acts as a host (downstream facing port) or peripheral (upstream facing port), automatically determining power direction—allowing dynamic role swapping for bidirectional charging and data flow.[131] This intelligent negotiation supports power delivery up to 240 W (48 V at 5 A) via USB Power Delivery (PD) 3.1 with Extended Power Range (EPR), with current capabilities advertised through resistor values on the CC pins.[9][132] In the cable ecosystem, electronically marked (e-marker) chips embedded in active cables are essential for safely handling higher currents and voltages, such as 5 A at 48 V, by providing identification data to prevent overloads and ensure compliance with USB-IF standards. By 2025, USB Type-C has achieved widespread adoption, driven by regulatory mandates; the European Union requires all new small and medium portable electronic devices, including smartphones and tablets, to feature USB Type-C ports as of December 28, 2024, with laptops following by April 2026, aiming to standardize charging and reduce e-waste.[98] This has led to nearly 100% adoption among new smartphones globally, facilitated by similar policies in regions like India (effective March 2025) and high market penetration in consumer electronics.[133] For backward compatibility with legacy USB devices, adapters such as USB Type-C to Type-A or Type-B are widely available, but they limit performance to the capabilities of the older interface, often reducing data speeds to USB 2.0 levels (480 Mbps) or below when connected to non-Type-C hosts.[134]Media Agnostic USB
Media Agnostic USB (MA-USB) is a specification developed by the USB Implementers Forum (USB-IF) that enables the USB protocol to operate over diverse physical media, including wireless transports, without requiring traditional wired connections. Released in version 1.0 in March 2014, MA-USB encapsulates USB packets within a media-agnostic transport layer, allowing seamless integration with existing USB infrastructure such as host controllers and device class drivers. This tunneling approach supports backward compatibility with SuperSpeed USB (up to 5 Gbps) and Hi-Speed USB (480 Mbps) speeds, achieving wireless gigabit transfer rates over compatible media.[135][136][137] A key feature of MA-USB is its preservation of core USB semantics, including device enumeration, configuration, and class-specific protocols, ensuring that wireless devices function identically to their wired counterparts from the host's perspective. The protocol operates by mapping USB transactions to an IP-like encapsulation over the underlying medium, with dual-role hosts and devices managing discovery and session establishment. Supported media include Wi-Fi at 2.4 GHz and 5 GHz, WiGig at 60 GHz for high-throughput short-range links, and Ultra-Wideband (UWB) radios in the 3.1–10.6 GHz range, bridging wired and wireless ecosystems without altering USB software stacks.[138][139][140] Primary use cases for MA-USB include wireless docking stations, where peripherals like keyboards, displays, and storage can connect to a host over the air, and emerging applications in virtual reality (VR) setups requiring low-cable tethering for high-bandwidth data. As of 2025, adoption remains limited, with Microsoft providing native support in Windows 10 version 1709 and later for MA-USB over Wi-Fi, but no USB-IF certified consumer devices have been publicly listed, indicating slow market penetration despite the specification's maturity.[141][138][142] Challenges in MA-USB deployment center on wireless-specific issues, such as increased latency from transport encapsulation and transfer scheduling—particularly for isochronous endpoints used in audio or video—and susceptibility to interference in shared spectra like 2.4 GHz Wi-Fi bands. These factors can degrade real-time performance compared to wired USB, necessitating robust error correction and quality-of-service mechanisms. MA-USB complements USB4 by extending its tunneling capabilities to wireless media, enabling hybrid wired-wireless architectures for future ecosystems.[138][143]InterChip USB
Inter-Chip USB (IC-USB), formally defined in the Inter-Chip USB Supplement to the USB 2.0 Specification released on March 13, 2006, by the USB Implementers Forum (USB-IF), provides a standardized interface for short-range, low-power connections between integrated circuits within a single device. Intended for intra-device applications, such as linking a modem to a baseband processor in mobile devices, it adapts the USB 2.0 protocol for chip-to-chip communication without requiring external cables or connectors. This approach addresses the need for efficient internal data transfer in compact electronics, where traditional USB's analog signaling is inefficient for on-board traces.[144] Key features of IC-USB emphasize reduced complexity and resource use, employing a two-wire differential interface with DATA and STROBE signals driven at 1.2 V LVCMOS levels, eliminating the analog transceivers and voltage regulation of standard USB.[144] Power consumption operates in the milliwatt range during active transfers, achieving up to 50% lower overall power and 75% less board area than conventional USB 2.0 PHY implementations, while supporting high-speed data rates of 480 Mbps via 240 MHz double-data-rate source-synchronous signaling.[145] The interface limits maximum PCB trace lengths to 10 cm to maintain signal integrity, and it lacks hot-plug support or chirp protocols, focusing instead on fixed, always-connected topologies compatible with USB 2.0 host drivers.[144] The IC-USB 2.0 variant, often referred to as High-Speed Inter-Chip USB (HSIC), directly implements these USB 2.0 optimizations for 480 Mbps performance in embedded systems.[145] For higher speeds, the SuperSpeed Inter-Chip USB (SSIC) variant was introduced in the Inter-Chip Supplement to the USB 3.0 Specification on May 19, 2014, supporting 5 Gbps transfers using the MIPI M-PHY electrical layer to further minimize power and pin requirements in bandwidth-intensive scenarios.[146] In practice, IC-USB finds primary use in system-on-chips (SoCs) and integrated peripherals, enabling seamless internal communication in consumer electronics like wireless modems and multimedia controllers.[147] By 2025, it remains a niche solution in mobile devices, particularly for connecting subsystems in power-constrained designs where its low overhead outperforms alternatives for short-haul links.[148]DisplayPort over USB
DisplayPort over USB, also known as DisplayPort Alternate Mode (DP Alt Mode), enables USB Type-C connectors to transmit DisplayPort video and audio signals directly to external displays, leveraging the connector's high-speed lanes for native video output without additional adapters in many cases. This functionality was standardized to combine USB data transfer, power delivery, and display capabilities over a single cable, supporting resolutions up to 4K and beyond depending on the implementation. Similarly, HDMI tunneling via Alternate Mode allows USB Type-C ports to carry HDMI signals, facilitating compatibility with HDMI-equipped monitors and TVs through protocol conversion.[149] The specification for DP Alt Mode was introduced in 2014 by the Video Electronics Standards Association (VESA) in collaboration with the USB Implementers Forum, aligning with the initial USB Type-C standard. It supports DisplayPort 1.2, utilizing up to four high-speed lanes to achieve full performance equivalent to a native DisplayPort connection, including 4K (4096x2160) resolution at 60 Hz with 30-bit color depth. Configurations allow flexible lane allocation, such as dedicating two lanes to DisplayPort while reserving others for USB 3.1 data transfer at 10 Gbps, alongside USB Power Delivery up to 100 W. This initial version also laid the groundwork for HDMI Alternate Mode, which maps HDMI signals onto the USB Type-C pins for video output up to 4K@60 Hz.[150][151] With the advent of USB4 in 2019, DP Alt Mode evolved to natively support DisplayPort 2.0, incorporating the 128b/132b channel coding shared with USB4 for enhanced efficiency. This enables uncompressed 8K (7680x4320) video at 60 Hz with 4:4:4 color sampling and HDR, or 16K (15360x8640) at 60 Hz using display stream compression, while allowing simultaneous USB data transfer at up to 40 Gbps. Multi-stream transport (MST), a core DisplayPort feature, is fully supported for daisy-chaining multiple displays, such as two 4K monitors at 144 Hz, without bandwidth conflicts. HDMI tunneling in USB4 contexts similarly benefits, supporting HDMI 2.1 features like 8K@60 Hz through adapted signaling.[152] At the protocol level, DP Alt Mode reconfigures the USB Type-C connector's super-speed pairs (TX/RX) as DisplayPort main link lanes for high-bandwidth video transmission, while the sideband use (SBU) pins handle the low-speed DisplayPort AUX channel for link training, EDID reading, and hot-plug detection. Hot-plug detect (HPD) signaling occurs over the configuration channel (CC) pins using USB Power Delivery protocols to negotiate mode entry. MST enables daisy-chaining by embedding multiple independent video streams within a single link, allowing up to four displays in a chain with bandwidth allocation per stream. HDMI tunneling follows a parallel mapping, using the same lanes for TMDS clock and data pairs.[150][153] By 2025, DP Alt Mode has become a standard feature in professional monitors and consumer TVs, with widespread integration in devices like the Hisense 2025 TV lineup, which includes USB-C ports with embedded DisplayPort for direct PC connectivity. High-end USB-C monitors, such as the Dell UltraSharp U2725QE, routinely support 4K@120 Hz with USB hubs and power delivery, reflecting broad adoption for hybrid work setups. DisplayPort 1.4 and later versions in Alt Mode fully accommodate HDR10+ through dynamic metadata, enabling enhanced contrast and color on compatible displays without compression artifacts at standard resolutions.[154][155][156] For scenarios limited to USB 2.0 bandwidth, where native Alt Mode is unavailable, DisplayLink technology provides an alternative by compressing video streams to enable display output over standard USB connections. This GPU-agnostic solution uses hardware encoding in chipsets like the DL-1x5 series to support resolutions up to 1080p at 60 Hz or dual displays, decoding the stream locally at the display end to minimize latency. DisplayLink is commonly employed in docking stations and USB graphics adapters, extending video capabilities to legacy systems without requiring DisplayPort hardware.[157]Comparisons with Alternatives
Versus FireWire
USB and IEEE 1394 (commonly known as FireWire) emerged as competing serial bus standards in the late 1990s, with FireWire initially positioned for high-performance applications while USB targeted broader consumer use. In terms of speed, FireWire 400 (IEEE 1394a) offered a maximum data rate of 400 Mbps, comparable to USB 2.0's high-speed mode of 480 Mbps, though real-world throughput for FireWire often provided more consistent performance due to its efficient bandwidth allocation. FireWire 800 (IEEE 1394b) doubled this to 800 Mbps, surpassing USB 2.0 but falling short of USB 3.0's 5 Gbps (SuperSpeed) introduced in 2008. USB's iterative upgrades, including USB 3.1 at 10 Gbps, eventually outpaced FireWire's highest defined rates of 3.2 Gbps, though FireWire lacked USB's royalty-free licensing, making it more expensive to implement and limiting widespread adoption.[10][158][159]| Standard | Maximum Theoretical Speed |
|---|---|
| FireWire 400 (IEEE 1394a) | 400 Mbps |
| FireWire 800 (IEEE 1394b) | 800 Mbps |
| USB 2.0 (High-Speed) | 480 Mbps |
| USB 3.0 (SuperSpeed) | 5 Gbps |